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-rw-r--r--shared-core/radeon_cp.c25
-rw-r--r--shared-core/radeon_drv.h51
-rw-r--r--shared-core/radeon_irq.c24
3 files changed, 13 insertions, 87 deletions
diff --git a/shared-core/radeon_cp.c b/shared-core/radeon_cp.c
index f0eda664..ac46da38 100644
--- a/shared-core/radeon_cp.c
+++ b/shared-core/radeon_cp.c
@@ -1518,28 +1518,6 @@ static void radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on)
}
}
-void radeon_gart_flush(struct drm_device *dev)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
-
- if (dev_priv->flags & RADEON_IS_IGPGART) {
- RADEON_READ_IGPGART(dev_priv, RADEON_IGPGART_FLUSH);
- RADEON_WRITE_IGPGART(RADEON_IGPGART_FLUSH, 0x1);
- RADEON_READ_IGPGART(dev_priv, RADEON_IGPGART_FLUSH);
- RADEON_WRITE_IGPGART(RADEON_IGPGART_FLUSH, 0x0);
- } else if (dev_priv->flags & RADEON_IS_PCIE) {
- u32 tmp = RADEON_READ_PCIE(dev_priv, RADEON_PCIE_TX_GART_CNTL);
- tmp |= RADEON_PCIE_TX_GART_INVALIDATE_TLB;
- RADEON_WRITE_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp);
- tmp &= ~RADEON_PCIE_TX_GART_INVALIDATE_TLB;
- RADEON_WRITE_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp);
- } else {
-
-
- }
-
-}
-
static int radeon_do_init_cp(struct drm_device * dev, drm_radeon_init_t * init)
{
drm_radeon_private_t *dev_priv = dev->dev_private;
@@ -2455,9 +2433,6 @@ int radeon_driver_firstopen(struct drm_device *dev)
if (ret != 0)
return ret;
-#ifdef RADEON_HAVE_BUFFER
- drm_bo_driver_init(dev);
-#endif
return 0;
}
diff --git a/shared-core/radeon_drv.h b/shared-core/radeon_drv.h
index 0c503257..1cf03415 100644
--- a/shared-core/radeon_drv.h
+++ b/shared-core/radeon_drv.h
@@ -104,11 +104,6 @@
#define DRIVER_MINOR 28
#define DRIVER_PATCHLEVEL 0
-#if defined(__linux__)
-#define RADEON_HAVE_FENCE
-#define RADEON_HAVE_BUFFER
-#endif
-
/*
* Radeon chip families
*/
@@ -296,9 +291,8 @@ typedef struct drm_radeon_private {
struct mem_block *fb_heap;
/* SW interrupt */
- wait_queue_head_t irq_queue;
- int counter;
-
+ wait_queue_head_t swi_queue;
+ atomic_t swi_emitted;
int vblank_crtc;
uint32_t irq_enable_reg;
int irq_enabled;
@@ -361,7 +355,6 @@ extern int radeon_cp_resume(struct drm_device *dev, void *data, struct drm_file
extern int radeon_engine_reset(struct drm_device *dev, void *data, struct drm_file *file_priv);
extern int radeon_fullscreen(struct drm_device *dev, void *data, struct drm_file *file_priv);
extern int radeon_cp_buffers(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern void radeon_gart_flush(struct drm_device *dev);
extern u32 radeon_read_fb_location(drm_radeon_private_t *dev_priv);
extern void radeon_freelist_reset(struct drm_device * dev);
@@ -381,7 +374,6 @@ extern void radeon_mem_release(struct drm_file *file_priv,
/* radeon_irq.c */
extern int radeon_irq_emit(struct drm_device *dev, void *data, struct drm_file *file_priv);
extern int radeon_irq_wait(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int radeon_emit_irq(struct drm_device * dev);
extern void radeon_do_release(struct drm_device * dev);
extern u32 radeon_get_vblank_counter(struct drm_device *dev, int crtc);
@@ -415,30 +407,6 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
struct drm_file *file_priv,
drm_radeon_kcmd_buffer_t *cmdbuf);
-
-#ifdef RADEON_HAVE_FENCE
-/* i915_fence.c */
-
-
-extern void radeon_fence_handler(struct drm_device *dev);
-extern int radeon_fence_emit_sequence(struct drm_device *dev, uint32_t class,
- uint32_t flags, uint32_t *sequence,
- uint32_t *native_type);
-extern void radeon_poke_flush(struct drm_device *dev, uint32_t class);
-extern int radeon_fence_has_irq(struct drm_device *dev, uint32_t class, uint32_t flags);
-#endif
-
-#ifdef RADEON_HAVE_BUFFER
-/* radeon_buffer.c */
-extern struct drm_ttm_backend *radeon_create_ttm_backend_entry(struct drm_device *dev);
-extern int radeon_fence_types(struct drm_buffer_object *bo, uint32_t *class, uint32_t *type);
-extern int radeon_invalidate_caches(struct drm_device *dev, uint64_t buffer_flags);
-extern uint64_t radeon_evict_flags(struct drm_buffer_object *bo);
-extern int radeon_init_mem_type(struct drm_device * dev, uint32_t type,
- struct drm_mem_type_manager * man);
-extern int radeon_move(struct drm_buffer_object * bo,
- int evict, int no_wait, struct drm_bo_mem_reg * new_mem);
-#endif
/* Flags for stats.boxes
*/
#define RADEON_BOX_DMA_IDLE 0x1
@@ -1368,19 +1336,4 @@ do { \
write &= mask; \
} while (0)
-/* Breadcrumb - swi irq */
-#define READ_BREADCRUMB(dev_priv) RADEON_READ(RADEON_LAST_SWI_REG)
-
-static inline int radeon_update_breadcrumb(struct drm_device *dev)
-{
- drm_radeon_private_t *dev_priv = dev->dev_private;
-
- dev_priv->sarea_priv->last_fence = ++dev_priv->counter;
-
- if (dev_priv->counter > 0x7FFFFFFFUL)
- dev_priv->sarea_priv->last_fence = dev_priv->counter = 1;
-
- return dev_priv->counter;
-}
-
#endif /* __RADEON_DRV_H__ */
diff --git a/shared-core/radeon_irq.c b/shared-core/radeon_irq.c
index 3f6ace88..79e4e866 100644
--- a/shared-core/radeon_irq.c
+++ b/shared-core/radeon_irq.c
@@ -128,12 +128,9 @@ irqreturn_t radeon_driver_irq_handler(DRM_IRQ_ARGS)
stat &= dev_priv->irq_enable_reg;
/* SW interrupt */
- if (stat & RADEON_SW_INT_TEST) {
- DRM_WAKEUP(&dev_priv->irq_queue);
-#ifdef RADEON_HAVE_FENCE
- radeon_fence_handler(dev);
-#endif
- }
+ if (stat & RADEON_SW_INT_TEST)
+ DRM_WAKEUP(&dev_priv->swi_queue);
+
/* VBLANK interrupt */
if (stat & RADEON_CRTC_VBLANK_STAT)
drm_handle_vblank(dev, 0);
@@ -143,13 +140,14 @@ irqreturn_t radeon_driver_irq_handler(DRM_IRQ_ARGS)
return IRQ_HANDLED;
}
-int radeon_emit_irq(struct drm_device * dev)
+static int radeon_emit_irq(struct drm_device * dev)
{
drm_radeon_private_t *dev_priv = dev->dev_private;
unsigned int ret;
RING_LOCALS;
- ret = radeon_update_breadcrumb(dev);
+ atomic_inc(&dev_priv->swi_emitted);
+ ret = atomic_read(&dev_priv->swi_emitted);
BEGIN_RING(4);
OUT_RING_REG(RADEON_LAST_SWI_REG, ret);
@@ -166,13 +164,13 @@ static int radeon_wait_irq(struct drm_device * dev, int swi_nr)
(drm_radeon_private_t *) dev->dev_private;
int ret = 0;
- if (READ_BREADCRUMB(dev_priv) >= swi_nr)
+ if (RADEON_READ(RADEON_LAST_SWI_REG) >= swi_nr)
return 0;
dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
- DRM_WAIT_ON(ret, dev_priv->irq_queue, 3 * DRM_HZ,
- READ_BREADCRUMB(dev_priv) >= swi_nr);
+ DRM_WAIT_ON(ret, dev_priv->swi_queue, 3 * DRM_HZ,
+ RADEON_READ(RADEON_LAST_SWI_REG) >= swi_nr);
return ret;
}
@@ -260,8 +258,8 @@ int radeon_driver_irq_postinstall(struct drm_device * dev)
(drm_radeon_private_t *) dev->dev_private;
int ret;
- dev_priv->counter = 0;
- DRM_INIT_WAITQUEUE(&dev_priv->irq_queue);
+ atomic_set(&dev_priv->swi_emitted, 0);
+ DRM_INIT_WAITQUEUE(&dev_priv->swi_queue);
ret = drm_vblank_init(dev, 2);
if (ret)
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-10 03:06:54 +0000