diff options
Diffstat (limited to 'shared-core/nv40_fifo.c')
| -rw-r--r-- | shared-core/nv40_fifo.c | 20 | 
1 files changed, 8 insertions, 12 deletions
diff --git a/shared-core/nv40_fifo.c b/shared-core/nv40_fifo.c index 945fe228..6f25349c 100644 --- a/shared-core/nv40_fifo.c +++ b/shared-core/nv40_fifo.c @@ -30,17 +30,18 @@  #define RAMFC_WR(offset, val)	NV_WI32(fifoctx + NV40_RAMFC_##offset, (val))  #define RAMFC_RD(offset)	NV_RI32(fifoctx + NV40_RAMFC_##offset) +#define NV40_RAMFC(c) (dev_priv->ramfc_offset + ((c)*NV40_RAMFC__SIZE)) +#define NV40_RAMFC__SIZE 128  int  nv40_fifo_create_context(drm_device_t *dev, int channel)  {  	drm_nouveau_private_t *dev_priv = dev->dev_private;  	struct nouveau_fifo *chan = &dev_priv->fifos[channel]; -	uint32_t fifoctx, grctx, pushbuf; +	uint32_t fifoctx = NV40_RAMFC(channel), grctx, pushbuf;  	int i; -	fifoctx = dev_priv->ramfc_offset + channel*128; -	for (i=0;i<128;i+=4) +	for (i = 0; i < NV40_RAMFC__SIZE; i+=4)  		NV_WI32(fifoctx + i, 0);  	grctx   = nouveau_chip_instance_get(dev, chan->ramin_grctx); @@ -70,11 +71,10 @@ void  nv40_fifo_destroy_context(drm_device_t *dev, int channel)  {  	drm_nouveau_private_t *dev_priv = dev->dev_private; -	uint32_t fifoctx; +	uint32_t fifoctx = NV40_RAMFC(channel);  	int i; -	fifoctx = dev_priv->ramfc_offset + channel*128; -	for (i=0;i<128;i+=4) +	for (i = 0; i < NV40_RAMFC__SIZE; i+=4)  		NV_WI32(fifoctx + i, 0);  } @@ -82,11 +82,9 @@ int  nv40_fifo_load_context(drm_device_t *dev, int channel)  {  	drm_nouveau_private_t *dev_priv = dev->dev_private; -	uint32_t fifoctx; +	uint32_t fifoctx = NV40_RAMFC(channel);  	uint32_t tmp, tmp2; -	fifoctx = dev_priv->ramfc_offset + channel*128; -  	NV_WRITE(NV04_PFIFO_CACHE1_DMA_GET          , RAMFC_RD(DMA_GET));  	NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUT          , RAMFC_RD(DMA_PUT));  	NV_WRITE(NV10_PFIFO_CACHE1_REF_CNT          , RAMFC_RD(REF_CNT)); @@ -143,11 +141,9 @@ int  nv40_fifo_save_context(drm_device_t *dev, int channel)  {  	drm_nouveau_private_t *dev_priv = dev->dev_private; -	uint32_t fifoctx; +	uint32_t fifoctx = NV40_RAMFC(channel);  	uint32_t tmp; -	fifoctx = dev_priv->ramfc_offset + channel*128; -  	RAMFC_WR(DMA_PUT          , NV_READ(NV04_PFIFO_CACHE1_DMA_PUT));  	RAMFC_WR(DMA_GET          , NV_READ(NV04_PFIFO_CACHE1_DMA_GET));  	RAMFC_WR(REF_CNT          , NV_READ(NV10_PFIFO_CACHE1_REF_CNT));  | 
