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-rw-r--r--linux-core/radeon_gem.c75
1 files changed, 0 insertions, 75 deletions
diff --git a/linux-core/radeon_gem.c b/linux-core/radeon_gem.c
index 6c62620a..ce33979e 100644
--- a/linux-core/radeon_gem.c
+++ b/linux-core/radeon_gem.c
@@ -424,81 +424,6 @@ int radeon_gem_execbuffer(struct drm_device *dev, void *data,
}
-int radeon_gem_indirect_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_radeon_gem_indirect *args = data;
- struct drm_radeon_private *dev_priv = dev->dev_private;
- struct drm_gem_object *obj;
- struct drm_radeon_gem_object *obj_priv;
- uint32_t start, end;
- int ret;
- RING_LOCALS;
-
- obj = drm_gem_object_lookup(dev, file_priv, args->handle);
- if (obj == NULL)
- return -EINVAL;
-
- obj_priv = obj->driver_private;
-
- DRM_DEBUG("got here %p %d\n", obj, args->used);
- //RING_SPACE_TEST_WITH_RETURN(dev_priv);
- //VB_AGE_TEST_WITH_RETURN(dev_priv);
-
- ret = drm_bo_do_validate(obj_priv->bo, 0, DRM_BO_FLAG_NO_EVICT,
- 0 , 0);
- if (ret)
- return ret;
-
- /* Wait for the 3D stream to idle before the indirect buffer
- * containing 2D acceleration commands is processed.
- */
- BEGIN_RING(2);
-
- RADEON_WAIT_UNTIL_3D_IDLE();
-
- ADVANCE_RING();
-
- start = 0;
- end = args->used;
-
- if (start != end) {
- int offset = (dev_priv->gart_vm_start +
- + obj_priv->bo->offset + start);
- int dwords = (end - start + 3) / sizeof(u32);
-
- /* Fire off the indirect buffer */
- BEGIN_RING(3);
-
- OUT_RING(CP_PACKET0(RADEON_CP_IB_BASE, 1));
- OUT_RING(offset);
- OUT_RING(dwords);
-
- ADVANCE_RING();
- }
-
- COMMIT_RING();
-
- /* we need to fence the buffer */
- ret = drm_fence_buffer_objects(dev, NULL, 0, NULL, &obj_priv->fence);
- if (ret) {
-
- drm_putback_buffer_objects(dev);
- ret = 0;
- goto fail;
- }
-
- /* dereference he fence object */
- drm_fence_usage_deref_unlocked(&obj_priv->fence);
-
- mutex_lock(&dev->struct_mutex);
- drm_gem_object_unreference(obj);
- mutex_unlock(&dev->struct_mutex);
- ret = 0;
- fail:
- return ret;
-}
-
/*
* Depending on card genertation, chipset bugs, etc... the amount of vram
* accessible to the CPU can vary. This function is our best shot at figuring