diff options
| -rw-r--r-- | shared-core/nv20_graph.c | 6 | ||||
| -rw-r--r-- | shared-core/nv30_graph.c | 2 | ||||
| -rw-r--r-- | shared-core/nv40_graph.c | 2 |
3 files changed, 5 insertions, 5 deletions
diff --git a/shared-core/nv20_graph.c b/shared-core/nv20_graph.c index 45d88d6b..7190fc84 100644 --- a/shared-core/nv20_graph.c +++ b/shared-core/nv20_graph.c @@ -117,7 +117,7 @@ void nouveau_nv20_context_switch(drm_device_t *dev) nouveau_wait_for_idle(dev); - NV_WRITE(NV03_PGRAPH_CTX_CONTROL, 0x10000000); + NV_WRITE(NV10_PGRAPH_CTX_CONTROL, 0x10000000); nv20_graph_context_restore(dev, channel); @@ -126,7 +126,7 @@ void nouveau_nv20_context_switch(drm_device_t *dev) if ((NV_READ(NV10_PGRAPH_CTX_USER) >> 24) != channel) DRM_ERROR("nouveau_nv20_context_switch : wrong channel restored %x %x!!!\n", channel, NV_READ(NV10_PGRAPH_CTX_USER) >> 24); - NV_WRITE(NV03_PGRAPH_CTX_CONTROL, 0x10010100); + NV_WRITE(NV10_PGRAPH_CTX_CONTROL, 0x10010100); NV_WRITE(NV10_PGRAPH_FFINTFC_ST2, NV_READ(NV10_PGRAPH_FFINTFC_ST2)&0xCFFFFFFF); NV_WRITE(NV04_PGRAPH_FIFO,0x1); @@ -194,7 +194,7 @@ int nv20_graph_init(drm_device_t *dev) { NV_WRITE(NV10_PGRAPH_TSTATUS(i), NV_READ(NV10_PFB_TSTATUS(i))); } - NV_WRITE(NV04_PGRAPH_CTX_CONTROL, 0x10010100); + NV_WRITE(NV10_PGRAPH_CTX_CONTROL, 0x10010100); NV_WRITE(NV10_PGRAPH_STATE , 0xFFFFFFFF); NV_WRITE(NV04_PGRAPH_FIFO , 0x00000001); diff --git a/shared-core/nv30_graph.c b/shared-core/nv30_graph.c index 391a1063..f4faadd8 100644 --- a/shared-core/nv30_graph.c +++ b/shared-core/nv30_graph.c @@ -182,7 +182,7 @@ int nv30_graph_init(drm_device_t *dev) NV_WRITE(NV10_PGRAPH_TSTATUS(i), NV_READ(NV10_PFB_TSTATUS(i))); } - NV_WRITE(NV04_PGRAPH_CTX_CONTROL, 0x10010100); + NV_WRITE(NV10_PGRAPH_CTX_CONTROL, 0x10010100); NV_WRITE(NV10_PGRAPH_STATE , 0xFFFFFFFF); NV_WRITE(NV04_PGRAPH_FIFO , 0x00000001); diff --git a/shared-core/nv40_graph.c b/shared-core/nv40_graph.c index 510ffa76..5d5d0dc7 100644 --- a/shared-core/nv40_graph.c +++ b/shared-core/nv40_graph.c @@ -947,7 +947,7 @@ nv40_graph_init(drm_device_t *dev) NV_WRITE(NV10_PGRAPH_DEBUG_4, 0x00008000); NV_WRITE(NV04_PGRAPH_LIMIT_VIOL_PIX, 0x00be3c5f); - NV_WRITE(NV04_PGRAPH_CTX_CONTROL, 0x10010100); + NV_WRITE(NV10_PGRAPH_CTX_CONTROL, 0x10010100); NV_WRITE(NV10_PGRAPH_STATE , 0xFFFFFFFF); NV_WRITE(NV04_PGRAPH_FIFO , 0x00000001); |