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| author | Chris Forbes <chrisf@ijw.co.nz> | 2013-01-28 08:01:18 +0000 |
|---|---|---|
| committer | Kenneth Graunke <kenneth@whitecape.org> | 2013-02-06 11:20:05 -0800 |
| commit | 20c5607b57da113ca1a29caaa5a52eaf83808dff (patch) | |
| tree | 2a840291a2dd52d504d8172cdf014663d8a740f0 /tests/exynos/exynos_fimg2d_test.c | |
| parent | 3b5cc135424f3b8d6b79fb409fe9b4ffc4855333 (diff) | |
intel: fix length mask for Gen5/Gen6 3DSTATE_CLEAR_PARAMS
On Gen6, bit 15 is now `Depth Clear Value Valid`. This was being treated
as part of the length, and failing the rest of the batchbuffer decode.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Diffstat (limited to 'tests/exynos/exynos_fimg2d_test.c')
0 files changed, 0 insertions, 0 deletions