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authorMichel Daenzer <michel@daenzer.net>2003-08-26 15:44:01 +0000
committerMichel Daenzer <michel@daenzer.net>2003-08-26 15:44:01 +0000
commit062751ac472b2721bed0cd1ee48a3ae7d327ff07 (patch)
tree8f06a7fe6f51e14d34bae4add2df854c6f6398c8 /shared/radeon_drm.h
parent963ad33cb6b85189f3385bcba46905b6d4d329db (diff)
Remove artificial PCI GART limitations, rename AGP to GART where
appropriate
Diffstat (limited to 'shared/radeon_drm.h')
-rw-r--r--shared/radeon_drm.h20
1 files changed, 10 insertions, 10 deletions
diff --git a/shared/radeon_drm.h b/shared/radeon_drm.h
index 22fba171..c4a74649 100644
--- a/shared/radeon_drm.h
+++ b/shared/radeon_drm.h
@@ -214,11 +214,11 @@ typedef union {
#define RADEON_NR_SAREA_CLIPRECTS 12
-/* There are 2 heaps (local/AGP). Each region within a heap is a
+/* There are 2 heaps (local/GART). Each region within a heap is a
* minimum of 64k, and there are at most 64 of them per heap.
*/
#define RADEON_LOCAL_TEX_HEAP 0
-#define RADEON_AGP_TEX_HEAP 1
+#define RADEON_GART_TEX_HEAP 1
#define RADEON_NR_TEX_HEAPS 2
#define RADEON_NR_TEX_REGIONS 64
#define RADEON_LOG_TEX_GRANULARITY 16
@@ -400,7 +400,7 @@ typedef struct drm_radeon_init {
unsigned long sarea_priv_offset;
int is_pci;
int cp_mode;
- int agp_size;
+ int gart_size;
int ring_size;
int usec_timeout;
@@ -415,7 +415,7 @@ typedef struct drm_radeon_init {
unsigned long ring_offset;
unsigned long ring_rptr_offset;
unsigned long buffers_offset;
- unsigned long agp_textures_offset;
+ unsigned long gart_textures_offset;
} drm_radeon_init_t;
typedef struct drm_radeon_cp_stop {
@@ -525,18 +525,18 @@ typedef struct drm_radeon_indirect {
/* 1.3: An ioctl to get parameters that aren't available to the 3d
* client any other way.
*/
-#define RADEON_PARAM_AGP_BUFFER_OFFSET 1 /* card offset of 1st agp buffer */
+#define RADEON_PARAM_GART_BUFFER_OFFSET 1 /* card offset of 1st GART buffer */
#define RADEON_PARAM_LAST_FRAME 2
#define RADEON_PARAM_LAST_DISPATCH 3
#define RADEON_PARAM_LAST_CLEAR 4
/* Added with DRM version 1.6. */
#define RADEON_PARAM_IRQ_NR 5
-#define RADEON_PARAM_AGP_BASE 6 /* card offset of agp base */
+#define RADEON_PARAM_GART_BASE 6 /* card offset of GART base */
/* Added with DRM version 1.8. */
#define RADEON_PARAM_REGISTER_HANDLE 7 /* for drmMap() */
#define RADEON_PARAM_STATUS_HANDLE 8
#define RADEON_PARAM_SAREA_HANDLE 9
-#define RADEON_PARAM_AGP_TEX_HANDLE 10
+#define RADEON_PARAM_GART_TEX_HANDLE 10
typedef struct drm_radeon_getparam {
int param;
@@ -545,14 +545,14 @@ typedef struct drm_radeon_getparam {
/* 1.6: Set up a memory manager for regions of shared memory:
*/
-#define RADEON_MEM_REGION_AGP 1
-#define RADEON_MEM_REGION_FB 2
+#define RADEON_MEM_REGION_GART 1
+#define RADEON_MEM_REGION_FB 2
typedef struct drm_radeon_mem_alloc {
int region;
int alignment;
int size;
- int *region_offset; /* offset from start of fb or agp */
+ int *region_offset; /* offset from start of fb or GART */
} drm_radeon_mem_alloc_t;
typedef struct drm_radeon_mem_free {