summaryrefslogtreecommitdiff
path: root/shared-core/savage_state.c
diff options
context:
space:
mode:
authorDave Airlie <airlied@linux.ie>2006-01-02 05:22:50 +0000
committerDave Airlie <airlied@linux.ie>2006-01-02 05:22:50 +0000
commit1ad5dfc369a4202d51fc471cd0050b299d1fab8b (patch)
tree64b2b9c283db71cceb5b300dd21904fdfd6790fe /shared-core/savage_state.c
parentb2be72c44468f67e37e434a1e30b811963274f9c (diff)
whitespace cleanup/aligment with kernel
Diffstat (limited to 'shared-core/savage_state.c')
-rw-r--r--shared-core/savage_state.c80
1 files changed, 40 insertions, 40 deletions
diff --git a/shared-core/savage_state.c b/shared-core/savage_state.c
index e6e3ea7f..5c8a43eb 100644
--- a/shared-core/savage_state.c
+++ b/shared-core/savage_state.c
@@ -89,8 +89,9 @@ static int savage_verify_texaddr(drm_savage_private_t *dev_priv, int unit,
addr &= ~7;
if (addr < dev_priv->texture_offset ||
addr >= dev_priv->texture_offset+dev_priv->texture_size) {
- DRM_ERROR("bad texAddr%d %08x (local addr out of range)\n",
- unit, addr);
+ DRM_ERROR
+ ("bad texAddr%d %08x (local addr out of range)\n",
+ unit, addr);
return DRM_ERR(EINVAL);
}
} else { /* AGP */
@@ -103,8 +104,9 @@ static int savage_verify_texaddr(drm_savage_private_t *dev_priv, int unit,
if (addr < dev_priv->agp_textures->offset ||
addr >= (dev_priv->agp_textures->offset +
dev_priv->agp_textures->size)) {
- DRM_ERROR("bad texAddr%d %08x (AGP addr out of range)\n",
- unit, addr);
+ DRM_ERROR
+ ("bad texAddr%d %08x (AGP addr out of range)\n",
+ unit, addr);
return DRM_ERR(EINVAL);
}
}
@@ -145,8 +147,8 @@ static int savage_verify_state_s3d(drm_savage_private_t *dev_priv,
SAVE_STATE(SAVAGE_TEXCTRL_S3D, s3d.texctrl);
SAVE_STATE(SAVAGE_TEXADDR_S3D, s3d.texaddr);
if (dev_priv->state.s3d.texctrl & SAVAGE_TEXCTRL_TEXEN_MASK)
- return savage_verify_texaddr(
- dev_priv, 0, dev_priv->state.s3d.texaddr);
+ return savage_verify_texaddr(dev_priv, 0,
+ dev_priv->state.s3d.texaddr);
}
return 0;
@@ -172,17 +174,17 @@ static int savage_verify_state_s4(drm_savage_private_t *dev_priv,
/* if any texture regs were changed ... */
if (start <= SAVAGE_TEXDESCR_S4 &&
- start+count > SAVAGE_TEXPALADDR_S4) {
+ start + count > SAVAGE_TEXPALADDR_S4) {
/* ... check texture state */
SAVE_STATE(SAVAGE_TEXDESCR_S4, s4.texdescr);
SAVE_STATE(SAVAGE_TEXADDR0_S4, s4.texaddr0);
SAVE_STATE(SAVAGE_TEXADDR1_S4, s4.texaddr1);
if (dev_priv->state.s4.texdescr & SAVAGE_TEXDESCR_TEX0EN_MASK)
- ret |= savage_verify_texaddr(
- dev_priv, 0, dev_priv->state.s4.texaddr0);
+ ret |= savage_verify_texaddr(dev_priv, 0,
+ dev_priv->state.s4.texaddr0);
if (dev_priv->state.s4.texdescr & SAVAGE_TEXDESCR_TEX1EN_MASK)
- ret |= savage_verify_texaddr(
- dev_priv, 1, dev_priv->state.s4.texaddr1);
+ ret |= savage_verify_texaddr(dev_priv, 1,
+ dev_priv->state.s4.texaddr1);
}
return ret;
@@ -228,7 +230,8 @@ static int savage_dispatch_state(drm_savage_private_t *dev_priv,
/* scissor regs are emitted in savage_dispatch_draw */
if (start < SAVAGE_DRAWCTRL0_S4) {
if (start+count > SAVAGE_DRAWCTRL1_S4+1)
- count2 = count - (SAVAGE_DRAWCTRL1_S4+1 - start);
+ count2 = count -
+ (SAVAGE_DRAWCTRL1_S4 + 1 - start);
if (start+count > SAVAGE_DRAWCTRL0_S4)
count = SAVAGE_DRAWCTRL0_S4 - start;
} else if (start <= SAVAGE_DRAWCTRL1_S4) {
@@ -304,8 +307,9 @@ static int savage_dispatch_dma_prim(drm_savage_private_t *dev_priv,
case SAVAGE_PRIM_TRISTRIP:
case SAVAGE_PRIM_TRIFAN:
if (n < 3) {
- DRM_ERROR("wrong number of vertices %u in TRIFAN/STRIP\n",
- n);
+ DRM_ERROR
+ ("wrong number of vertices %u in TRIFAN/STRIP\n",
+ n);
return DRM_ERR(EINVAL);
}
break;
@@ -316,8 +320,7 @@ static int savage_dispatch_dma_prim(drm_savage_private_t *dev_priv,
if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
if (skip != 0) {
- DRM_ERROR("invalid skip flags 0x%04x for DMA\n",
- skip);
+ DRM_ERROR("invalid skip flags 0x%04x for DMA\n", skip);
return DRM_ERR(EINVAL);
}
} else {
@@ -325,8 +328,7 @@ static int savage_dispatch_dma_prim(drm_savage_private_t *dev_priv,
(skip >> 2 & 1) - (skip >> 3 & 1) - (skip >> 4 & 1) -
(skip >> 5 & 1) - (skip >> 6 & 1) - (skip >> 7 & 1);
if (skip > SAVAGE_SKIP_ALL_S4 || size != 8) {
- DRM_ERROR("invalid skip flags 0x%04x for DMA\n",
- skip);
+ DRM_ERROR("invalid skip flags 0x%04x for DMA\n", skip);
return DRM_ERR(EINVAL);
}
if (reorder) {
@@ -380,7 +382,8 @@ static int savage_dispatch_dma_prim(drm_savage_private_t *dev_priv,
for (i = start+1; i+1 < start+count; i += 2)
BCI_WRITE((i + reorder[i % 3]) |
- ((i+1 + reorder[(i+1) % 3]) << 16));
+ ((i + 1 +
+ reorder[(i + 1) % 3]) << 16));
if (i < start+count)
BCI_WRITE(i + reorder[i%3]);
} else if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
@@ -441,8 +444,9 @@ static int savage_dispatch_vb_prim(drm_savage_private_t *dev_priv,
case SAVAGE_PRIM_TRISTRIP:
case SAVAGE_PRIM_TRIFAN:
if (n < 3) {
- DRM_ERROR("wrong number of vertices %u in TRIFAN/STRIP\n",
- n);
+ DRM_ERROR
+ ("wrong number of vertices %u in TRIFAN/STRIP\n",
+ n);
return DRM_ERR(EINVAL);
}
break;
@@ -553,16 +557,15 @@ static int savage_dispatch_dma_idx(drm_savage_private_t *dev_priv,
prim = SAVAGE_PRIM_TRILIST;
case SAVAGE_PRIM_TRILIST:
if (n % 3 != 0) {
- DRM_ERROR("wrong number of indices %u in TRILIST\n",
- n);
+ DRM_ERROR("wrong number of indices %u in TRILIST\n", n);
return DRM_ERR(EINVAL);
}
break;
case SAVAGE_PRIM_TRISTRIP:
case SAVAGE_PRIM_TRIFAN:
if (n < 3) {
- DRM_ERROR("wrong number of indices %u in TRIFAN/STRIP\n",
- n);
+ DRM_ERROR
+ ("wrong number of indices %u in TRIFAN/STRIP\n", n);
return DRM_ERR(EINVAL);
}
break;
@@ -573,8 +576,7 @@ static int savage_dispatch_dma_idx(drm_savage_private_t *dev_priv,
if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
if (skip != 0) {
- DRM_ERROR("invalid skip flags 0x%04x for DMA\n",
- skip);
+ DRM_ERROR("invalid skip flags 0x%04x for DMA\n", skip);
return DRM_ERR(EINVAL);
}
} else {
@@ -582,8 +584,7 @@ static int savage_dispatch_dma_idx(drm_savage_private_t *dev_priv,
(skip >> 2 & 1) - (skip >> 3 & 1) - (skip >> 4 & 1) -
(skip >> 5 & 1) - (skip >> 6 & 1) - (skip >> 7 & 1);
if (skip > SAVAGE_SKIP_ALL_S4 || size != 8) {
- DRM_ERROR("invalid skip flags 0x%04x for DMA\n",
- skip);
+ DRM_ERROR("invalid skip flags 0x%04x for DMA\n", skip);
return DRM_ERR(EINVAL);
}
if (reorder) {
@@ -640,7 +641,8 @@ static int savage_dispatch_dma_idx(drm_savage_private_t *dev_priv,
for (i = 1; i+1 < count; i += 2)
BCI_WRITE(idx[i + reorder[i % 3]] |
- (idx[i+1 + reorder[(i+1) % 3]] << 16));
+ (idx[i + 1 +
+ reorder[(i + 1) % 3]] << 16));
if (i < count)
BCI_WRITE(idx[i + reorder[i%3]]);
} else if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
@@ -674,8 +676,7 @@ static int savage_dispatch_vb_idx(drm_savage_private_t *dev_priv,
const drm_savage_cmd_header_t *cmd_header,
const uint16_t *idx,
const uint32_t *vtxbuf,
- unsigned int vb_size,
- unsigned int vb_stride)
+ unsigned int vb_size, unsigned int vb_stride)
{
unsigned char reorder = 0;
unsigned int prim = cmd_header->idx.prim;
@@ -694,16 +695,15 @@ static int savage_dispatch_vb_idx(drm_savage_private_t *dev_priv,
prim = SAVAGE_PRIM_TRILIST;
case SAVAGE_PRIM_TRILIST:
if (n % 3 != 0) {
- DRM_ERROR("wrong number of indices %u in TRILIST\n",
- n);
+ DRM_ERROR("wrong number of indices %u in TRILIST\n", n);
return DRM_ERR(EINVAL);
}
break;
case SAVAGE_PRIM_TRISTRIP:
case SAVAGE_PRIM_TRIFAN:
if (n < 3) {
- DRM_ERROR("wrong number of indices %u in TRIFAN/STRIP\n",
- n);
+ DRM_ERROR
+ ("wrong number of indices %u in TRIFAN/STRIP\n", n);
return DRM_ERR(EINVAL);
}
break;
@@ -805,8 +805,7 @@ static int savage_dispatch_clear(drm_savage_private_t *dev_priv,
BCI_CMD_SET_ROP(clear_cmd,0xCC);
nbufs = ((flags & SAVAGE_FRONT) ? 1 : 0) +
- ((flags & SAVAGE_BACK) ? 1 : 0) +
- ((flags & SAVAGE_DEPTH) ? 1 : 0);
+ ((flags & SAVAGE_BACK) ? 1 : 0) + ((flags & SAVAGE_DEPTH) ? 1 : 0);
if (nbufs == 0)
return 0;
@@ -976,8 +975,9 @@ int savage_bci_cmdbuf(DRM_IOCTL_ARGS)
if (dma && dma->buflist) {
if (cmdbuf.dma_idx > dma->buf_count) {
- DRM_ERROR("vertex buffer index %u out of range (0-%u)\n",
- cmdbuf.dma_idx, dma->buf_count-1);
+ DRM_ERROR
+ ("vertex buffer index %u out of range (0-%u)\n",
+ cmdbuf.dma_idx, dma->buf_count-1);
return DRM_ERR(EINVAL);
}
dmabuf = dma->buflist[cmdbuf.dma_idx];