diff options
author | Dave Airlie <airlied@linux.ie> | 2006-03-25 07:16:14 +0000 |
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committer | Dave Airlie <airlied@linux.ie> | 2006-03-25 07:16:14 +0000 |
commit | 985738f203f06aa630feaf4ef15b794ea50d3ee9 (patch) | |
tree | afb9f6de55bef3e034e41df6768d62dd37ba8342 /shared-core/radeon_state.c | |
parent | 9c92b55953836589184f72f5a0c509f72af94786 (diff) |
radeon fix up the PCI ids for new memory map like the kernel one.. not
perfect but should be very safe... align some other kernel bits i810
align with kernel
Diffstat (limited to 'shared-core/radeon_state.c')
-rw-r--r-- | shared-core/radeon_state.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/shared-core/radeon_state.c b/shared-core/radeon_state.c index 45b1ecc4..f6a66112 100644 --- a/shared-core/radeon_state.c +++ b/shared-core/radeon_state.c @@ -1682,7 +1682,7 @@ static int radeon_cp_dispatch_texture(DRMFILE filp, if (tex->height == 1) { if (tex_width >= 64 || tex_width <= 16) { RADEON_COPY_MT(buffer, data, - tex_width * sizeof(u32)); + (int)(tex_width * sizeof(u32))); } else if (tex_width == 32) { RADEON_COPY_MT(buffer, data, 16); RADEON_COPY_MT(buffer + 8, @@ -1690,7 +1690,7 @@ static int radeon_cp_dispatch_texture(DRMFILE filp, } } else if (tex_width >= 64 || tex_width == 16) { RADEON_COPY_MT(buffer, data, - dwords * sizeof(u32)); + (int)(dwords * sizeof(u32))); } else if (tex_width < 16) { for (i = 0; i < tex->height; i++) { RADEON_COPY_MT(buffer, data, tex_width); @@ -1718,7 +1718,7 @@ static int radeon_cp_dispatch_texture(DRMFILE filp, * can upload it directly. */ RADEON_COPY_MT(buffer, data, - dwords * sizeof(u32)); + (int)(dwords * sizeof(u32))); } else { /* Texture image width is less than the minimum, so we * need to pad out each image scanline to the minimum |