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author | Anuj Phogat <anuj.phogat@gmail.com> | 2015-04-10 17:20:55 -0700 |
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committer | Anuj Phogat <anuj.phogat@gmail.com> | 2015-07-06 15:36:59 -0700 |
commit | 5c68f9f6f9bcc7edeacbc18b1052aed46a89c9f2 (patch) | |
tree | f13f809237fc1fca47d478e25f607975f680fc61 /shared-core/radeon_ms_reg.h | |
parent | 676c806d0221a7ea375676b2eab514c426fcacd3 (diff) |
i965/gen9: Pass alignment as function parameter in drm_intel_gem_bo_alloc_internal()
In case of YF/YS tiled buffers libdrm need not know about the tiling
format because these buffers don't have hardware support to be tiled
or detiled through a fenced region. But, libdrm still need to know
about buffer alignment restrictions because kernel uses it when
resolving the relocation.
Mesa uses drm_intel_gem_bo_alloc_for_render() to allocate Yf/Ys buffers.
So, use the passed alignment value in this function to initialize the
align variable in drm_intel_bo. Note that we continue ignoring the
alignment value passed to drm_intel_gem_bo_alloc() to follow the
previous behavior.
V2: Add a condition to avoid allocation from cache. (Ben)
V3: Make no changes in cache allocation strategy. Just update the alignment.
Update the aperture size estimate including the alignment. (Ben, Chris)
V4: Move aperture size adjustments inside drm_intel_bo_gem_set_in_aperture_size()
Don't split sentences across the one-line header and the changelog. (Chris)
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'shared-core/radeon_ms_reg.h')
0 files changed, 0 insertions, 0 deletions