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authorBen Skeggs <skeggsb@gmail.com>2009-02-11 10:48:36 +1000
committerBen Skeggs <skeggsb@gmail.com>2009-02-11 11:22:41 +1000
commitbc92c0edf33f3f38275f6aa4e0639b3ddeef68ca (patch)
tree7f8b95b6d8b3d220d14e7645d1e77130f1126380 /shared-core/radeon_microcode.h
parent7bbd605a21200e5e4beb94f261aefe30c4e7853d (diff)
drm/nv50: fix nv9x chipsets
NVIDIA do this fun little sequence after updating the PRAMIN page tables. On 9xxx chips, none of the PRAMIN BAR bindings (except the initial one) worked, hence the majority of the setup needed to create a channel ended up in the wrong place, causing all sorts of fun. This is done by NVIDIA on nv8x chips also, so we'll do it for them too, even though they appear to work without it.
Diffstat (limited to 'shared-core/radeon_microcode.h')
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