diff options
| author | Michel Daenzer <michel@daenzer.net> | 2002-09-25 17:18:19 +0000 |
|---|---|---|
| committer | Michel Daenzer <michel@daenzer.net> | 2002-09-25 17:18:19 +0000 |
| commit | 55acd0d5a64a2ee6b0cecc75872fbf8c4bb42a0c (patch) | |
| tree | 35851b96a577b91c5a41de9d4b390d038f558fce /shared-core/radeon_drv.h | |
| parent | f1c8fe95578e15d5eece6ad52540ce2c7c671f70 (diff) | |
common ioctl to wait for vertical blank IRQs
Diffstat (limited to 'shared-core/radeon_drv.h')
| -rw-r--r-- | shared-core/radeon_drv.h | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/shared-core/radeon_drv.h b/shared-core/radeon_drv.h index efe3020c..5c43ebc6 100644 --- a/shared-core/radeon_drv.h +++ b/shared-core/radeon_drv.h @@ -139,9 +139,10 @@ typedef struct drm_radeon_private { struct mem_block *agp_heap; struct mem_block *fb_heap; - wait_queue_head_t irq_queue; - atomic_t irq_received; - atomic_t irq_emitted; + /* SW interrupt */ + wait_queue_head_t swi_queue; + atomic_t swi_received; + atomic_t swi_emitted; } drm_radeon_private_t; @@ -187,12 +188,14 @@ extern int radeon_mem_init_heap( DRM_IOCTL_ARGS ); extern void radeon_mem_takedown( struct mem_block **heap ); extern void radeon_mem_release( struct mem_block *heap ); + /* radeon_irq.c */ extern int radeon_irq_emit( DRM_IOCTL_ARGS ); extern int radeon_irq_wait( DRM_IOCTL_ARGS ); extern int radeon_emit_and_wait_irq(drm_device_t *dev); -extern int radeon_wait_irq(drm_device_t *dev, int irq_nr); +extern int radeon_wait_irq(drm_device_t *dev, int swi_nr); extern int radeon_emit_irq(drm_device_t *dev); +extern int radeon_vblank_wait(drm_device_t *dev, unsigned int *vbl_seq); /* Flags for stats.boxes @@ -271,11 +274,15 @@ extern int radeon_emit_irq(drm_device_t *dev); #define RADEON_GEN_INT_CNTL 0x0040 +# define RADEON_CRTC_VBLANK_MASK (1 << 0) # define RADEON_GUI_IDLE_INT_ENABLE (1 << 19) # define RADEON_SW_INT_ENABLE (1 << 25) #define RADEON_GEN_INT_STATUS 0x0044 +# define RADEON_CRTC_VBLANK_STAT (1 << 0) +# define RADEON_CRTC_VBLANK_STAT_ACK (1 << 0) # define RADEON_GUI_IDLE_INT_TEST_ACK (1 << 19) +# define RADEON_SW_INT_TEST (1 << 25) # define RADEON_SW_INT_TEST_ACK (1 << 25) # define RADEON_SW_INT_FIRE (1 << 26) |