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authorDave Airlie <airlied@linux.ie>2007-03-04 19:10:46 +1100
committerDave Airlie <airlied@linux.ie>2007-03-04 19:10:46 +1100
commit188a93c9dfde31de4d86733fa46b50487d3a4ac0 (patch)
tree9152a127172dc9947794029b141682221b2c4660 /shared-core/radeon_drm.h
parentc9178c3d01f6f38a33f9624c620d290cb9036964 (diff)
radeon: make PCI GART aperture size variable, but making table size variable
This is precursor to getting a TTM backend for this stuff, and also allows the PCI table to be allocated at fb 0
Diffstat (limited to 'shared-core/radeon_drm.h')
-rw-r--r--shared-core/radeon_drm.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/shared-core/radeon_drm.h b/shared-core/radeon_drm.h
index f5edbc19..e96e7851 100644
--- a/shared-core/radeon_drm.h
+++ b/shared-core/radeon_drm.h
@@ -708,6 +708,7 @@ typedef struct drm_radeon_setparam {
#define RADEON_SETPARAM_PCIGART_LOCATION 3 /* PCI Gart Location */
#define RADEON_SETPARAM_NEW_MEMMAP 4 /* Use new memory map */
+#define RADEON_SETPARAM_PCIGART_TABLE_SIZE 5 /* PCI GART Table Size */
/* 1.14: Clients can allocate/free a surface
*/