get rid of superfluous fields in struct drm_radeon_ring_buffer

use correct address for ring read pointer writeback (yes, we seem to have
    been running with bogus values for the ring read pointer, which
    'worked' because the return value of radeon_wait_ring() is never
    checked and the ring usually never fills up)

1 files changed, 12 insertions, 11 deletions

diff --git a/shared-core/radeon_cp.c b/shared-core/radeon_cp.c
index c9e72413..fce148a0 100644
--- a/shared-core/radeon_cp.c
+++ b/shared-core/radeon_cp.c
@@ -771,7 +771,7 @@ static void radeon_do_cp_reset( drm_radeon_private_t *dev_priv )
 
 	cur_read_ptr = RADEON_READ( RADEON_CP_RB_RPTR );
 	RADEON_WRITE( RADEON_CP_RB_WPTR, cur_read_ptr );
-	*dev_priv->ring.head = cur_read_ptr;
+	SET_RING_HEAD( dev_priv, cur_read_ptr );
 	dev_priv->ring.tail = cur_read_ptr;
 }
 
@@ -883,13 +883,18 @@ static void radeon_cp_init_ring_buffer( drm_device_t *dev,
 	/* Initialize the ring buffer's read and write pointers */
 	cur_read_ptr = RADEON_READ( RADEON_CP_RB_RPTR );
 	RADEON_WRITE( RADEON_CP_RB_WPTR, cur_read_ptr );
-	*dev_priv->ring.head = cur_read_ptr;
+	SET_RING_HEAD( dev_priv, cur_read_ptr );
 	dev_priv->ring.tail = cur_read_ptr;
 
+#if __REALLY_HAVE_AGP
 	if ( !dev_priv->is_pci ) {
 		RADEON_WRITE( RADEON_CP_RB_RPTR_ADDR,
-			      dev_priv->ring_rptr->offset );
-	} else {
+			      dev_priv->ring_rptr->offset
+			      - dev->agp->base
+			      + dev_priv->agp_vm_start);
+	} else
+#endif
+	{
 		drm_sg_mem_t *entry = dev->sg;
 		unsigned long tmp_ofs, page_ofs;
 
@@ -914,7 +919,7 @@ static void radeon_cp_init_ring_buffer( drm_device_t *dev,
 					 + RADEON_SCRATCH_REG_OFFSET );
 
 	dev_priv->scratch = ((__volatile__ u32 *)
-			     dev_priv->ring.head +
+			     dev_priv->ring_rptr->handle +
 			     (RADEON_SCRATCH_REG_OFFSET / sizeof(u32)));
 
 	RADEON_WRITE( RADEON_SCRATCH_UMSK, 0x7 );
@@ -1194,9 +1199,6 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
 	DRM_DEBUG( "dev_priv->agp_buffers_offset 0x%lx\n",
 		   dev_priv->agp_buffers_offset );
 
-	dev_priv->ring.head = ((__volatile__ u32 *)
-			       dev_priv->ring_rptr->handle);
-
 	dev_priv->ring.start = (u32 *)dev_priv->cp_ring->handle;
 	dev_priv->ring.end = ((u32 *)dev_priv->cp_ring->handle
 			      + init->ring_size / sizeof(u32));
@@ -1207,7 +1209,6 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
 		(dev_priv->ring.size / sizeof(u32)) - 1;
 
 	dev_priv->ring.high_mark = RADEON_RING_HIGH_MARK;
-	dev_priv->ring.ring_rptr = dev_priv->ring_rptr;
 
 #if __REALLY_HAVE_SG
 	if ( dev_priv->is_pci ) {
@@ -1585,10 +1586,10 @@ int radeon_wait_ring( drm_radeon_private_t *dev_priv, int n )
 {
 	drm_radeon_ring_buffer_t *ring = &dev_priv->ring;
 	int i;
-	u32 last_head = GET_RING_HEAD(ring);
+	u32 last_head = GET_RING_HEAD( dev_priv );
 
 	for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
-		u32 head = GET_RING_HEAD(ring);
+		u32 head = GET_RING_HEAD( dev_priv );
 
 		ring->space = (head - ring->tail) * sizeof(u32);
 		if ( ring->space <= 0 )