diff options
| author | Eric Anholt <anholt@freebsd.org> | 2005-11-08 02:38:01 +0000 |
|---|---|---|
| committer | Eric Anholt <anholt@freebsd.org> | 2005-11-08 02:38:01 +0000 |
| commit | 1a256df4804e4e987f81226a5d8e0573363607ee (patch) | |
| tree | 31749f8042cfdd36260f195fb3af65c7bab46e51 /shared-core/radeon_cp.c | |
| parent | 145b23b55220bdfc6639d3279ad96310faa650a3 (diff) | |
Catch FreeBSD up to the pcie gart changes. Required minor modification to
radeon_cp.c to use a drm_local_map_t-type mapping (drm_core_ioremap
rather than drm_ioremap), which contains private device mapping
information on BSD. I also changed the ati_pcigart interface to use
"void *" for pointers to kva rather than "unsigned long". While PCIGART
support appears to be broken on FreeBSD currently, I think this is not
new, and BusType PCI remains working on my r100 in Linux.
Diffstat (limited to 'shared-core/radeon_cp.c')
| -rw-r--r-- | shared-core/radeon_cp.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/shared-core/radeon_cp.c b/shared-core/radeon_cp.c index 9b5c9a8f..30f63731 100644 --- a/shared-core/radeon_cp.c +++ b/shared-core/radeon_cp.c @@ -1541,16 +1541,20 @@ static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init) /* if we have an offset set from userspace */ if (dev_priv->pcigart_offset) { dev_priv->gart_info.bus_addr = dev_priv->pcigart_offset + dev_priv->fb_location; - dev_priv->gart_info.addr = (unsigned long)drm_ioremap(dev_priv->gart_info.bus_addr, RADEON_PCIGART_TABLE_SIZE, dev); + dev_priv->gart_info.mapping.offset = dev_priv->gart_info.bus_addr; + dev_priv->gart_info.mapping.size = RADEON_PCIGART_TABLE_SIZE; + drm_core_ioremap(&dev_priv->gart_info.mapping, dev); + dev_priv->gart_info.addr = dev_priv->gart_info.mapping.handle; dev_priv->gart_info.is_pcie = !!(dev_priv->flags & CHIP_IS_PCIE); dev_priv->gart_info.gart_table_location = DRM_ATI_GART_FB; - DRM_DEBUG("Setting phys_pci_gart to %08lX %08lX\n", dev_priv->gart_info.addr, dev_priv->pcigart_offset); + DRM_DEBUG("Setting phys_pci_gart to %p %08lX\n", dev_priv->gart_info.addr, dev_priv->pcigart_offset); } else { dev_priv->gart_info.gart_table_location = DRM_ATI_GART_MAIN; - dev_priv->gart_info.addr = dev_priv->gart_info.bus_addr= 0; + dev_priv->gart_info.addr = NULL; + dev_priv->gart_info.bus_addr = 0; if (dev_priv->flags & CHIP_IS_PCIE) { DRM_ERROR("Cannot use PCI Express without GART in FB memory\n"); @@ -1618,7 +1622,7 @@ static int radeon_do_cleanup_cp(drm_device_t * dev) if (dev_priv->gart_info.gart_table_location == DRM_ATI_GART_FB) { - drm_ioremapfree((void *)dev_priv->gart_info.addr, RADEON_PCIGART_TABLE_SIZE, dev); + drm_core_ioremapfree(&dev_priv->gart_info.mapping, dev); dev_priv->gart_info.addr = 0; } } |