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authorBen Skeggs <darktama@iinet.net.au>2007-01-28 23:48:33 +1100
committerBen Skeggs <darktama@iinet.net.au>2007-01-28 23:48:33 +1100
commitee4ac5c897faa499ad24c148b4f065bc770b529d (patch)
tree96a993e79f628539d47530d5f84fc3a62b4e59b6 /shared-core/nv30_graph.c
parentc744bfde2de1713f0c15a185538a003d64c52d80 (diff)
nouveau: determine chipset type at startup, instead of every time we use it.
Diffstat (limited to 'shared-core/nv30_graph.c')
-rw-r--r--shared-core/nv30_graph.c10
1 files changed, 3 insertions, 7 deletions
diff --git a/shared-core/nv30_graph.c b/shared-core/nv30_graph.c
index a5f01ea5..143fe965 100644
--- a/shared-core/nv30_graph.c
+++ b/shared-core/nv30_graph.c
@@ -107,10 +107,9 @@ int nv30_graph_context_create(drm_device_t *dev, int channel)
struct nouveau_fifo *chan = &dev_priv->fifos[channel];
void (*ctx_init)(drm_device_t *, struct mem_block *);
unsigned int ctx_size;
- int i, chipset;
+ int i;
- chipset = (NV_READ(NV_PMC_BOOT_0) & 0x0ff00000) >> 20;
- switch (chipset) {
+ switch (dev_priv->chipset) {
default:
ctx_size = NV30_GRCTX_SIZE;
ctx_init = nv30_graph_context_init;
@@ -137,10 +136,7 @@ int nv30_graph_init(drm_device_t *dev)
{
drm_nouveau_private_t *dev_priv =
(drm_nouveau_private_t *)dev->dev_private;
- int i, chipset;
-
- chipset = (NV_READ(NV_PMC_BOOT_0) & 0x0ff00000) >> 20;
- DRM_DEBUG("chipset (from PMC_BOOT_0): NV%02X\n", chipset);
+ int i;
/* Create Context Pointer Table */
dev_priv->ctx_table_size = 32 * 4;