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authorStuart Bennett <sb476@cam.ac.uk>2008-03-11 00:33:58 +0000
committerStuart Bennett <sb476@cam.ac.uk>2008-03-11 16:45:35 +0000
commitf13936f7fc4d4932d5c511ccec29f1c4d24dc2dc (patch)
tree73632d638fab2ebe755a6505bfd3b6ccee49962e /shared-core/nv04_mc.c
parent07ba3b7193f1a50c3ef0509f9e37dab41457f81b (diff)
nouveau: move AGP reset to mem_init_agp
Also, power cycle PGRAPH when resetting AGP -- it seems to fix problems encountered by p0g on nv25
Diffstat (limited to 'shared-core/nv04_mc.c')
-rw-r--r--shared-core/nv04_mc.c13
1 files changed, 0 insertions, 13 deletions
diff --git a/shared-core/nv04_mc.c b/shared-core/nv04_mc.c
index 766f3a33..24c1f7b3 100644
--- a/shared-core/nv04_mc.c
+++ b/shared-core/nv04_mc.c
@@ -7,25 +7,12 @@ int
nv04_mc_init(struct drm_device *dev)
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t saved_pci_nv_1, saved_pci_nv_19;
-
- saved_pci_nv_1 = NV_READ(NV04_PBUS_PCI_NV_1);
- saved_pci_nv_19 = NV_READ(NV04_PBUS_PCI_NV_19);
-
- /* clear busmaster bit */
- NV_WRITE(NV04_PBUS_PCI_NV_1, saved_pci_nv_1 & ~(0x00000001 << 2));
- /* clear SBA and AGP bits */
- NV_WRITE(NV04_PBUS_PCI_NV_19, saved_pci_nv_19 & 0xfffff0ff);
/* Power up everything, resetting each individual unit will
* be done later if needed.
*/
NV_WRITE(NV03_PMC_ENABLE, 0xFFFFFFFF);
- /* and restore (gives effect of resetting AGP) */
- NV_WRITE(NV04_PBUS_PCI_NV_19, saved_pci_nv_19);
- NV_WRITE(NV04_PBUS_PCI_NV_1, saved_pci_nv_1);
-
return 0;
}