diff options
| author | Ben Skeggs <skeggsb@gmail.com> | 2007-07-05 00:12:33 +1000 |
|---|---|---|
| committer | Ben Skeggs <skeggsb@gmail.com> | 2007-07-09 16:16:44 +1000 |
| commit | c806bba4665bb369168ee0b453fa28e2e0bf2a5d (patch) | |
| tree | c3ded5cfc4048301654769a6fa224c3abb57c707 /shared-core/nv04_graph.c | |
| parent | 3324342e42b78aef8e90e11273776dd2b3b92074 (diff) | |
nouveau/nv50: Initial channel/object support
Should be OK on G84 for a single channel, multiple channels *almost* work.
Untested on G80.
Diffstat (limited to 'shared-core/nv04_graph.c')
| -rw-r--r-- | shared-core/nv04_graph.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/shared-core/nv04_graph.c b/shared-core/nv04_graph.c index 1aaae33c..df23d279 100644 --- a/shared-core/nv04_graph.c +++ b/shared-core/nv04_graph.c @@ -309,7 +309,7 @@ void nouveau_nv04_context_switch(drm_device_t *dev) for (i = 0; i<sizeof(nv04_graph_ctx_regs)/sizeof(nv04_graph_ctx_regs[0]); i++) for (j = 0; j<nv04_graph_ctx_regs[i].number; j++) { - dev_priv->fifos[channel_old].pgraph_ctx[index] = NV_READ(nv04_graph_ctx_regs[i].reg+j*4); + dev_priv->fifos[channel_old]->pgraph_ctx[index] = NV_READ(nv04_graph_ctx_regs[i].reg+j*4); index++; } @@ -321,7 +321,7 @@ void nouveau_nv04_context_switch(drm_device_t *dev) for (i = 0; i<sizeof(nv04_graph_ctx_regs)/sizeof(nv04_graph_ctx_regs[0]); i++) for (j = 0; j<nv04_graph_ctx_regs[i].number; j++) { - NV_WRITE(nv04_graph_ctx_regs[i].reg+j*4, dev_priv->fifos[channel].pgraph_ctx[index]); + NV_WRITE(nv04_graph_ctx_regs[i].reg+j*4, dev_priv->fifos[channel]->pgraph_ctx[index]); index++; } @@ -340,10 +340,10 @@ int nv04_graph_create_context(drm_device_t *dev, int channel) { drm_nouveau_private_t *dev_priv = dev->dev_private; DRM_DEBUG("nv04_graph_context_create %d\n", channel); - memset(dev_priv->fifos[channel].pgraph_ctx, 0, sizeof(dev_priv->fifos[channel].pgraph_ctx)); + memset(dev_priv->fifos[channel]->pgraph_ctx, 0, sizeof(dev_priv->fifos[channel]->pgraph_ctx)); //dev_priv->fifos[channel].pgraph_ctx_user = channel << 24; - dev_priv->fifos[channel].pgraph_ctx[0] = 0x0001ffff; + dev_priv->fifos[channel]->pgraph_ctx[0] = 0x0001ffff; /* is it really needed ??? */ //dev_priv->fifos[channel].pgraph_ctx[1] = NV_READ(NV_PGRAPH_DEBUG_4); //dev_priv->fifos[channel].pgraph_ctx[2] = NV_READ(0x004006b0); @@ -379,7 +379,7 @@ int nv04_graph_init(drm_device_t *dev) { // check the context is big enough for ( i = 0 ; i<sizeof(nv04_graph_ctx_regs)/sizeof(nv04_graph_ctx_regs[0]); i++) sum+=nv04_graph_ctx_regs[i].number; - if ( sum*4>sizeof(dev_priv->fifos[0].pgraph_ctx) ) + if ( sum*4>sizeof(dev_priv->fifos[0]->pgraph_ctx) ) DRM_ERROR("pgraph_ctx too small\n"); NV_WRITE(NV03_PGRAPH_INTR_EN, 0x00000000); |