diff options
| author | Ben Skeggs <skeggsb@gmail.com> | 2007-03-26 19:43:48 +1000 |
|---|---|---|
| committer | Ben Skeggs <skeggsb@gmail.com> | 2007-03-26 20:59:37 +1000 |
| commit | 674cefd4fe4b537a20a10edcb4ec5df55facca8e (patch) | |
| tree | a4df293b2fd8b5224821faa537f2631342f7407c /shared-core/nv04_graph.c | |
| parent | 5ad43f46759ff1eb473c9101e7de0d46a4ed8177 (diff) | |
nouveau: move card initialisation into the drm
The PGRAPH init for the various cards will need cleaning up at some point,
a lot of the values written there are per-context state left over from the
all the hardcoding done in the ddx.
It's possible some cards get broken by this commit, let me know.
Tested on: NV5, NV18, NV28, NV35, NV40, NV4E
Diffstat (limited to 'shared-core/nv04_graph.c')
| -rw-r--r-- | shared-core/nv04_graph.c | 33 |
1 files changed, 32 insertions, 1 deletions
diff --git a/shared-core/nv04_graph.c b/shared-core/nv04_graph.c index 830d673e..cf4e58f6 100644 --- a/shared-core/nv04_graph.c +++ b/shared-core/nv04_graph.c @@ -222,13 +222,44 @@ int nv04_graph_context_create(drm_device_t *dev, int channel) { int nv04_graph_init(drm_device_t *dev) { drm_nouveau_private_t *dev_priv = dev->dev_private; + int i,sum=0; + + NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) & + ~NV_PMC_ENABLE_PGRAPH); + NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) | + NV_PMC_ENABLE_PGRAPH); // check the context is big enough - int i,sum=0; for ( i = 0 ; i<sizeof(nv04_graph_ctx_regs)/sizeof(nv04_graph_ctx_regs[0]); i++) sum+=nv04_graph_ctx_regs[i].number; if ( sum*4>sizeof(dev_priv->fifos[0].pgraph_ctx) ) DRM_ERROR("pgraph_ctx too small\n"); + + NV_WRITE(NV03_PGRAPH_INTR_EN, 0x00000000); + NV_WRITE(NV03_PGRAPH_INTR , 0xFFFFFFFF); + + NV_WRITE(NV04_PGRAPH_DEBUG_0, 0x000001FF); + NV_WRITE(NV04_PGRAPH_DEBUG_0, 0x1230C000); + NV_WRITE(NV04_PGRAPH_DEBUG_1, 0x72111101); + NV_WRITE(NV04_PGRAPH_DEBUG_2, 0x11D5F071); + NV_WRITE(NV04_PGRAPH_DEBUG_3, 0x0004FF31); + NV_WRITE(NV04_PGRAPH_DEBUG_3, 0x4004FF31 | + (0x00D00000) | + (1<<29) | + (1<<31)); + + NV_WRITE(NV04_PGRAPH_STATE , 0xFFFFFFFF); + NV_WRITE(NV04_PGRAPH_CTX_CONTROL , 0x10010100); + NV_WRITE(NV04_PGRAPH_FIFO , 0x00000001); + + /* These don't belong here, they're part of a per-channel context */ + NV_WRITE(NV04_PGRAPH_PATTERN_SHAPE, 0x00000000); + NV_WRITE(NV04_PGRAPH_BETA_AND , 0xFFFFFFFF); + return 0; } +void nv04_graph_takedown(drm_device_t *dev) +{ +} + |