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authorIan Romanick <idr@us.ibm.com>2007-07-12 15:28:17 -0700
committerIan Romanick <idr@us.ibm.com>2007-07-12 15:28:17 -0700
commit5522136b7f01402ae02cbe35180e3d80f850a6b3 (patch)
tree275da77af4df8b332f17cb503a4b58b608de8620 /shared-core/nouveau_state.c
parent76ca1e858fb8e1a65ea49c0c62350d7ca91044a2 (diff)
parent851c950d988e5a47fa6add71427e5ef8d4dcf231 (diff)
Merge branch 'master' into xgi-0-0-2
Diffstat (limited to 'shared-core/nouveau_state.c')
-rw-r--r--shared-core/nouveau_state.c272
1 files changed, 210 insertions, 62 deletions
diff --git a/shared-core/nouveau_state.c b/shared-core/nouveau_state.c
index e7930b9e..fe3db168 100644
--- a/shared-core/nouveau_state.c
+++ b/shared-core/nouveau_state.c
@@ -51,6 +51,7 @@ static int nouveau_init_card_mappings(drm_device_t *dev)
DRM_DEBUG("regs mapped ok at 0x%lx\n", dev_priv->mmio->offset);
/* map larger RAMIN aperture on NV40 cards */
+ dev_priv->ramin = NULL;
if (dev_priv->card_type >= NV_40) {
int ramin_resource = 2;
if (drm_get_resource_len(dev, ramin_resource) == 0)
@@ -66,12 +67,26 @@ static int nouveau_init_card_mappings(drm_device_t *dev)
"limited instance memory available\n");
dev_priv->ramin = NULL;
}
- } else
- dev_priv->ramin = NULL;
+ }
+
+ /* On older cards (or if the above failed), create a map covering
+ * the BAR0 PRAMIN aperture */
+ if (!dev_priv->ramin) {
+ ret = drm_addmap(dev,
+ drm_get_resource_start(dev, 0) + NV_RAMIN,
+ (1*1024*1024),
+ _DRM_REGISTERS, _DRM_READ_ONLY,
+ &dev_priv->ramin);
+ if (ret) {
+ DRM_ERROR("Failed to map BAR0 PRAMIN: %d\n", ret);
+ return ret;
+ }
+ }
return 0;
}
+static int nouveau_stub_init(drm_device_t *dev) { return 0; }
static void nouveau_stub_takedown(drm_device_t *dev) {}
static int nouveau_init_engine_ptrs(drm_device_t *dev)
{
@@ -80,66 +95,162 @@ static int nouveau_init_engine_ptrs(drm_device_t *dev)
switch (dev_priv->chipset & 0xf0) {
case 0x00:
- engine->Mc.Init = nv04_mc_init;
- engine->Mc.Takedown = nv04_mc_takedown;
- engine->Timer.Init = nv04_timer_init;
- engine->Timer.Takedown = nv04_timer_takedown;
- engine->Fb.Init = nv04_fb_init;
- engine->Fb.Takedown = nv04_fb_takedown;
- engine->Graph.Init = nv04_graph_init;
- engine->Graph.Takedown = nv04_graph_takedown;
- engine->Fifo.Init = nouveau_fifo_init;
- engine->Fifo.Takedown = nouveau_stub_takedown;
+ engine->instmem.init = nv04_instmem_init;
+ engine->instmem.takedown= nv04_instmem_takedown;
+ engine->instmem.populate = nv04_instmem_populate;
+ engine->instmem.clear = nv04_instmem_clear;
+ engine->instmem.bind = nv04_instmem_bind;
+ engine->instmem.unbind = nv04_instmem_unbind;
+ engine->mc.init = nv04_mc_init;
+ engine->mc.takedown = nv04_mc_takedown;
+ engine->timer.init = nv04_timer_init;
+ engine->timer.takedown = nv04_timer_takedown;
+ engine->fb.init = nv04_fb_init;
+ engine->fb.takedown = nv04_fb_takedown;
+ engine->graph.init = nv04_graph_init;
+ engine->graph.takedown = nv04_graph_takedown;
+ engine->graph.create_context = nv04_graph_create_context;
+ engine->graph.destroy_context = nv04_graph_destroy_context;
+ engine->graph.load_context = nv04_graph_load_context;
+ engine->graph.save_context = nv04_graph_save_context;
+ engine->fifo.init = nouveau_fifo_init;
+ engine->fifo.takedown = nouveau_stub_takedown;
+ engine->fifo.create_context = nv04_fifo_create_context;
+ engine->fifo.destroy_context = nv04_fifo_destroy_context;
+ engine->fifo.load_context = nv04_fifo_load_context;
+ engine->fifo.save_context = nv04_fifo_save_context;
break;
case 0x10:
- engine->Mc.Init = nv04_mc_init;
- engine->Mc.Takedown = nv04_mc_takedown;
- engine->Timer.Init = nv04_timer_init;
- engine->Timer.Takedown = nv04_timer_takedown;
- engine->Fb.Init = nv10_fb_init;
- engine->Fb.Takedown = nv10_fb_takedown;
- engine->Graph.Init = nv10_graph_init;
- engine->Graph.Takedown = nv10_graph_takedown;
- engine->Fifo.Init = nouveau_fifo_init;
- engine->Fifo.Takedown = nouveau_stub_takedown;
+ engine->instmem.init = nv04_instmem_init;
+ engine->instmem.takedown= nv04_instmem_takedown;
+ engine->instmem.populate = nv04_instmem_populate;
+ engine->instmem.clear = nv04_instmem_clear;
+ engine->instmem.bind = nv04_instmem_bind;
+ engine->instmem.unbind = nv04_instmem_unbind;
+ engine->mc.init = nv04_mc_init;
+ engine->mc.takedown = nv04_mc_takedown;
+ engine->timer.init = nv04_timer_init;
+ engine->timer.takedown = nv04_timer_takedown;
+ engine->fb.init = nv10_fb_init;
+ engine->fb.takedown = nv10_fb_takedown;
+ engine->graph.init = nv10_graph_init;
+ engine->graph.takedown = nv10_graph_takedown;
+ engine->graph.create_context = nv10_graph_create_context;
+ engine->graph.destroy_context = nv10_graph_destroy_context;
+ engine->graph.load_context = nv10_graph_load_context;
+ engine->graph.save_context = nv10_graph_save_context;
+ engine->fifo.init = nouveau_fifo_init;
+ engine->fifo.takedown = nouveau_stub_takedown;
+ engine->fifo.create_context = nv10_fifo_create_context;
+ engine->fifo.destroy_context = nv10_fifo_destroy_context;
+ engine->fifo.load_context = nv10_fifo_load_context;
+ engine->fifo.save_context = nv10_fifo_save_context;
break;
case 0x20:
- engine->Mc.Init = nv04_mc_init;
- engine->Mc.Takedown = nv04_mc_takedown;
- engine->Timer.Init = nv04_timer_init;
- engine->Timer.Takedown = nv04_timer_takedown;
- engine->Fb.Init = nv10_fb_init;
- engine->Fb.Takedown = nv10_fb_takedown;
- engine->Graph.Init = nv20_graph_init;
- engine->Graph.Takedown = nv20_graph_takedown;
- engine->Fifo.Init = nouveau_fifo_init;
- engine->Fifo.Takedown = nouveau_stub_takedown;
+ engine->instmem.init = nv04_instmem_init;
+ engine->instmem.takedown= nv04_instmem_takedown;
+ engine->instmem.populate = nv04_instmem_populate;
+ engine->instmem.clear = nv04_instmem_clear;
+ engine->instmem.bind = nv04_instmem_bind;
+ engine->instmem.unbind = nv04_instmem_unbind;
+ engine->mc.init = nv04_mc_init;
+ engine->mc.takedown = nv04_mc_takedown;
+ engine->timer.init = nv04_timer_init;
+ engine->timer.takedown = nv04_timer_takedown;
+ engine->fb.init = nv10_fb_init;
+ engine->fb.takedown = nv10_fb_takedown;
+ engine->graph.init = nv20_graph_init;
+ engine->graph.takedown = nv20_graph_takedown;
+ engine->graph.create_context = nv20_graph_create_context;
+ engine->graph.destroy_context = nv20_graph_destroy_context;
+ engine->graph.load_context = nv20_graph_load_context;
+ engine->graph.save_context = nv20_graph_save_context;
+ engine->fifo.init = nouveau_fifo_init;
+ engine->fifo.takedown = nouveau_stub_takedown;
+ engine->fifo.create_context = nv10_fifo_create_context;
+ engine->fifo.destroy_context = nv10_fifo_destroy_context;
+ engine->fifo.load_context = nv10_fifo_load_context;
+ engine->fifo.save_context = nv10_fifo_save_context;
break;
case 0x30:
- engine->Mc.Init = nv04_mc_init;
- engine->Mc.Takedown = nv04_mc_takedown;
- engine->Timer.Init = nv04_timer_init;
- engine->Timer.Takedown = nv04_timer_takedown;
- engine->Fb.Init = nv10_fb_init;
- engine->Fb.Takedown = nv10_fb_takedown;
- engine->Graph.Init = nv30_graph_init;
- engine->Graph.Takedown = nv30_graph_takedown;
- engine->Fifo.Init = nouveau_fifo_init;
- engine->Fifo.Takedown = nouveau_stub_takedown;
+ engine->instmem.init = nv04_instmem_init;
+ engine->instmem.takedown= nv04_instmem_takedown;
+ engine->instmem.populate = nv04_instmem_populate;
+ engine->instmem.clear = nv04_instmem_clear;
+ engine->instmem.bind = nv04_instmem_bind;
+ engine->instmem.unbind = nv04_instmem_unbind;
+ engine->mc.init = nv04_mc_init;
+ engine->mc.takedown = nv04_mc_takedown;
+ engine->timer.init = nv04_timer_init;
+ engine->timer.takedown = nv04_timer_takedown;
+ engine->fb.init = nv10_fb_init;
+ engine->fb.takedown = nv10_fb_takedown;
+ engine->graph.init = nv30_graph_init;
+ engine->graph.takedown = nv30_graph_takedown;
+ engine->graph.create_context = nv30_graph_create_context;
+ engine->graph.destroy_context = nv30_graph_destroy_context;
+ engine->graph.load_context = nv30_graph_load_context;
+ engine->graph.save_context = nv30_graph_save_context;
+ engine->fifo.init = nouveau_fifo_init;
+ engine->fifo.takedown = nouveau_stub_takedown;
+ engine->fifo.create_context = nv10_fifo_create_context;
+ engine->fifo.destroy_context = nv10_fifo_destroy_context;
+ engine->fifo.load_context = nv10_fifo_load_context;
+ engine->fifo.save_context = nv10_fifo_save_context;
break;
case 0x40:
- engine->Mc.Init = nv40_mc_init;
- engine->Mc.Takedown = nv40_mc_takedown;
- engine->Timer.Init = nv04_timer_init;
- engine->Timer.Takedown = nv04_timer_takedown;
- engine->Fb.Init = nv40_fb_init;
- engine->Fb.Takedown = nv40_fb_takedown;
- engine->Graph.Init = nv40_graph_init;
- engine->Graph.Takedown = nv40_graph_takedown;
- engine->Fifo.Init = nouveau_fifo_init;
- engine->Fifo.Takedown = nouveau_stub_takedown;
+ engine->instmem.init = nv04_instmem_init;
+ engine->instmem.takedown= nv04_instmem_takedown;
+ engine->instmem.populate = nv04_instmem_populate;
+ engine->instmem.clear = nv04_instmem_clear;
+ engine->instmem.bind = nv04_instmem_bind;
+ engine->instmem.unbind = nv04_instmem_unbind;
+ engine->mc.init = nv40_mc_init;
+ engine->mc.takedown = nv40_mc_takedown;
+ engine->timer.init = nv04_timer_init;
+ engine->timer.takedown = nv04_timer_takedown;
+ engine->fb.init = nv40_fb_init;
+ engine->fb.takedown = nv40_fb_takedown;
+ engine->graph.init = nv40_graph_init;
+ engine->graph.takedown = nv40_graph_takedown;
+ engine->graph.create_context = nv40_graph_create_context;
+ engine->graph.destroy_context = nv40_graph_destroy_context;
+ engine->graph.load_context = nv40_graph_load_context;
+ engine->graph.save_context = nv40_graph_save_context;
+ engine->fifo.init = nouveau_fifo_init;
+ engine->fifo.takedown = nouveau_stub_takedown;
+ engine->fifo.create_context = nv40_fifo_create_context;
+ engine->fifo.destroy_context = nv40_fifo_destroy_context;
+ engine->fifo.load_context = nv40_fifo_load_context;
+ engine->fifo.save_context = nv40_fifo_save_context;
break;
case 0x50:
+ case 0x80: /* gotta love NVIDIA's consistency.. */
+ engine->instmem.init = nv50_instmem_init;
+ engine->instmem.takedown= nv50_instmem_takedown;
+ engine->instmem.populate = nv50_instmem_populate;
+ engine->instmem.clear = nv50_instmem_clear;
+ engine->instmem.bind = nv50_instmem_bind;
+ engine->instmem.unbind = nv50_instmem_unbind;
+ engine->mc.init = nv50_mc_init;
+ engine->mc.takedown = nv50_mc_takedown;
+ engine->timer.init = nouveau_stub_init;
+ engine->timer.takedown = nouveau_stub_takedown;
+ engine->fb.init = nouveau_stub_init;
+ engine->fb.takedown = nouveau_stub_takedown;
+ engine->graph.init = nv50_graph_init;
+ engine->graph.takedown = nv50_graph_takedown;
+ engine->graph.create_context = nv50_graph_create_context;
+ engine->graph.destroy_context = nv50_graph_destroy_context;
+ engine->graph.load_context = nv50_graph_load_context;
+ engine->graph.save_context = nv50_graph_save_context;
+ engine->fifo.init = nv50_fifo_init;
+ engine->fifo.takedown = nv50_fifo_takedown;
+ engine->fifo.create_context = nv50_fifo_create_context;
+ engine->fifo.destroy_context = nv50_fifo_destroy_context;
+ engine->fifo.load_context = nv50_fifo_load_context;
+ engine->fifo.save_context = nv50_fifo_save_context;
+ break;
default:
DRM_ERROR("NV%02x unsupported\n", dev_priv->chipset);
return 1;
@@ -169,12 +280,13 @@ static int nouveau_card_init(drm_device_t *dev)
ret = nouveau_init_engine_ptrs(dev);
if (ret) return ret;
engine = &dev_priv->Engine;
+ dev_priv->init_state = NOUVEAU_CARD_INIT_FAILED;
/* Initialise instance memory, must happen before mem_init so we
* know exactly how much VRAM we're able to use for "normal"
* purposes.
*/
- ret = nouveau_instmem_init(dev);
+ ret = engine->instmem.init(dev);
if (ret) return ret;
/* Setup the memory manager */
@@ -184,38 +296,59 @@ static int nouveau_card_init(drm_device_t *dev)
/* Parse BIOS tables / Run init tables? */
/* PMC */
- ret = engine->Mc.Init(dev);
+ ret = engine->mc.init(dev);
if (ret) return ret;
/* PTIMER */
- ret = engine->Timer.Init(dev);
+ ret = engine->timer.init(dev);
if (ret) return ret;
/* PFB */
- ret = engine->Fb.Init(dev);
+ ret = engine->fb.init(dev);
if (ret) return ret;
/* PGRAPH */
- ret = engine->Graph.Init(dev);
+ ret = engine->graph.init(dev);
if (ret) return ret;
/* PFIFO */
- ret = engine->Fifo.Init(dev);
+ ret = engine->fifo.init(dev);
if (ret) return ret;
/* what about PVIDEO/PCRTC/PRAMDAC etc? */
+ dev_priv->init_state = NOUVEAU_CARD_INIT_DONE;
return 0;
}
+static void nouveau_card_takedown(drm_device_t *dev)
+{
+ drm_nouveau_private_t *dev_priv = dev->dev_private;
+ nouveau_engine_func_t *engine = &dev_priv->Engine;
+
+ if (dev_priv->init_state != NOUVEAU_CARD_INIT_DOWN) {
+ engine->fifo.takedown(dev);
+ engine->graph.takedown(dev);
+ engine->fb.takedown(dev);
+ engine->timer.takedown(dev);
+ engine->mc.takedown(dev);
+ nouveau_gpuobj_takedown(dev);
+ nouveau_mem_close(dev);
+ engine->instmem.takedown(dev);
+
+ dev_priv->init_state = NOUVEAU_CARD_INIT_DOWN;
+ }
+}
+
/* here a client dies, release the stuff that was allocated for its filp */
void nouveau_preclose(drm_device_t * dev, DRMFILE filp)
{
drm_nouveau_private_t *dev_priv = dev->dev_private;
+ nouveau_fifo_cleanup(dev, filp);
nouveau_mem_release(filp,dev_priv->fb_heap);
nouveau_mem_release(filp,dev_priv->agp_heap);
- nouveau_fifo_cleanup(dev, filp);
+ nouveau_mem_release(filp,dev_priv->pci_heap);
}
/* first module load, setup the mmio/fb mapping */
@@ -235,18 +368,17 @@ int nouveau_firstopen(struct drm_device *dev)
int nouveau_load(struct drm_device *dev, unsigned long flags)
{
drm_nouveau_private_t *dev_priv;
- int ret;
if (flags==NV_UNKNOWN)
return DRM_ERR(EINVAL);
- dev_priv = drm_alloc(sizeof(drm_nouveau_private_t), DRM_MEM_DRIVER);
+ dev_priv = drm_calloc(1, sizeof(*dev_priv), DRM_MEM_DRIVER);
if (!dev_priv)
return DRM_ERR(ENOMEM);
- memset(dev_priv, 0, sizeof(drm_nouveau_private_t));
dev_priv->card_type=flags&NOUVEAU_FAMILY;
dev_priv->flags=flags&NOUVEAU_FLAGS;
+ dev_priv->init_state = NOUVEAU_CARD_INIT_DOWN;
dev->dev_private = (void *)dev_priv;
@@ -264,6 +396,9 @@ int nouveau_load(struct drm_device *dev, unsigned long flags)
void nouveau_lastclose(struct drm_device *dev)
{
drm_nouveau_private_t *dev_priv = dev->dev_private;
+
+ nouveau_card_takedown(dev);
+
if(dev_priv->fb_mtrr>0)
{
drm_mtrr_del(dev_priv->fb_mtrr, drm_get_resource_start(dev, 1),nouveau_mem_fb_amount(dev), DRM_MTRR_WC);
@@ -308,6 +443,15 @@ int nouveau_ioctl_getparam(DRM_IOCTL_ARGS)
case NOUVEAU_GETPARAM_AGP_PHYSICAL:
getparam.value=dev_priv->agp_phys;
break;
+ case NOUVEAU_GETPARAM_PCI_PHYSICAL:
+ if ( dev -> sg )
+ getparam.value=(uint64_t) dev->sg->virtual;
+ else
+ {
+ DRM_ERROR("Requested PCIGART address, while no PCIGART was created\n");
+ return DRM_ERR(EINVAL);
+ }
+ break;
case NOUVEAU_GETPARAM_FB_SIZE:
getparam.value=dev_priv->fb_available_size;
break;
@@ -338,6 +482,8 @@ int nouveau_ioctl_setparam(DRM_IOCTL_ARGS)
switch (setparam.value) {
case NOUVEAU_MEM_AGP:
case NOUVEAU_MEM_FB:
+ case NOUVEAU_MEM_PCI:
+ case NOUVEAU_MEM_AGP | NOUVEAU_MEM_PCI_ACCEPTABLE:
break;
default:
DRM_ERROR("invalid CMDBUF_LOCATION value=%lld\n",
@@ -366,6 +512,8 @@ void nouveau_wait_for_idle(struct drm_device *dev)
case NV_03:
while(NV_READ(NV03_PGRAPH_STATUS));
break;
+ case NV_50:
+ break;
default:
while(NV_READ(NV04_PGRAPH_STATUS));
break;