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authorArthur Huillet <arthur.huillet@free.fr>2007-07-11 02:35:10 +0200
committerArthur Huillet <arthur.huillet@free.fr>2007-07-11 02:35:10 +0200
commit694e1c5c3f768436651ddf95e11ab5a89ccc8ffa (patch)
treea33f5d701987ee5a78e749a331fa376c8453fff4 /shared-core/nouveau_fifo.c
parent04e4922c0c407a9f0cfe268f62130891e98fc682 (diff)
Added support for PCIGART for PCI(E) cards. Bumped DRM interface patchlevel.
Diffstat (limited to 'shared-core/nouveau_fifo.c')
-rw-r--r--shared-core/nouveau_fifo.c18
1 files changed, 13 insertions, 5 deletions
diff --git a/shared-core/nouveau_fifo.c b/shared-core/nouveau_fifo.c
index 4095a57f..bc3a9948 100644
--- a/shared-core/nouveau_fifo.c
+++ b/shared-core/nouveau_fifo.c
@@ -210,11 +210,19 @@ nouveau_fifo_cmdbuf_alloc(struct drm_device *dev, int channel)
}
if (cb->flags & NOUVEAU_MEM_AGP) {
- ret = nouveau_gpuobj_dma_new
- (dev, channel, NV_CLASS_DMA_IN_MEMORY,
- cb->start - dev_priv->agp_phys,
- cb->size, NV_DMA_ACCESS_RO, NV_DMA_TARGET_AGP,
- &pushbuf);
+ DRM_DEBUG("Creating CB in AGP memory\n");
+ ret = nouveau_gpuobj_dma_new(dev, channel,
+ NV_CLASS_DMA_IN_MEMORY,
+ cb->start - dev_priv->agp_phys,
+ cb->size,
+ NV_DMA_ACCESS_RO, NV_DMA_TARGET_AGP, &pushbuf);
+ } else if ( cb->flags & NOUVEAU_MEM_PCI) {
+ DRM_DEBUG("Creating CB in PCI memory starting at virt 0x%08llx size %d\n", cb->start, cb->size);
+ ret = nouveau_gpuobj_dma_new(dev, channel,
+ NV_CLASS_DMA_IN_MEMORY,
+ cb->start,
+ cb->size,
+ NV_DMA_ACCESS_RO, NV_DMA_TARGET_PCI_NONLINEAR, &pushbuf);
} else if (dev_priv->card_type != NV_04) {
ret = nouveau_gpuobj_dma_new
(dev, channel, NV_CLASS_DMA_IN_MEMORY,