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authorJesse Barnes <jbarnes@jbarnes-mobile.amr.corp.intel.com>2007-09-24 14:41:46 -0700
committerJesse Barnes <jbarnes@jbarnes-mobile.amr.corp.intel.com>2007-09-24 14:41:46 -0700
commit5cc3083179b19678456905a9122a3d0f04e6f623 (patch)
tree9b776bdd317aa5af68b7cbf8fabde12e20eccf8a /shared-core/nouveau_drm.h
parent2a2d02bbc500140a861380df52ce66abcac39312 (diff)
parent54df1b9ff3b79097fedd8ed7bf54aca30a660cbd (diff)
Merge branch 'master' into modesetting-101 - TTM & typedef removal
Conflicts: linux-core/drmP.h linux-core/drm_bo.c linux-core/drm_drv.c linux-core/drm_objects.h shared-core/drm.h shared-core/i915_dma.c shared-core/i915_drv.h shared-core/i915_irq.c Mostly removing typedefs that snuck into the modesetting code and updating to the latest TTM APIs. As of today, the i915 driver builds, but there are likely to be problems, so debugging and bugfixes will come next.
Diffstat (limited to 'shared-core/nouveau_drm.h')
-rw-r--r--shared-core/nouveau_drm.h98
1 files changed, 53 insertions, 45 deletions
diff --git a/shared-core/nouveau_drm.h b/shared-core/nouveau_drm.h
index 0758991a..c4f1e9a4 100644
--- a/shared-core/nouveau_drm.h
+++ b/shared-core/nouveau_drm.h
@@ -25,9 +25,9 @@
#ifndef __NOUVEAU_DRM_H__
#define __NOUVEAU_DRM_H__
-#define NOUVEAU_DRM_HEADER_PATCHLEVEL 7
+#define NOUVEAU_DRM_HEADER_PATCHLEVEL 10
-typedef struct drm_nouveau_fifo_alloc {
+struct drm_nouveau_channel_alloc {
uint32_t fb_ctxdma_handle;
uint32_t tt_ctxdma_handle;
@@ -42,50 +42,58 @@ typedef struct drm_nouveau_fifo_alloc {
/* Notifier memory */
drm_handle_t notifier;
int notifier_size;
-}
-drm_nouveau_fifo_alloc_t;
+};
+
+struct drm_nouveau_channel_free {
+ int channel;
+};
-typedef struct drm_nouveau_grobj_alloc {
+struct drm_nouveau_grobj_alloc {
int channel;
uint32_t handle;
int class;
-}
-drm_nouveau_grobj_alloc_t;
+};
#define NOUVEAU_MEM_ACCESS_RO 1
#define NOUVEAU_MEM_ACCESS_WO 2
#define NOUVEAU_MEM_ACCESS_RW 3
-typedef struct drm_nouveau_notifier_alloc {
+struct drm_nouveau_notifierobj_alloc {
int channel;
uint32_t handle;
int count;
uint32_t offset;
-}
-drm_nouveau_notifier_alloc_t;
+};
+
+struct drm_nouveau_gpuobj_free {
+ int channel;
+ uint32_t handle;
+};
#define NOUVEAU_MEM_FB 0x00000001
#define NOUVEAU_MEM_AGP 0x00000002
#define NOUVEAU_MEM_FB_ACCEPTABLE 0x00000004
#define NOUVEAU_MEM_AGP_ACCEPTABLE 0x00000008
-#define NOUVEAU_MEM_PINNED 0x00000010
-#define NOUVEAU_MEM_USER_BACKED 0x00000020
-#define NOUVEAU_MEM_MAPPED 0x00000040
-#define NOUVEAU_MEM_INSTANCE 0x00000080 /* internal */
-#define NOUVEAU_MEM_NOTIFIER 0x00000100 /* internal */
-typedef struct drm_nouveau_mem_alloc {
+#define NOUVEAU_MEM_PCI 0x00000010
+#define NOUVEAU_MEM_PCI_ACCEPTABLE 0x00000020
+#define NOUVEAU_MEM_PINNED 0x00000040
+#define NOUVEAU_MEM_USER_BACKED 0x00000080
+#define NOUVEAU_MEM_MAPPED 0x00000100
+#define NOUVEAU_MEM_INSTANCE 0x00000200 /* internal */
+#define NOUVEAU_MEM_NOTIFIER 0x00000400 /* internal */
+
+struct drm_nouveau_mem_alloc {
int flags;
int alignment;
uint64_t size; // in bytes
- uint64_t region_offset;
-}
-drm_nouveau_mem_alloc_t;
+ uint64_t offset;
+ drm_handle_t map_handle;
+};
-typedef struct drm_nouveau_mem_free {
- uint64_t region_offset;
+struct drm_nouveau_mem_free {
+ uint64_t offset;
int flags;
-}
-drm_nouveau_mem_free_t;
+};
/* FIXME : maybe unify {GET,SET}PARAMs */
#define NOUVEAU_GETPARAM_PCI_VENDOR 3
@@ -95,29 +103,27 @@ drm_nouveau_mem_free_t;
#define NOUVEAU_GETPARAM_AGP_PHYSICAL 7
#define NOUVEAU_GETPARAM_FB_SIZE 8
#define NOUVEAU_GETPARAM_AGP_SIZE 9
-typedef struct drm_nouveau_getparam {
+#define NOUVEAU_GETPARAM_PCI_PHYSICAL 10
+#define NOUVEAU_GETPARAM_CHIPSET_ID 11
+struct drm_nouveau_getparam {
uint64_t param;
uint64_t value;
-}
-drm_nouveau_getparam_t;
+};
#define NOUVEAU_SETPARAM_CMDBUF_LOCATION 1
#define NOUVEAU_SETPARAM_CMDBUF_SIZE 2
-typedef struct drm_nouveau_setparam {
+struct drm_nouveau_setparam {
uint64_t param;
uint64_t value;
-}
-drm_nouveau_setparam_t;
+};
enum nouveau_card_type {
NV_UNKNOWN =0,
- NV_01 =1,
- NV_03 =3,
NV_04 =4,
NV_05 =5,
NV_10 =10,
- NV_11 =10,
- NV_15 =10,
+ NV_11 =11,
+ NV_15 =11,
NV_17 =17,
NV_20 =20,
NV_25 =20,
@@ -137,20 +143,22 @@ enum nouveau_bus_type {
#define NOUVEAU_MAX_SAREA_CLIPRECTS 16
-typedef struct drm_nouveau_sarea {
+struct drm_nouveau_sarea {
/* the cliprects */
- drm_clip_rect_t boxes[NOUVEAU_MAX_SAREA_CLIPRECTS];
+ struct drm_clip_rect boxes[NOUVEAU_MAX_SAREA_CLIPRECTS];
unsigned int nbox;
-}
-drm_nouveau_sarea_t;
-
-#define DRM_NOUVEAU_FIFO_ALLOC 0x00
-#define DRM_NOUVEAU_GROBJ_ALLOC 0x01
-#define DRM_NOUVEAU_NOTIFIER_ALLOC 0x02
-#define DRM_NOUVEAU_MEM_ALLOC 0x03
-#define DRM_NOUVEAU_MEM_FREE 0x04
-#define DRM_NOUVEAU_GETPARAM 0x05
-#define DRM_NOUVEAU_SETPARAM 0x06
+};
+
+#define DRM_NOUVEAU_CARD_INIT 0x00
+#define DRM_NOUVEAU_GETPARAM 0x01
+#define DRM_NOUVEAU_SETPARAM 0x02
+#define DRM_NOUVEAU_CHANNEL_ALLOC 0x03
+#define DRM_NOUVEAU_CHANNEL_FREE 0x04
+#define DRM_NOUVEAU_GROBJ_ALLOC 0x05
+#define DRM_NOUVEAU_NOTIFIEROBJ_ALLOC 0x06
+#define DRM_NOUVEAU_GPUOBJ_FREE 0x07
+#define DRM_NOUVEAU_MEM_ALLOC 0x08
+#define DRM_NOUVEAU_MEM_FREE 0x09
#endif /* __NOUVEAU_DRM_H__ */