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authorKeith Packard <keithp@keithp.com>2008-06-24 13:39:25 -0700
committerKeith Packard <keithp@keithp.com>2008-06-24 13:39:25 -0700
commitd250a55fc6a726a8bfaf4f871eeb09c895a9ba51 (patch)
tree1174d9bc61c6a0b3f0d587a4ae536e9cecbabe85 /shared-core/i915_irq.c
parente36da6a133328a4cf9c98d9347c87dc3c3a12d16 (diff)
[intel] Get vblank pipe from irq_mask_reg instead of hardware enable reg
With the interrupt enable/disable using only the mask register, it was wrong to use the enable register to detect which pipes had vblank detection turned on. Also, as we keep a local copy of the mask register around, and MSI machines smack the hardware during the interrupt handler, it is more efficient and more correct to use the local copy.
Diffstat (limited to 'shared-core/i915_irq.c')
-rw-r--r--shared-core/i915_irq.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/shared-core/i915_irq.c b/shared-core/i915_irq.c
index 710b2896..f09ae5f7 100644
--- a/shared-core/i915_irq.c
+++ b/shared-core/i915_irq.c
@@ -794,14 +794,15 @@ int i915_vblank_pipe_get(struct drm_device *dev, void *data,
{
drm_i915_private_t *dev_priv = dev->dev_private;
drm_i915_vblank_pipe_t *pipe = data;
- u16 flag;
+ u32 flag = 0;
if (!dev_priv) {
DRM_ERROR("called with no initialization\n");
return -EINVAL;
}
- flag = I915_READ(I915REG_INT_ENABLE_R);
+ if (dev_priv->irq_enabled)
+ flag = ~dev_priv->irq_mask_reg;
pipe->pipe = 0;
if (flag & I915_DISPLAY_PIPE_A_EVENT_INTERRUPT)
pipe->pipe |= DRM_I915_VBLANK_PIPE_A;