diff options
| author | Jesse Barnes <jesse.barnes@intel.com> | 2007-09-12 08:55:33 -0700 |
|---|---|---|
| committer | Jesse Barnes <jesse.barnes@intel.com> | 2007-09-12 08:55:33 -0700 |
| commit | 852232fb803bef92b12136be2766ddee3e3613b2 (patch) | |
| tree | e6cecb35a59a69ebf8c34673c373b017e7acb94c /shared-core/i915_drv.h | |
| parent | 7fdf98051a51a0117f415f7f7374f2b4d0b2e531 (diff) | |
Remove plane->pipe mapping from SAREA private after all
We can figure out which pipe a given plane is mapped to by looking at the
display control registers instead of tracking it in a new SAREA private field.
If this becomes a performance problem, we could move to an ioctl based solution
by adding a new parameter for the DDX to set (defaulting to the old behavior if
the param was never set of course).
Diffstat (limited to 'shared-core/i915_drv.h')
| -rw-r--r-- | shared-core/i915_drv.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/shared-core/i915_drv.h b/shared-core/i915_drv.h index c5f51897..899817ec 100644 --- a/shared-core/i915_drv.h +++ b/shared-core/i915_drv.h @@ -490,6 +490,11 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller); #define DISPLAY_PLANE_A (0<<20) #define DISPLAY_PLANE_B (1<<20) +/* Display regs */ +#define DSPACNTR 0x70180 +#define DSPBCNTR 0x71180 +#define DISPPLANE_SEL_PIPE_MASK (1<<24) + /* Define the region of interest for the binner: */ #define CMD_OP_BIN_CONTROL ((0x3<<29)|(0x1d<<24)|(0x84<<16)|4) |