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author | Jesse Barnes <jbarnes@hobbes.(none)> | 2008-07-01 16:10:01 -0700 |
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committer | Jesse Barnes <jbarnes@virtuousgeek.org> | 2008-07-01 16:10:01 -0700 |
commit | 301d984ea80cb250460d6701c4373cf0af8bf59e (patch) | |
tree | b72281b24a13409030190fc6c8e3ac22d8ccada2 /scripts | |
parent | 94dcc83ad2e8f848a3cac6cdc6f123e676e91cf8 (diff) |
i915: only use tiled blits on 965+
When scheduled swaps occur, we need to blit between front & back buffers. I
the buffers are tiled, we need to set the appropriate XY_SRC_COPY tile bit,
only on 965 chips, since it will cause corruption on pre-965 (e.g. 945).
Bug reported by and fix tested by Tomas Janousek <tomi@nomi.cz>.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'scripts')
0 files changed, 0 insertions, 0 deletions