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| author | Thierry Reding <treding@nvidia.com> | 2014-06-04 10:36:43 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2014-11-27 17:20:32 +0100 |
| commit | 5ad2eef6eaed4ef90c25341a1c2278a0df5dafcc (patch) | |
| tree | eaefc32a502e047d525ea11f74384ebe8b9c91d8 /radeon/radeon_cs_space.c | |
| parent | 93035cfbebf1344a041b70fbf9f3b89f6542805f (diff) | |
tegra: Add GET/SET_TILING IOCTLs
Currently the tiling parameters of buffer objects can only be set at
allocation time, and only a single tiled mode is supported. This new
DRM_TEGRA_GEM_SET_TILING IOCTL allows more modes to be set and also
allows the tiling mode to be changed after the allocation. This will
enable the Tegra DRM driver to import buffers from a GPU and directly
scan them out by configuring the display controller appropriately.
To complement this, the DRM_TEGRA_GEM_GET_TILING IOCTL can query the
current tiling mode of a buffer object. This is necessary when importing
buffers via handle (as is done in Mesa for example) so that userspace
can determine the proper parameters for the 2D or 3D engines.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'radeon/radeon_cs_space.c')
0 files changed, 0 insertions, 0 deletions