Merged mga-0-0-3-branch

- New security model for i810
- Enable i810 dri by default
- New indexed vertex path for mga
- Mga kernel driver rework
- Removed dead files in i810 driver

1 files changed, 178 insertions, 68 deletions

diff --git a/linux/mga_state.c b/linux/mga_state.c
index a70f86d2..dc227769 100644
--- a/linux/mga_state.c
+++ b/linux/mga_state.c
@@ -41,14 +41,15 @@ static void mgaEmitClipRect( drm_mga_private_t *dev_priv,
    	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int *regs = sarea_priv->ContextState;
 	PRIMLOCALS;
+	DRM_DEBUG("%s\n", __FUNCTION__);
 
    	/* This takes 10 dwords */
 	PRIMGETPTR( dev_priv );
    
    	/* Force reset of dwgctl (eliminates clip disable) */
    	PRIMOUTREG( MGAREG_DMAPAD, 0 );
-	PRIMOUTREG( MGAREG_DWGSYNC, dev_priv->last_sync_tag - 1 );
-	PRIMOUTREG( MGAREG_DWGSYNC, dev_priv->last_sync_tag - 1 );
+	PRIMOUTREG( MGAREG_DWGSYNC, 0 );
+	PRIMOUTREG( MGAREG_DWGSYNC, 0 );
    	PRIMOUTREG( MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL] );
 
    	PRIMOUTREG( MGAREG_DMAPAD, 0 );
@@ -64,6 +65,7 @@ static void mgaEmitContext(drm_mga_private_t *dev_priv )
       	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int *regs = sarea_priv->ContextState;
 	PRIMLOCALS;
+	DRM_DEBUG("%s\n", __FUNCTION__);
 	
    	/* This takes a max of 15 dwords */
 	PRIMGETPTR( dev_priv );
@@ -98,6 +100,7 @@ static void mgaG200EmitTex( drm_mga_private_t *dev_priv )
       	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int *regs = sarea_priv->TexState[0];
 	PRIMLOCALS;
+	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	PRIMGETPTR( dev_priv );
    
@@ -132,6 +135,7 @@ static void mgaG400EmitTex0( drm_mga_private_t *dev_priv )
 	unsigned int *regs = sarea_priv->TexState[0];
 	int multitex = sarea_priv->WarpPipe & MGA_T2;
 	PRIMLOCALS;
+	DRM_DEBUG("%s\n", __FUNCTION__);
    
 	PRIMGETPTR( dev_priv );
    
@@ -179,6 +183,7 @@ static void mgaG400EmitTex1( drm_mga_private_t *dev_priv )
       	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int *regs = sarea_priv->TexState[1];
 	PRIMLOCALS;
+	DRM_DEBUG("%s\n", __FUNCTION__);
    
 	PRIMGETPTR(dev_priv);
 
@@ -217,6 +222,7 @@ static void mgaG400EmitPipe(drm_mga_private_t *dev_priv )
 	unsigned int pipe = sarea_priv->WarpPipe;
 	float fParam = 12800.0f;
 	PRIMLOCALS;
+	DRM_DEBUG("%s\n", __FUNCTION__);
    
 	PRIMGETPTR(dev_priv);
 
@@ -255,7 +261,7 @@ static void mgaG400EmitPipe(drm_mga_private_t *dev_priv )
 	PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
 	PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
 	PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
-	PRIMOUTREG(MGAREG_WIADDR2, (__u32)(dev_priv->WarpIndex[pipe].phys_addr |
+	PRIMOUTREG(MGAREG_WIADDR2, (u32)(dev_priv->WarpIndex[pipe].phys_addr |
 					   WIA_wmode_start | WIA_wagp_agp));
 	PRIMADVANCE(dev_priv);
 }
@@ -265,6 +271,7 @@ static void mgaG200EmitPipe( drm_mga_private_t *dev_priv )
       	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int pipe = sarea_priv->WarpPipe;
 	PRIMLOCALS;
+	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	PRIMGETPTR(dev_priv);
    
@@ -284,7 +291,7 @@ static void mgaG200EmitPipe( drm_mga_private_t *dev_priv )
 	PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
 	PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
 	PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
-	PRIMOUTREG(MGAREG_WIADDR, (__u32)(dev_priv->WarpIndex[pipe].phys_addr | 
+	PRIMOUTREG(MGAREG_WIADDR, (u32)(dev_priv->WarpIndex[pipe].phys_addr | 
 					  WIA_wmode_start | WIA_wagp_agp));
 
 	PRIMADVANCE(dev_priv);
@@ -294,6 +301,7 @@ static void mgaEmitState( drm_mga_private_t *dev_priv )
 {
       	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int dirty = sarea_priv->dirty;
+	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	if (dev_priv->chipset == MGA_CARD_TYPE_G400) {	   
 		int multitex = sarea_priv->WarpPipe & MGA_T2;
@@ -343,6 +351,8 @@ static int mgaVerifyContext(drm_mga_private_t *dev_priv )
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int *regs = sarea_priv->ContextState;
 
+   	DRM_DEBUG("%s\n", __FUNCTION__);
+
 	if (regs[MGA_CTXREG_DSTORG] != dev_priv->frontOffset &&
 	    regs[MGA_CTXREG_DSTORG] != dev_priv->backOffset) {
 		DRM_DEBUG("BAD DSTORG: %x (front %x, back %x)\n\n", 
@@ -362,6 +372,8 @@ static int mgaVerifyTex(drm_mga_private_t *dev_priv,
 {
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 
+   	DRM_DEBUG("%s\n", __FUNCTION__);
+
 	if ((sarea_priv->TexState[unit][MGA_TEXREG_ORG] & 0x3) == 0x1) {
 		DRM_DEBUG("BAD TEXREG_ORG: %x, unit %d\n", 
 		       sarea_priv->TexState[unit][MGA_TEXREG_ORG],
@@ -379,6 +391,8 @@ static int mgaVerifyState( drm_mga_private_t *dev_priv )
 	unsigned int dirty = sarea_priv->dirty;
 	int rv = 0;
 
+   	DRM_DEBUG("%s\n", __FUNCTION__);
+
    	if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS)
      		sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
 
@@ -409,6 +423,8 @@ static int mgaVerifyIload( drm_mga_private_t *dev_priv,
 			   unsigned long bus_address, 
 			   unsigned int dstOrg, int length )
 {
+   	DRM_DEBUG("%s\n", __FUNCTION__);
+
    	if(dstOrg < dev_priv->textureOffset ||
 	   dstOrg + length > 
 	   (dev_priv->textureOffset + dev_priv->textureSize)) {
@@ -432,14 +448,13 @@ static void mga_dma_dispatch_tex_blit( drm_device_t *dev,
    	int use_agp = PDEA_pagpxfer_enable | 0x00000001;
    	u16 y2;
     	PRIMLOCALS;
+	DRM_DEBUG("%s\n", __FUNCTION__);
     
         y2 = length / 64;
  
 	PRIM_OVERFLOW(dev, dev_priv, 30);
 	PRIMGETPTR( dev_priv );
 
-      	dev_priv->last_sync_tag = mga_create_sync_tag(dev);
-
 	PRIMOUTREG( MGAREG_DSTORG, destOrg);
 	PRIMOUTREG( MGAREG_MACCESS, 0x00000000);
    	DRM_DEBUG("srcorg : %lx\n", bus_address | use_agp);
@@ -459,7 +474,7 @@ static void mga_dma_dispatch_tex_blit( drm_device_t *dev,
 	PRIMOUTREG( MGAREG_SRCORG, 0);
 	PRIMOUTREG( MGAREG_PITCH, dev_priv->stride / dev_priv->cpp);
       	PRIMOUTREG( MGAREG_DMAPAD, 0);
-      	PRIMOUTREG( MGAREG_DWGSYNC, dev_priv->last_sync_tag);
+      	PRIMOUTREG( MGAREG_DMAPAD, 0);
     	PRIMADVANCE(dev_priv);
 }
 
@@ -475,33 +490,101 @@ static void mga_dma_dispatch_vertex(drm_device_t *dev,
 	int i = 0;
    	int primary_needed;
       	PRIMLOCALS;
+	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	DRM_DEBUG("dispatch vertex %d addr 0x%lx, "
 		  "length 0x%x nbox %d dirty %x\n", 
 		  buf->idx, address, length, 
 		  sarea_priv->nbox, sarea_priv->dirty);
 
+	DRM_DEBUG("used : %d, total : %d\n", buf->used, buf->total);
+	if(sarea_priv->WarpPipe & MGA_T2) { 
+	   if ((buf->used/4) % 10)
+	     DRM_DEBUG("Multitex Buf is not aligned properly!!!\n");
+	} else { 
+	   if ((buf->used/4) % 8)
+	     DRM_DEBUG("Buf is not aligned properly!!!\n");
+	}
 
-   	dev_priv->last_sync_tag = mga_create_sync_tag(dev);
+	if (buf->used) {
+		/* WARNING: if you change any of the state functions verify
+		 * these numbers (Overestimating this doesn't hurt).  
+		 */
+		buf_priv->dispatched = 1;
+		primary_needed = (25+15+30+25+ 
+				  10 + 
+				  15 * MGA_NR_SAREA_CLIPRECTS);
+		PRIM_OVERFLOW(dev, dev_priv, primary_needed);
+   		mgaEmitState( dev_priv );
 
-   	if (buf_priv->discard) { 
-		buf_priv->my_freelist->age = dev_priv->last_sync_tag;
+		do {
+			if (i < sarea_priv->nbox) {
+				DRM_DEBUG("idx %d Emit box %d/%d:"
+					  "%d,%d - %d,%d\n", 
+					  buf->idx,
+					  i, sarea_priv->nbox,
+					  sarea_priv->boxes[i].x1, 
+					  sarea_priv->boxes[i].y1,
+					  sarea_priv->boxes[i].x2, 
+					  sarea_priv->boxes[i].y2);
+				
+				mgaEmitClipRect( dev_priv, 
+						 &sarea_priv->boxes[i] );
+			}
+			
+			PRIMGETPTR(dev_priv);
+			PRIMOUTREG( MGAREG_DMAPAD, 0);
+			PRIMOUTREG( MGAREG_DMAPAD, 0);
+			PRIMOUTREG( MGAREG_SECADDRESS, 
+				    ((u32)address) | TT_VERTEX);
+			PRIMOUTREG( MGAREG_SECEND, 
+				    (((u32)(address + length)) | 
+				     use_agp));
+			PRIMADVANCE( dev_priv );	       
+		}  while (++i < sarea_priv->nbox);
+	}
+
+   	if (buf_priv->discard) {
+		if(buf_priv->dispatched == 1) AGEBUF(dev_priv, buf_priv);
+		buf_priv->dispatched = 0;
 	   	mga_freelist_put(dev, buf);
 	}
 
 
-	/* WARNING: if you change any of the state functions verify
-	 * these numbers (Overestimating this doesn't hurt).  
-	 */
-	primary_needed = (25+15+30+25+ 
-			  10 + 
-			  15 * MGA_NR_SAREA_CLIPRECTS);
+}
 
 
-   	PRIM_OVERFLOW(dev, dev_priv, primary_needed);
-   	mgaEmitState( dev_priv );
+static void mga_dma_dispatch_indices(drm_device_t *dev, 
+				     drm_buf_t *buf,
+				     unsigned int start,
+				     unsigned int end)
+{
+   	drm_mga_private_t *dev_priv = dev->dev_private;
+	drm_mga_buf_priv_t *buf_priv = buf->dev_private;
+   	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	unsigned int address = (unsigned int)buf->bus_address;
+	int use_agp = PDEA_pagpxfer_enable;
+	int i = 0;
+   	int primary_needed;
+      	PRIMLOCALS;
+	DRM_DEBUG("%s\n", __FUNCTION__);
+
+	DRM_DEBUG("dispatch indices %d addr 0x%x, "
+		  "start 0x%x end 0x%x nbox %d dirty %x\n", 
+		  buf->idx, address, start, end, 
+		  sarea_priv->nbox, sarea_priv->dirty);
+
+	if (start != end) {
+		/* WARNING: if you change any of the state functions verify
+		 * these numbers (Overestimating this doesn't hurt).  
+		 */
+		buf_priv->dispatched = 1;
+		primary_needed = (25+15+30+25+ 
+				  10 + 
+				  15 * MGA_NR_SAREA_CLIPRECTS);
+   		PRIM_OVERFLOW(dev, dev_priv, primary_needed);
+   		mgaEmitState( dev_priv );
 
-	if (buf->used) {
 		do {
 			if (i < sarea_priv->nbox) {
 				DRM_DEBUG("idx %d Emit box %d/%d:"
@@ -520,21 +603,18 @@ static void mga_dma_dispatch_vertex(drm_device_t *dev,
 			PRIMGETPTR(dev_priv);
 			PRIMOUTREG( MGAREG_DMAPAD, 0);
 			PRIMOUTREG( MGAREG_DMAPAD, 0);
-			PRIMOUTREG( MGAREG_SECADDRESS, 
-				    ((__u32)address) | TT_VERTEX);
-			PRIMOUTREG( MGAREG_SECEND, 
-				    (((__u32)(address + length)) | 
-				     use_agp));
+			PRIMOUTREG( MGAREG_SETUPADDRESS, 
+				    ((address + start) | SETADD_mode_vertlist));
+			PRIMOUTREG( MGAREG_SETUPEND, 
+				    ((address + end) | use_agp));
 			PRIMADVANCE( dev_priv );	       
 		}  while (++i < sarea_priv->nbox);
 	}
-
-	PRIMGETPTR( dev_priv );
-   	PRIMOUTREG(MGAREG_DMAPAD, 0);
-   	PRIMOUTREG(MGAREG_DMAPAD, 0);
-   	PRIMOUTREG(MGAREG_DMAPAD, 0);
-   	PRIMOUTREG(MGAREG_DWGSYNC, dev_priv->last_sync_tag);   
-	PRIMADVANCE( dev_priv );
+   	if (buf_priv->discard) {
+		if(buf_priv->dispatched == 1) AGEBUF(dev_priv, buf_priv);
+		buf_priv->dispatched = 0;
+	   	mga_freelist_put(dev, buf);
+	}
 }
 
 
@@ -551,6 +631,7 @@ static void mga_dma_dispatch_clear( drm_device_t *dev, int flags,
 	int i;
    	int primary_needed;
    	PRIMLOCALS;
+	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	if ( dev_priv->sgram ) 
 		cmd = MGA_CLEAR_CMD | DC_atype_blk;
@@ -561,7 +642,6 @@ static void mga_dma_dispatch_clear( drm_device_t *dev, int flags,
    	if(primary_needed == 0) primary_needed = 70;
 	PRIM_OVERFLOW(dev, dev_priv, primary_needed);
 	PRIMGETPTR( dev_priv );
-      	dev_priv->last_sync_tag = mga_create_sync_tag(dev);
    
 	for (i = 0 ; i < nbox ; i++) {
 		unsigned int height = pbox[i].y2 - pbox[i].y1;
@@ -615,11 +695,6 @@ static void mga_dma_dispatch_clear( drm_device_t *dev, int flags,
 	PRIMOUTREG( MGAREG_DMAPAD, 0);   
       	PRIMOUTREG( MGAREG_DMAPAD, 0);
       	PRIMOUTREG( MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL] );
-
-	PRIMOUTREG( MGAREG_DMAPAD, 0);
-	PRIMOUTREG( MGAREG_DMAPAD, 0);
-      	PRIMOUTREG( MGAREG_DMAPAD, 0);
-   	PRIMOUTREG( MGAREG_DWGSYNC, dev_priv->last_sync_tag);
 	PRIMADVANCE(dev_priv);
 }
 
@@ -633,14 +708,13 @@ static void mga_dma_dispatch_swap( drm_device_t *dev )
 	int i;
    	int primary_needed;
    	PRIMLOCALS;
+	DRM_DEBUG("%s\n", __FUNCTION__);
 
    	primary_needed = nbox * 5;
    	primary_needed += 60;
 	PRIM_OVERFLOW(dev, dev_priv, primary_needed);
 	PRIMGETPTR( dev_priv );
    
-      	dev_priv->last_sync_tag = mga_create_sync_tag(dev);
-
 	PRIMOUTREG(MGAREG_DSTORG, dev_priv->frontOffset);
 	PRIMOUTREG(MGAREG_MACCESS, dev_priv->mAccess);
 	PRIMOUTREG(MGAREG_SRCORG, dev_priv->backOffset);
@@ -668,13 +742,9 @@ static void mga_dma_dispatch_swap( drm_device_t *dev )
    	/* Force reset of DWGCTL */
    	PRIMOUTREG( MGAREG_DMAPAD, 0);
       	PRIMOUTREG( MGAREG_DMAPAD, 0);
-   	PRIMOUTREG( MGAREG_DMAPAD, 0);
+   	PRIMOUTREG( MGAREG_SRCORG, 0);
       	PRIMOUTREG( MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL] );
 
-	PRIMOUTREG( MGAREG_SRCORG, 0);
-	PRIMOUTREG( MGAREG_DMAPAD, 0);
-      	PRIMOUTREG( MGAREG_DMAPAD, 0);
-      	PRIMOUTREG( MGAREG_DWGSYNC, dev_priv->last_sync_tag);
    	PRIMADVANCE(dev_priv);
 }
 
@@ -685,12 +755,11 @@ int mga_clear_bufs(struct inode *inode, struct file *filp,
 	drm_device_t *dev = priv->dev;
    	drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
    	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
-      	__volatile__ unsigned int *status = 
-     		(__volatile__ unsigned int *)dev_priv->status_page;
 	drm_mga_clear_t clear;
 
    	copy_from_user_ret(&clear, (drm_mga_clear_t *)arg, sizeof(clear), 
 			   -EFAULT);
+	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
 		DRM_ERROR("mga_clear_bufs called without lock held\n");
@@ -707,8 +776,8 @@ int mga_clear_bufs(struct inode *inode, struct file *filp,
 			        clear.clear_color, 
 			        clear.clear_depth );
       	PRIMUPDATE(dev_priv);
+	mga_flush_write_combine();
 	mga_dma_schedule(dev, 1);
-   	sarea_priv->last_dispatch = status[1];
    	return 0;
 }
 
@@ -719,8 +788,7 @@ int mga_swap_bufs(struct inode *inode, struct file *filp,
 	drm_device_t *dev = priv->dev;
    	drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
       	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
-      	__volatile__ unsigned int *status = 
-     		(__volatile__ unsigned int *)dev_priv->status_page;
+	DRM_DEBUG("%s\n", __FUNCTION__);
    
 	if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
 		DRM_ERROR("mga_swap_bufs called without lock held\n");
@@ -735,10 +803,9 @@ int mga_swap_bufs(struct inode *inode, struct file *filp,
 	dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CTX;
 	mga_dma_dispatch_swap( dev );
       	PRIMUPDATE(dev_priv);
-   	set_bit(0, &dev_priv->current_prim->swap_pending);
-   	dev_priv->current_prim->swap_pending = 1;
+   	set_bit(MGA_BUF_SWAP_PENDING, &dev_priv->current_prim->buffer_status);
+	mga_flush_write_combine();
 	mga_dma_schedule(dev, 1);
-      	sarea_priv->last_dispatch = status[1];
    	return 0;
 }
 
@@ -750,12 +817,11 @@ int mga_iload(struct inode *inode, struct file *filp,
    	drm_device_dma_t  *dma	    = dev->dma;
        	drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
        	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
-       	__volatile__ unsigned int *status = 
-      		(__volatile__ unsigned int *)dev_priv->status_page;
    	drm_buf_t *buf;
    	drm_mga_buf_priv_t *buf_priv;
  	drm_mga_iload_t iload;
 	unsigned long bus_address;
+	DRM_DEBUG("%s\n", __FUNCTION__);
    
    	DRM_DEBUG("Starting Iload\n");
  	copy_from_user_ret(&iload, (drm_mga_iload_t *)arg, sizeof(iload),
@@ -784,11 +850,11 @@ int mga_iload(struct inode *inode, struct file *filp,
 
    	mga_dma_dispatch_tex_blit(dev, bus_address, iload.length, 
 				  iload.destOrg);
-   	buf_priv->my_freelist->age = dev_priv->last_sync_tag;
+	AGEBUF(dev_priv, buf_priv);
 	buf_priv->discard = 1;
     	mga_freelist_put(dev, buf);
+	mga_flush_write_combine();
 	mga_dma_schedule(dev, 1);
-    	sarea_priv->last_dispatch = status[1];
  	return 0; 
 }
 
@@ -798,13 +864,11 @@ int mga_vertex(struct inode *inode, struct file *filp,
 	drm_file_t *priv = filp->private_data;
 	drm_device_t *dev = priv->dev;
       	drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
-   	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
-      	__volatile__ unsigned int *status = 
-     		(__volatile__ unsigned int *)dev_priv->status_page;
    	drm_device_dma_t *dma = dev->dma;
 	drm_buf_t *buf;
       	drm_mga_buf_priv_t *buf_priv;
 	drm_mga_vertex_t vertex;
+	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	copy_from_user_ret(&vertex, (drm_mga_vertex_t *)arg, sizeof(vertex),
 			   -EFAULT);
@@ -823,25 +887,75 @@ int mga_vertex(struct inode *inode, struct file *filp,
 	buf_priv->discard = vertex.discard;
    
 	if (!mgaVerifyState(dev_priv)) {
-	   if (vertex.discard) { 
-	     	buf_priv->my_freelist->age = dev_priv->last_sync_tag;
-	      	mga_freelist_put(dev, buf);
+	   if (vertex.discard) {
+		if(buf_priv->dispatched == 1) AGEBUF(dev_priv, buf_priv);
+		buf_priv->dispatched = 0;
+	   	mga_freelist_put(dev, buf);
 	   }
+	   DRM_DEBUG("bad state\n");
 	   return -EINVAL;
 	}
 
 	mga_dma_dispatch_vertex(dev, buf);
 
    	PRIMUPDATE(dev_priv);
+	mga_flush_write_combine();
 	mga_dma_schedule(dev, 1);
-      	sarea_priv->last_dispatch = status[1];
    	return 0;
 }
 
+
+int mga_indices(struct inode *inode, struct file *filp,
+		unsigned int cmd, unsigned long arg)
+{
+	drm_file_t *priv = filp->private_data;
+	drm_device_t *dev = priv->dev;
+      	drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
+   	drm_device_dma_t *dma = dev->dma;
+	drm_buf_t *buf;
+      	drm_mga_buf_priv_t *buf_priv;
+	drm_mga_indices_t indices;
+	DRM_DEBUG("%s\n", __FUNCTION__);
+
+	copy_from_user_ret(&indices, (drm_mga_indices_t *)arg, sizeof(indices),
+			   -EFAULT);
+   
+	if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
+		DRM_ERROR("mga_indices called without lock held\n");
+		return -EINVAL;
+	}
+
+	DRM_DEBUG("mga_indices\n");
+
+	buf = dma->buflist[ indices.idx ];
+   	buf_priv = buf->dev_private;
+
+	buf_priv->discard = indices.discard;
+   
+	if (!mgaVerifyState(dev_priv)) {
+	   if (indices.discard) {
+		if(buf_priv->dispatched == 1) AGEBUF(dev_priv, buf_priv);
+		buf_priv->dispatched = 0;
+	   	mga_freelist_put(dev, buf);
+	   }
+	   return -EINVAL;
+	}
+
+	mga_dma_dispatch_indices(dev, buf, indices.start, indices.end);
+
+   	PRIMUPDATE(dev_priv);
+	mga_flush_write_combine();
+	mga_dma_schedule(dev, 1);
+   	return 0;
+}
+
+
+
 static int mga_dma_get_buffers(drm_device_t *dev, drm_dma_t *d)
 {
 	int i;
 	drm_buf_t *buf;
+	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	for (i = d->granted_count; i < d->request_count; i++) {
 		buf = mga_freelist_get(dev);
@@ -866,12 +980,9 @@ int mga_dma(struct inode *inode, struct file *filp, unsigned int cmd,
 	drm_file_t	  *priv	    = filp->private_data;
 	drm_device_t	  *dev	    = priv->dev;
 	drm_device_dma_t  *dma	    = dev->dma;
-   	drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
-   	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
-      	__volatile__ unsigned int *status = 
-     		(__volatile__ unsigned int *)dev_priv->status_page;
 	int		  retcode   = 0;
 	drm_dma_t	  d;
+	DRM_DEBUG("%s\n", __FUNCTION__);
 
    	copy_from_user_ret(&d, (drm_dma_t *)arg, sizeof(d), -EFAULT);
 	DRM_DEBUG("%d %d: %d send, %d req\n",
@@ -907,6 +1018,5 @@ int mga_dma(struct inode *inode, struct file *filp, unsigned int cmd,
 	DRM_DEBUG("%d returning, granted = %d\n",
 		  current->pid, d.granted_count);
 	copy_to_user_ret((drm_dma_t *)arg, &d, sizeof(d), -EFAULT);
-      	sarea_priv->last_dispatch = status[1];
 	return retcode;
 }