diff options
| author | Thomas Hellstrom <thomas-at-tungstengraphics-dot-com> | 2008-04-28 12:10:44 +0200 |
|---|---|---|
| committer | Thomas Hellstrom <thomas-at-tungstengraphics-dot-com> | 2008-04-28 12:10:44 +0200 |
| commit | 7f269bec7ed49385de394fdbd970f463ef2060f0 (patch) | |
| tree | 8c45f8c2e11cf101350272f81892cf4cf7678c3a /linux-core/i915_drv.c | |
| parent | 55a9941977953d16b36bbf3e1dcad392ac70e1ef (diff) | |
| parent | 7f8e4060859651993921281445ec00940c577222 (diff) | |
Merge branch 'master' into modesetting-101
Conflicts:
linux-core/Makefile.kernel
linux-core/drm_compat.c
linux-core/drm_fops.c
linux-core/drm_lock.c
shared-core/drm.h
shared-core/i915_dma.c
shared-core/i915_drv.h
shared-core/i915_irq.c
Diffstat (limited to 'linux-core/i915_drv.c')
| -rw-r--r-- | linux-core/i915_drv.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/linux-core/i915_drv.c b/linux-core/i915_drv.c index 0e65c0cd..3fe101ff 100644 --- a/linux-core/i915_drv.c +++ b/linux-core/i915_drv.c @@ -285,6 +285,9 @@ static int i915_suspend(struct drm_device *dev, pm_message_t state) pci_save_state(dev->pdev); pci_read_config_byte(dev->pdev, LBB, &dev_priv->saveLBB); + /* Display arbitration control */ + dev_priv->saveDSPARB = I915_READ(DSPARB); + /* Pipe & plane A info */ dev_priv->savePIPEACONF = I915_READ(PIPEACONF); dev_priv->savePIPEASRC = I915_READ(PIPEASRC); @@ -378,6 +381,7 @@ static int i915_suspend(struct drm_device *dev, pm_message_t state) dev_priv->saveVGACNTRL = I915_READ(VGACNTRL); /* Clock gating state */ + dev_priv->saveD_STATE = I915_READ(D_STATE); dev_priv->saveDSPCLK_GATE_D = I915_READ(DSPCLK_GATE_D); /* Cache mode state */ @@ -417,6 +421,8 @@ static int i915_resume(struct drm_device *dev) pci_write_config_byte(dev->pdev, LBB, dev_priv->saveLBB); + I915_WRITE(DSPARB, dev_priv->saveDSPARB); + /* Pipe & plane A info */ /* Prime the clock */ if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) { @@ -536,6 +542,7 @@ static int i915_resume(struct drm_device *dev) udelay(150); /* Clock gating state */ + I915_WRITE (D_STATE, dev_priv->saveD_STATE); I915_WRITE (DSPCLK_GATE_D, dev_priv->saveDSPCLK_GATE_D); /* Cache mode state */ |