Move libdrm/ up one level

53 files changed, 0 insertions, 23161 deletions

diff --git a/libdrm/ChangeLog b/libdrm/ChangeLog
deleted file mode 100644
index 1e740706..00000000
--- a/libdrm/ChangeLog
+++ /dev/null
@@ -1,20 +0,0 @@
-2006-03-14  Adam Jackson  <ajax@freedesktop.org>
-
-	* xf86drmHash.c:
-	Avoid walking off the end of the hash table.  (Coverity report #465)
-
-2006-02-20  Adam Jackson  <ajax@freedesktop.org>
-
-	* ChangeLog:
-	* Makefile.am:
-	Created.
-
-	* TODO:
-	* xf86drm.c:
-	* xf86drm.h:
-	* xf86drmHash.c:
-	* xf86drmRandom.c:
-	* xf86drmSL.c:
-	Formatting cleanup, dead code removal.  Remove N() namespacing macro,
-	useless.  Remove SIGIO handling functions as they're server-only and
-	properly belong in libdri.
diff --git a/libdrm/Makefile.am b/libdrm/Makefile.am
deleted file mode 100644
index 10de8e3d..00000000
--- a/libdrm/Makefile.am
+++ /dev/null
@@ -1,47 +0,0 @@
-#  Copyright 2005 Adam Jackson.
-#
-#  Permission is hereby granted, free of charge, to any person obtaining a
-#  copy of this software and associated documentation files (the "Software"),
-#  to deal in the Software without restriction, including without limitation
-#  on the rights to use, copy, modify, merge, publish, distribute, sub
-#  license, and/or sell copies of the Software, and to permit persons to whom
-#  the Software is furnished to do so, subject to the following conditions:
-#
-#  The above copyright notice and this permission notice (including the next
-#  paragraph) shall be included in all copies or substantial portions of the
-#  Software.
-#
-#  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-#  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-#  FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.  IN NO EVENT SHALL
-#  ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-#  IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-#  CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-if HAVE_INTEL
-INTEL_SUBDIR = intel
-endif
-
-if HAVE_NOUVEAU
-NOUVEAU_SUBDIR = nouveau
-endif
-
-if HAVE_RADEON
-RADEON_SUBDIR = radeon
-endif
-
-SUBDIRS = . $(INTEL_SUBDIR) $(NOUVEAU_SUBDIR) $(RADEON_SUBDIR)
-
-libdrm_la_LTLIBRARIES = libdrm.la
-libdrm_ladir = $(libdir)
-libdrm_la_LDFLAGS = -version-number 2:4:0 -no-undefined
-libdrm_la_LIBADD = @CLOCK_LIB@
-
-AM_CFLAGS = -I$(top_srcdir)/include/drm
-libdrm_la_SOURCES = xf86drm.c xf86drmHash.c xf86drmRandom.c xf86drmSL.c \
-	xf86drmMode.c libdrm_lists.h
-
-libdrmincludedir = ${includedir}
-libdrminclude_HEADERS = xf86drm.h xf86drmMode.h
-
-EXTRA_DIST = ChangeLog TODO
diff --git a/libdrm/TODO b/libdrm/TODO
deleted file mode 100644
index b6316a29..00000000
--- a/libdrm/TODO
+++ /dev/null
@@ -1,10 +0,0 @@
-- Build and install the test apps by default
-- Additional API for unified memory manager
-  see http://dri.freedesktop.org/wiki/DriMemoryManagerDesign for proposal
-- Any changes needed to enable the XvMC drivers to link against libdrm
-- Header cleanup
-- Unify libdrm code paths between client and server
-  - drmMsg, xf86DrvMsgVerb versus vfprintf
-  - drmOpenDevice tries chmod/chown if in server
-  - drmOpen{,ByName} tries to load kernel module if in server
-  All but the last two should probably be factored out into libdri.
diff --git a/libdrm/intel/Makefile.am b/libdrm/intel/Makefile.am
deleted file mode 100644
index c3c563e4..00000000
--- a/libdrm/intel/Makefile.am
+++ /dev/null
@@ -1,50 +0,0 @@
-# Copyright © 2008 Intel Corporation
-#
-# Permission is hereby granted, free of charge, to any person obtaining a
-# copy of this software and associated documentation files (the "Software"),
-# to deal in the Software without restriction, including without limitation
-# the rights to use, copy, modify, merge, publish, distribute, sublicense,
-# and/or sell copies of the Software, and to permit persons to whom the
-# Software is furnished to do so, subject to the following conditions:
-#
-# The above copyright notice and this permission notice (including the next
-# paragraph) shall be included in all copies or substantial portions of the
-# Software.
-#
-# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
-# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
-# IN THE SOFTWARE.
-#
-# Authors:
-#    Eric Anholt <eric@anholt.net>
-
-AM_CFLAGS = \
-	$(WARN_CFLAGS) \
-	-I$(top_srcdir)/libdrm \
-	-I$(top_srcdir)/libdrm/intel \
-	$(PTHREADSTUBS_CFLAGS) \
-	-I$(top_srcdir)/include/drm
-
-libdrm_intel_la_LTLIBRARIES = libdrm_intel.la
-libdrm_intel_ladir = $(libdir)
-libdrm_intel_la_LDFLAGS = -version-number 1:0:0 -no-undefined
-libdrm_intel_la_LIBADD = ../libdrm.la @PTHREADSTUBS_LIBS@ @CLOCK_LIB@
-
-libdrm_intel_la_SOURCES = \
-	intel_atomic.h \
-	intel_bufmgr.c \
-	intel_bufmgr_priv.h \
-	intel_bufmgr_fake.c \
-	intel_bufmgr_gem.c \
-	intel_chipset.h \
-	mm.c \
-	mm.h
-
-libdrm_intelincludedir = ${includedir}
-libdrm_intelinclude_HEADERS = intel_bufmgr.h
-
-pkgconfig_DATA = libdrm_intel.pc
diff --git a/libdrm/intel/intel_atomic.h b/libdrm/intel/intel_atomic.h
deleted file mode 100644
index e725c4a4..00000000
--- a/libdrm/intel/intel_atomic.h
+++ /dev/null
@@ -1,78 +0,0 @@
-/*
- * Copyright © 2009 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- *
- * Authors:
- *    Chris Wilson <chris@chris-wilson.co.uk>
- *
- */
-
-/**
- * @file intel_atomics.h
- *
- * Private definitions for atomic operations
- */
-
-#ifndef INTEL_ATOMICS_H
-#define INTEL_ATOMICS_H
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#if HAVE_INTEL_ATOMIC_PRIMITIVES
-
-#define HAS_ATOMIC_OPS 1
-
-typedef struct {
-	int atomic;
-} atomic_t;
-
-# define atomic_read(x) ((x)->atomic)
-# define atomic_set(x, val) ((x)->atomic = (val))
-# define atomic_inc(x) ((void) __sync_fetch_and_add (&(x)->atomic, 1))
-# define atomic_dec_and_test(x) (__sync_fetch_and_add (&(x)->atomic, -1) == 1)
-# define atomic_cmpxchg(x, oldv, newv) __sync_val_compare_and_swap (&(x)->atomic, oldv, newv)
-
-#endif
-
-#if HAVE_LIB_ATOMIC_OPS
-#include <atomic_ops.h>
-
-#define HAS_ATOMIC_OPS 1
-
-typedef struct {
-	AO_t atomic;
-} atomic_t;
-
-# define atomic_read(x) AO_load_full(&(x)->atomic)
-# define atomic_set(x, val) AO_store_full(&(x)->atomic, (val))
-# define atomic_inc(x) ((void) AO_fetch_and_add1_full(&(x)->atomic))
-# define atomic_dec_and_test(x) (AO_fetch_and_sub1_full(&(x)->atomic) == 1)
-# define atomic_cmpxchg(x, oldv, newv) AO_compare_and_swap_full(&(x)->atomic, oldv, newv)
-
-#endif
-
-#if ! HAS_ATOMIC_OPS
-#error libdrm-intel requires atomic operations, please define them for your CPU/compiler.
-#endif
-
-#endif
diff --git a/libdrm/intel/intel_bufmgr.c b/libdrm/intel/intel_bufmgr.c
deleted file mode 100644
index 2469cd84..00000000
--- a/libdrm/intel/intel_bufmgr.c
+++ /dev/null
@@ -1,237 +0,0 @@
-/*
- * Copyright © 2007 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- *
- * Authors:
- *    Eric Anholt <eric@anholt.net>
- *
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include <string.h>
-#include <stdlib.h>
-#include <stdint.h>
-#include <assert.h>
-#include <errno.h>
-#include <drm.h>
-#include <i915_drm.h>
-#include "intel_bufmgr.h"
-#include "intel_bufmgr_priv.h"
-
-/** @file intel_bufmgr.c
- *
- * Convenience functions for buffer management methods.
- */
-
-drm_intel_bo *drm_intel_bo_alloc(drm_intel_bufmgr *bufmgr, const char *name,
-				 unsigned long size, unsigned int alignment)
-{
-	return bufmgr->bo_alloc(bufmgr, name, size, alignment);
-}
-
-drm_intel_bo *drm_intel_bo_alloc_for_render(drm_intel_bufmgr *bufmgr,
-					    const char *name,
-					    unsigned long size,
-					    unsigned int alignment)
-{
-	return bufmgr->bo_alloc_for_render(bufmgr, name, size, alignment);
-}
-
-drm_intel_bo *
-drm_intel_bo_alloc_tiled(drm_intel_bufmgr *bufmgr, const char *name,
-                        int x, int y, int cpp, uint32_t *tiling_mode,
-                        unsigned long *pitch, unsigned long flags)
-{
-	return bufmgr->bo_alloc_tiled(bufmgr, name, x, y, cpp,
-				      tiling_mode, pitch, flags);
-}
-
-void drm_intel_bo_reference(drm_intel_bo *bo)
-{
-	bo->bufmgr->bo_reference(bo);
-}
-
-void drm_intel_bo_unreference(drm_intel_bo *bo)
-{
-	if (bo == NULL)
-		return;
-
-	bo->bufmgr->bo_unreference(bo);
-}
-
-int drm_intel_bo_map(drm_intel_bo *buf, int write_enable)
-{
-	return buf->bufmgr->bo_map(buf, write_enable);
-}
-
-int drm_intel_bo_unmap(drm_intel_bo *buf)
-{
-	return buf->bufmgr->bo_unmap(buf);
-}
-
-int
-drm_intel_bo_subdata(drm_intel_bo *bo, unsigned long offset,
-		     unsigned long size, const void *data)
-{
-	int ret;
-
-	if (bo->bufmgr->bo_subdata)
-		return bo->bufmgr->bo_subdata(bo, offset, size, data);
-	if (size == 0 || data == NULL)
-		return 0;
-
-	ret = drm_intel_bo_map(bo, 1);
-	if (ret)
-		return ret;
-	memcpy((unsigned char *)bo->virtual + offset, data, size);
-	drm_intel_bo_unmap(bo);
-	return 0;
-}
-
-int
-drm_intel_bo_get_subdata(drm_intel_bo *bo, unsigned long offset,
-			 unsigned long size, void *data)
-{
-	int ret;
-	if (bo->bufmgr->bo_subdata)
-		return bo->bufmgr->bo_get_subdata(bo, offset, size, data);
-
-	if (size == 0 || data == NULL)
-		return 0;
-
-	ret = drm_intel_bo_map(bo, 0);
-	if (ret)
-		return ret;
-	memcpy(data, (unsigned char *)bo->virtual + offset, size);
-	drm_intel_bo_unmap(bo);
-	return 0;
-}
-
-void drm_intel_bo_wait_rendering(drm_intel_bo *bo)
-{
-	bo->bufmgr->bo_wait_rendering(bo);
-}
-
-void drm_intel_bufmgr_destroy(drm_intel_bufmgr *bufmgr)
-{
-	bufmgr->destroy(bufmgr);
-}
-
-int
-drm_intel_bo_exec(drm_intel_bo *bo, int used,
-		  drm_clip_rect_t * cliprects, int num_cliprects, int DR4)
-{
-	return bo->bufmgr->bo_exec(bo, used, cliprects, num_cliprects, DR4);
-}
-
-void drm_intel_bufmgr_set_debug(drm_intel_bufmgr *bufmgr, int enable_debug)
-{
-	bufmgr->debug = enable_debug;
-}
-
-int drm_intel_bufmgr_check_aperture_space(drm_intel_bo ** bo_array, int count)
-{
-	return bo_array[0]->bufmgr->check_aperture_space(bo_array, count);
-}
-
-int drm_intel_bo_flink(drm_intel_bo *bo, uint32_t * name)
-{
-	if (bo->bufmgr->bo_flink)
-		return bo->bufmgr->bo_flink(bo, name);
-
-	return -ENODEV;
-}
-
-int
-drm_intel_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
-			drm_intel_bo *target_bo, uint32_t target_offset,
-			uint32_t read_domains, uint32_t write_domain)
-{
-	return bo->bufmgr->bo_emit_reloc(bo, offset,
-					 target_bo, target_offset,
-					 read_domains, write_domain);
-}
-
-int drm_intel_bo_pin(drm_intel_bo *bo, uint32_t alignment)
-{
-	if (bo->bufmgr->bo_pin)
-		return bo->bufmgr->bo_pin(bo, alignment);
-
-	return -ENODEV;
-}
-
-int drm_intel_bo_unpin(drm_intel_bo *bo)
-{
-	if (bo->bufmgr->bo_unpin)
-		return bo->bufmgr->bo_unpin(bo);
-
-	return -ENODEV;
-}
-
-int drm_intel_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
-			    uint32_t stride)
-{
-	if (bo->bufmgr->bo_set_tiling)
-		return bo->bufmgr->bo_set_tiling(bo, tiling_mode, stride);
-
-	*tiling_mode = I915_TILING_NONE;
-	return 0;
-}
-
-int drm_intel_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
-			    uint32_t * swizzle_mode)
-{
-	if (bo->bufmgr->bo_get_tiling)
-		return bo->bufmgr->bo_get_tiling(bo, tiling_mode, swizzle_mode);
-
-	*tiling_mode = I915_TILING_NONE;
-	*swizzle_mode = I915_BIT_6_SWIZZLE_NONE;
-	return 0;
-}
-
-int drm_intel_bo_disable_reuse(drm_intel_bo *bo)
-{
-	if (bo->bufmgr->bo_disable_reuse)
-		return bo->bufmgr->bo_disable_reuse(bo);
-	return 0;
-}
-
-int drm_intel_bo_busy(drm_intel_bo *bo)
-{
-	if (bo->bufmgr->bo_busy)
-		return bo->bufmgr->bo_busy(bo);
-	return 0;
-}
-
-int drm_intel_bo_references(drm_intel_bo *bo, drm_intel_bo *target_bo)
-{
-	return bo->bufmgr->bo_references(bo, target_bo);
-}
-
-int drm_intel_get_pipe_from_crtc_id(drm_intel_bufmgr *bufmgr, int crtc_id)
-{
-	if (bufmgr->get_pipe_from_crtc_id)
-		return bufmgr->get_pipe_from_crtc_id(bufmgr, crtc_id);
-	return -1;
-}
diff --git a/libdrm/intel/intel_bufmgr.h b/libdrm/intel/intel_bufmgr.h
deleted file mode 100644
index 3801ff31..00000000
--- a/libdrm/intel/intel_bufmgr.h
+++ /dev/null
@@ -1,212 +0,0 @@
-/*
- * Copyright © 2008 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- *
- * Authors:
- *    Eric Anholt <eric@anholt.net>
- *
- */
-
-/**
- * @file intel_bufmgr.h
- *
- * Public definitions of Intel-specific bufmgr functions.
- */
-
-#ifndef INTEL_BUFMGR_H
-#define INTEL_BUFMGR_H
-
-#include <stdint.h>
-
-typedef struct _drm_intel_bufmgr drm_intel_bufmgr;
-typedef struct _drm_intel_bo drm_intel_bo;
-
-struct _drm_intel_bo {
-	/**
-	 * Size in bytes of the buffer object.
-	 *
-	 * The size may be larger than the size originally requested for the
-	 * allocation, such as being aligned to page size.
-	 */
-	unsigned long size;
-
-	/**
-	 * Alignment requirement for object
-	 *
-	 * Used for GTT mapping & pinning the object.
-	 */
-	unsigned long align;
-
-	/**
-	 * Last seen card virtual address (offset from the beginning of the
-	 * aperture) for the object.  This should be used to fill relocation
-	 * entries when calling drm_intel_bo_emit_reloc()
-	 */
-	unsigned long offset;
-
-	/**
-	 * Virtual address for accessing the buffer data.  Only valid while
-	 * mapped.
-	 */
-	void *virtual;
-
-	/** Buffer manager context associated with this buffer object */
-	drm_intel_bufmgr *bufmgr;
-
-	/**
-	 * MM-specific handle for accessing object
-	 */
-	int handle;
-};
-
-#define BO_ALLOC_FOR_RENDER (1<<0)
-
-drm_intel_bo *drm_intel_bo_alloc(drm_intel_bufmgr *bufmgr, const char *name,
-				 unsigned long size, unsigned int alignment);
-drm_intel_bo *drm_intel_bo_alloc_for_render(drm_intel_bufmgr *bufmgr,
-					    const char *name,
-					    unsigned long size,
-					    unsigned int alignment);
-drm_intel_bo *drm_intel_bo_alloc_tiled(drm_intel_bufmgr *bufmgr,
-				       const char *name,
-				       int x, int y, int cpp,
-				       uint32_t *tiling_mode,
-				       unsigned long *pitch,
-				       unsigned long flags);
-void drm_intel_bo_reference(drm_intel_bo *bo);
-void drm_intel_bo_unreference(drm_intel_bo *bo);
-int drm_intel_bo_map(drm_intel_bo *bo, int write_enable);
-int drm_intel_bo_unmap(drm_intel_bo *bo);
-
-int drm_intel_bo_subdata(drm_intel_bo *bo, unsigned long offset,
-			 unsigned long size, const void *data);
-int drm_intel_bo_get_subdata(drm_intel_bo *bo, unsigned long offset,
-			     unsigned long size, void *data);
-void drm_intel_bo_wait_rendering(drm_intel_bo *bo);
-
-void drm_intel_bufmgr_set_debug(drm_intel_bufmgr *bufmgr, int enable_debug);
-void drm_intel_bufmgr_destroy(drm_intel_bufmgr *bufmgr);
-int drm_intel_bo_exec(drm_intel_bo *bo, int used,
-		      drm_clip_rect_t * cliprects, int num_cliprects, int DR4);
-int drm_intel_bufmgr_check_aperture_space(drm_intel_bo ** bo_array, int count);
-
-int drm_intel_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
-			    drm_intel_bo *target_bo, uint32_t target_offset,
-			    uint32_t read_domains, uint32_t write_domain);
-int drm_intel_bo_pin(drm_intel_bo *bo, uint32_t alignment);
-int drm_intel_bo_unpin(drm_intel_bo *bo);
-int drm_intel_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
-			    uint32_t stride);
-int drm_intel_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
-			    uint32_t * swizzle_mode);
-int drm_intel_bo_flink(drm_intel_bo *bo, uint32_t * name);
-int drm_intel_bo_busy(drm_intel_bo *bo);
-
-int drm_intel_bo_disable_reuse(drm_intel_bo *bo);
-int drm_intel_bo_references(drm_intel_bo *bo, drm_intel_bo *target_bo);
-
-/* drm_intel_bufmgr_gem.c */
-drm_intel_bufmgr *drm_intel_bufmgr_gem_init(int fd, int batch_size);
-drm_intel_bo *drm_intel_bo_gem_create_from_name(drm_intel_bufmgr *bufmgr,
-						const char *name,
-						unsigned int handle);
-void drm_intel_bufmgr_gem_enable_reuse(drm_intel_bufmgr *bufmgr);
-int drm_intel_gem_bo_map_gtt(drm_intel_bo *bo);
-int drm_intel_gem_bo_unmap_gtt(drm_intel_bo *bo);
-void drm_intel_gem_bo_start_gtt_access(drm_intel_bo *bo, int write_enable);
-
-int drm_intel_get_pipe_from_crtc_id(drm_intel_bufmgr *bufmgr, int crtc_id);
-
-/* drm_intel_bufmgr_fake.c */
-drm_intel_bufmgr *drm_intel_bufmgr_fake_init(int fd,
-					     unsigned long low_offset,
-					     void *low_virtual,
-					     unsigned long size,
-					     volatile unsigned int
-					     *last_dispatch);
-void drm_intel_bufmgr_fake_set_last_dispatch(drm_intel_bufmgr *bufmgr,
-					     volatile unsigned int
-					     *last_dispatch);
-void drm_intel_bufmgr_fake_set_exec_callback(drm_intel_bufmgr *bufmgr,
-					     int (*exec) (drm_intel_bo *bo,
-							  unsigned int used,
-							  void *priv),
-					     void *priv);
-void drm_intel_bufmgr_fake_set_fence_callback(drm_intel_bufmgr *bufmgr,
-					      unsigned int (*emit) (void *priv),
-					      void (*wait) (unsigned int fence,
-							    void *priv),
-					      void *priv);
-drm_intel_bo *drm_intel_bo_fake_alloc_static(drm_intel_bufmgr *bufmgr,
-					     const char *name,
-					     unsigned long offset,
-					     unsigned long size, void *virtual);
-void drm_intel_bo_fake_disable_backing_store(drm_intel_bo *bo,
-					     void (*invalidate_cb) (drm_intel_bo
-								    * bo,
-								    void *ptr),
-					     void *ptr);
-
-void drm_intel_bufmgr_fake_contended_lock_take(drm_intel_bufmgr *bufmgr);
-void drm_intel_bufmgr_fake_evict_all(drm_intel_bufmgr *bufmgr);
-
-/** @{ Compatibility defines to keep old code building despite the symbol rename
- * from dri_* to drm_intel_*
- */
-#define dri_bo drm_intel_bo
-#define dri_bufmgr drm_intel_bufmgr
-#define dri_bo_alloc drm_intel_bo_alloc
-#define dri_bo_reference drm_intel_bo_reference
-#define dri_bo_unreference drm_intel_bo_unreference
-#define dri_bo_map drm_intel_bo_map
-#define dri_bo_unmap drm_intel_bo_unmap
-#define dri_bo_subdata drm_intel_bo_subdata
-#define dri_bo_get_subdata drm_intel_bo_get_subdata
-#define dri_bo_wait_rendering drm_intel_bo_wait_rendering
-#define dri_bufmgr_set_debug drm_intel_bufmgr_set_debug
-#define dri_bufmgr_destroy drm_intel_bufmgr_destroy
-#define dri_bo_exec drm_intel_bo_exec
-#define dri_bufmgr_check_aperture_space drm_intel_bufmgr_check_aperture_space
-#define dri_bo_emit_reloc(reloc_bo, read, write, target_offset,		\
-			  reloc_offset, target_bo)			\
-	drm_intel_bo_emit_reloc(reloc_bo, reloc_offset,			\
-				target_bo, target_offset,		\
-				read, write);
-#define dri_bo_pin drm_intel_bo_pin
-#define dri_bo_unpin drm_intel_bo_unpin
-#define dri_bo_get_tiling drm_intel_bo_get_tiling
-#define dri_bo_set_tiling(bo, mode) drm_intel_bo_set_tiling(bo, mode, 0)
-#define dri_bo_flink drm_intel_bo_flink
-#define intel_bufmgr_gem_init drm_intel_bufmgr_gem_init
-#define intel_bo_gem_create_from_name drm_intel_bo_gem_create_from_name
-#define intel_bufmgr_gem_enable_reuse drm_intel_bufmgr_gem_enable_reuse
-#define intel_bufmgr_fake_init drm_intel_bufmgr_fake_init
-#define intel_bufmgr_fake_set_last_dispatch drm_intel_bufmgr_fake_set_last_dispatch
-#define intel_bufmgr_fake_set_exec_callback drm_intel_bufmgr_fake_set_exec_callback
-#define intel_bufmgr_fake_set_fence_callback drm_intel_bufmgr_fake_set_fence_callback
-#define intel_bo_fake_alloc_static drm_intel_bo_fake_alloc_static
-#define intel_bo_fake_disable_backing_store drm_intel_bo_fake_disable_backing_store
-#define intel_bufmgr_fake_contended_lock_take drm_intel_bufmgr_fake_contended_lock_take
-#define intel_bufmgr_fake_evict_all drm_intel_bufmgr_fake_evict_all
-
-/** @{ */
-
-#endif /* INTEL_BUFMGR_H */
diff --git a/libdrm/intel/intel_bufmgr_fake.c b/libdrm/intel/intel_bufmgr_fake.c
deleted file mode 100644
index 54b3cb80..00000000
--- a/libdrm/intel/intel_bufmgr_fake.c
+++ /dev/null
@@ -1,1610 +0,0 @@
-/**************************************************************************
- * 
- * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-/* Originally a fake version of the buffer manager so that we can
- * prototype the changes in a driver fairly quickly, has been fleshed
- * out to a fully functional interim solution.
- *
- * Basically wraps the old style memory management in the new
- * programming interface, but is more expressive and avoids many of
- * the bugs in the old texture manager.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include <stdlib.h>
-#include <string.h>
-#include <assert.h>
-#include <errno.h>
-#include <xf86drm.h>
-#include <pthread.h>
-#include "intel_bufmgr.h"
-#include "intel_bufmgr_priv.h"
-#include "drm.h"
-#include "i915_drm.h"
-#include "mm.h"
-#include "libdrm_lists.h"
-
-#define DBG(...) do {					\
-	if (bufmgr_fake->bufmgr.debug)			\
-		drmMsg(__VA_ARGS__);			\
-} while (0)
-
-/* Internal flags:
- */
-#define BM_NO_BACKING_STORE			0x00000001
-#define BM_NO_FENCE_SUBDATA			0x00000002
-#define BM_PINNED				0x00000004
-
-/* Wrapper around mm.c's mem_block, which understands that you must
- * wait for fences to expire before memory can be freed.  This is
- * specific to our use of memcpy for uploads - an upload that was
- * processed through the command queue wouldn't need to care about
- * fences.
- */
-#define MAX_RELOCS 4096
-
-struct fake_buffer_reloc {
-	/** Buffer object that the relocation points at. */
-	drm_intel_bo *target_buf;
-	/** Offset of the relocation entry within reloc_buf. */
-	uint32_t offset;
-	/**
-	 * Cached value of the offset when we last performed this relocation.
-	 */
-	uint32_t last_target_offset;
-	/** Value added to target_buf's offset to get the relocation entry. */
-	uint32_t delta;
-	/** Cache domains the target buffer is read into. */
-	uint32_t read_domains;
-	/** Cache domain the target buffer will have dirty cachelines in. */
-	uint32_t write_domain;
-};
-
-struct block {
-	struct block *next, *prev;
-	struct mem_block *mem;	/* BM_MEM_AGP */
-
-	/**
-	 * Marks that the block is currently in the aperture and has yet to be
-	 * fenced.
-	 */
-	unsigned on_hardware:1;
-	/**
-	 * Marks that the block is currently fenced (being used by rendering)
-	 * and can't be freed until @fence is passed.
-	 */
-	unsigned fenced:1;
-
-	/** Fence cookie for the block. */
-	unsigned fence;		/* Split to read_fence, write_fence */
-
-	drm_intel_bo *bo;
-	void *virtual;
-};
-
-typedef struct _bufmgr_fake {
-	drm_intel_bufmgr bufmgr;
-
-	pthread_mutex_t lock;
-
-	unsigned long low_offset;
-	unsigned long size;
-	void *virtual;
-
-	struct mem_block *heap;
-
-	unsigned buf_nr;	/* for generating ids */
-
-	/**
-	 * List of blocks which are currently in the GART but haven't been
-	 * fenced yet.
-	 */
-	struct block on_hardware;
-	/**
-	 * List of blocks which are in the GART and have an active fence on
-	 * them.
-	 */
-	struct block fenced;
-	/**
-	 * List of blocks which have an expired fence and are ready to be
-	 * evicted.
-	 */
-	struct block lru;
-
-	unsigned int last_fence;
-
-	unsigned fail:1;
-	unsigned need_fence:1;
-	int thrashing;
-
-	/**
-	 * Driver callback to emit a fence, returning the cookie.
-	 *
-	 * This allows the driver to hook in a replacement for the DRM usage in
-	 * bufmgr_fake.
-	 *
-	 * Currently, this also requires that a write flush be emitted before
-	 * emitting the fence, but this should change.
-	 */
-	unsigned int (*fence_emit) (void *private);
-	/** Driver callback to wait for a fence cookie to have passed. */
-	void (*fence_wait) (unsigned int fence, void *private);
-	void *fence_priv;
-
-	/**
-	 * Driver callback to execute a buffer.
-	 *
-	 * This allows the driver to hook in a replacement for the DRM usage in
-	 * bufmgr_fake.
-	 */
-	int (*exec) (drm_intel_bo *bo, unsigned int used, void *priv);
-	void *exec_priv;
-
-	/** Driver-supplied argument to driver callbacks */
-	void *driver_priv;
-	/**
-	 * Pointer to kernel-updated sarea data for the last completed user irq
-	 */
-	volatile int *last_dispatch;
-
-	int fd;
-
-	int debug;
-
-	int performed_rendering;
-} drm_intel_bufmgr_fake;
-
-typedef struct _drm_intel_bo_fake {
-	drm_intel_bo bo;
-
-	unsigned id;		/* debug only */
-	const char *name;
-
-	unsigned dirty:1;
-	/**
-	 * has the card written to this buffer - we make need to copy it back
-	 */
-	unsigned card_dirty:1;
-	unsigned int refcount;
-	/* Flags may consist of any of the DRM_BO flags, plus
-	 * DRM_BO_NO_BACKING_STORE and BM_NO_FENCE_SUBDATA, which are the
-	 * first two driver private flags.
-	 */
-	uint64_t flags;
-	/** Cache domains the target buffer is read into. */
-	uint32_t read_domains;
-	/** Cache domain the target buffer will have dirty cachelines in. */
-	uint32_t write_domain;
-
-	unsigned int alignment;
-	int is_static, validated;
-	unsigned int map_count;
-
-	/** relocation list */
-	struct fake_buffer_reloc *relocs;
-	int nr_relocs;
-	/**
-	 * Total size of the target_bos of this buffer.
-	 *
-	 * Used for estimation in check_aperture.
-	 */
-	unsigned int child_size;
-
-	struct block *block;
-	void *backing_store;
-	void (*invalidate_cb) (drm_intel_bo *bo, void *ptr);
-	void *invalidate_ptr;
-} drm_intel_bo_fake;
-
-static int clear_fenced(drm_intel_bufmgr_fake *bufmgr_fake,
-			unsigned int fence_cookie);
-
-#define MAXFENCE 0x7fffffff
-
-static int
-FENCE_LTE(unsigned a, unsigned b)
-{
-	if (a == b)
-		return 1;
-
-	if (a < b && b - a < (1 << 24))
-		return 1;
-
-	if (a > b && MAXFENCE - a + b < (1 << 24))
-		return 1;
-
-	return 0;
-}
-
-void
-drm_intel_bufmgr_fake_set_fence_callback(drm_intel_bufmgr *bufmgr,
-					 unsigned int (*emit) (void *priv),
-					 void (*wait) (unsigned int fence,
-						       void *priv),
-					 void *priv)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake = (drm_intel_bufmgr_fake *) bufmgr;
-
-	bufmgr_fake->fence_emit = emit;
-	bufmgr_fake->fence_wait = wait;
-	bufmgr_fake->fence_priv = priv;
-}
-
-static unsigned int
-_fence_emit_internal(drm_intel_bufmgr_fake *bufmgr_fake)
-{
-	struct drm_i915_irq_emit ie;
-	int ret, seq = 1;
-
-	if (bufmgr_fake->fence_emit != NULL) {
-		seq = bufmgr_fake->fence_emit(bufmgr_fake->fence_priv);
-		return seq;
-	}
-
-	ie.irq_seq = &seq;
-	ret = drmCommandWriteRead(bufmgr_fake->fd, DRM_I915_IRQ_EMIT,
-				  &ie, sizeof(ie));
-	if (ret) {
-		drmMsg("%s: drm_i915_irq_emit: %d\n", __FUNCTION__, ret);
-		abort();
-	}
-
-	DBG("emit 0x%08x\n", seq);
-	return seq;
-}
-
-static void
-_fence_wait_internal(drm_intel_bufmgr_fake *bufmgr_fake, int seq)
-{
-	struct drm_i915_irq_wait iw;
-	int hw_seq, busy_count = 0;
-	int ret;
-	int kernel_lied;
-
-	if (bufmgr_fake->fence_wait != NULL) {
-		bufmgr_fake->fence_wait(seq, bufmgr_fake->fence_priv);
-		clear_fenced(bufmgr_fake, seq);
-		return;
-	}
-
-	DBG("wait 0x%08x\n", iw.irq_seq);
-
-	iw.irq_seq = seq;
-
-	/* The kernel IRQ_WAIT implementation is all sorts of broken.
-	 * 1) It returns 1 to 0x7fffffff instead of using the full 32-bit
-	 *    unsigned range.
-	 * 2) It returns 0 if hw_seq >= seq, not seq - hw_seq < 0 on the 32-bit
-	 *    signed range.
-	 * 3) It waits if seq < hw_seq, not seq - hw_seq > 0 on the 32-bit
-	 *    signed range.
-	 * 4) It returns -EBUSY in 3 seconds even if the hardware is still
-	 *    successfully chewing through buffers.
-	 *
-	 * Assume that in userland we treat sequence numbers as ints, which
-	 * makes some of the comparisons convenient, since the sequence
-	 * numbers are all postive signed integers.
-	 *
-	 * From this we get several cases we need to handle.  Here's a timeline.
-	 * 0x2   0x7                                    0x7ffffff8   0x7ffffffd
-	 *   |    |                                             |    |
-	 * ------------------------------------------------------------
-	 *
-	 * A) Normal wait for hw to catch up
-	 * hw_seq seq
-	 *   |    |
-	 * ------------------------------------------------------------
-	 * seq - hw_seq = 5.  If we call IRQ_WAIT, it will wait for hw to
-	 * catch up.
-	 *
-	 * B) Normal wait for a sequence number that's already passed.
-	 * seq    hw_seq
-	 *   |    |
-	 * ------------------------------------------------------------
-	 * seq - hw_seq = -5.  If we call IRQ_WAIT, it returns 0 quickly.
-	 *
-	 * C) Hardware has already wrapped around ahead of us
-	 * hw_seq                                                    seq
-	 *   |                                                       |
-	 * ------------------------------------------------------------
-	 * seq - hw_seq = 0x80000000 - 5.  If we called IRQ_WAIT, it would wait
-	 * for hw_seq >= seq, which may never occur.  Thus, we want to catch
-	 * this in userland and return 0.
-	 *
-	 * D) We've wrapped around ahead of the hardware.
-	 * seq                                                      hw_seq
-	 *   |                                                       |
-	 * ------------------------------------------------------------
-	 * seq - hw_seq = -(0x80000000 - 5).  If we called IRQ_WAIT, it would
-	 * return 0 quickly because hw_seq >= seq, even though the hardware
-	 * isn't caught up. Thus, we need to catch this early return in
-	 * userland and bother the kernel until the hardware really does
-	 * catch up.
-	 *
-	 * E) Hardware might wrap after we test in userland.
-	 *                                                  hw_seq  seq
-	 *                                                      |    |
-	 * ------------------------------------------------------------
-	 * seq - hw_seq = 5.  If we call IRQ_WAIT, it will likely see seq >=
-	 * hw_seq and wait.  However, suppose hw_seq wraps before we make it
-	 * into the kernel.  The kernel sees hw_seq >= seq and waits for 3
-	 * seconds then returns -EBUSY.  This is case C).  We should catch
-	 * this and then return successfully.
-	 *
-	 * F) Hardware might take a long time on a buffer.
-	 * hw_seq seq
-	 *   |    |
-	 * -------------------------------------------------------------------
-	 * seq - hw_seq = 5.  If we call IRQ_WAIT, if sequence 2 through 5
-	 * take too long, it will return -EBUSY.  Batchbuffers in the
-	 * gltestperf demo were seen to take up to 7 seconds.  We should
-	 * catch early -EBUSY return and keep trying.
-	 */
-
-	do {
-		/* Keep a copy of last_dispatch so that if the wait -EBUSYs
-		 * because the hardware didn't catch up in 3 seconds, we can
-		 * see if it at least made progress and retry.
-		 */
-		hw_seq = *bufmgr_fake->last_dispatch;
-
-		/* Catch case C */
-		if (seq - hw_seq > 0x40000000)
-			return;
-
-		ret = drmCommandWrite(bufmgr_fake->fd, DRM_I915_IRQ_WAIT,
-				      &iw, sizeof(iw));
-		/* Catch case D */
-		kernel_lied = (ret == 0) && (seq - *bufmgr_fake->last_dispatch <
-					     -0x40000000);
-
-		/* Catch case E */
-		if (ret == -EBUSY
-		    && (seq - *bufmgr_fake->last_dispatch > 0x40000000))
-			ret = 0;
-
-		/* Catch case F: Allow up to 15 seconds chewing on one buffer. */
-		if ((ret == -EBUSY) && (hw_seq != *bufmgr_fake->last_dispatch))
-			busy_count = 0;
-		else
-			busy_count++;
-	} while (kernel_lied || ret == -EAGAIN || ret == -EINTR ||
-		 (ret == -EBUSY && busy_count < 5));
-
-	if (ret != 0) {
-		drmMsg("%s:%d: Error waiting for fence: %s.\n", __FILE__,
-		       __LINE__, strerror(-ret));
-		abort();
-	}
-	clear_fenced(bufmgr_fake, seq);
-}
-
-static int
-_fence_test(drm_intel_bufmgr_fake *bufmgr_fake, unsigned fence)
-{
-	/* Slight problem with wrap-around:
-	 */
-	return fence == 0 || FENCE_LTE(fence, bufmgr_fake->last_fence);
-}
-
-/**
- * Allocate a memory manager block for the buffer.
- */
-static int
-alloc_block(drm_intel_bo *bo)
-{
-	drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo;
-	drm_intel_bufmgr_fake *bufmgr_fake =
-	    (drm_intel_bufmgr_fake *) bo->bufmgr;
-	struct block *block = (struct block *)calloc(sizeof *block, 1);
-	unsigned int align_log2 = ffs(bo_fake->alignment) - 1;
-	unsigned int sz;
-
-	if (!block)
-		return 1;
-
-	sz = (bo->size + bo_fake->alignment - 1) & ~(bo_fake->alignment - 1);
-
-	block->mem = mmAllocMem(bufmgr_fake->heap, sz, align_log2, 0);
-	if (!block->mem) {
-		free(block);
-		return 0;
-	}
-
-	DRMINITLISTHEAD(block);
-
-	/* Insert at head or at tail??? */
-	DRMLISTADDTAIL(block, &bufmgr_fake->lru);
-
-	block->virtual = (uint8_t *) bufmgr_fake->virtual +
-	    block->mem->ofs - bufmgr_fake->low_offset;
-	block->bo = bo;
-
-	bo_fake->block = block;
-
-	return 1;
-}
-
-/* Release the card storage associated with buf:
- */
-static void
-free_block(drm_intel_bufmgr_fake *bufmgr_fake, struct block *block,
-	   int skip_dirty_copy)
-{
-	drm_intel_bo_fake *bo_fake;
-	DBG("free block %p %08x %d %d\n", block, block->mem->ofs,
-	    block->on_hardware, block->fenced);
-
-	if (!block)
-		return;
-
-	bo_fake = (drm_intel_bo_fake *) block->bo;
-
-	if (bo_fake->flags & (BM_PINNED | BM_NO_BACKING_STORE))
-		skip_dirty_copy = 1;
-
-	if (!skip_dirty_copy && (bo_fake->card_dirty == 1)) {
-		memcpy(bo_fake->backing_store, block->virtual, block->bo->size);
-		bo_fake->card_dirty = 0;
-		bo_fake->dirty = 1;
-	}
-
-	if (block->on_hardware) {
-		block->bo = NULL;
-	} else if (block->fenced) {
-		block->bo = NULL;
-	} else {
-		DBG("    - free immediately\n");
-		DRMLISTDEL(block);
-
-		mmFreeMem(block->mem);
-		free(block);
-	}
-}
-
-static void
-alloc_backing_store(drm_intel_bo *bo)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake =
-	    (drm_intel_bufmgr_fake *) bo->bufmgr;
-	drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo;
-	assert(!bo_fake->backing_store);
-	assert(!(bo_fake->flags & (BM_PINNED | BM_NO_BACKING_STORE)));
-
-	bo_fake->backing_store = malloc(bo->size);
-
-	DBG("alloc_backing - buf %d %p %d\n", bo_fake->id,
-	    bo_fake->backing_store, bo->size);
-	assert(bo_fake->backing_store);
-}
-
-static void
-free_backing_store(drm_intel_bo *bo)
-{
-	drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo;
-
-	if (bo_fake->backing_store) {
-		assert(!(bo_fake->flags & (BM_PINNED | BM_NO_BACKING_STORE)));
-		free(bo_fake->backing_store);
-		bo_fake->backing_store = NULL;
-	}
-}
-
-static void
-set_dirty(drm_intel_bo *bo)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake =
-	    (drm_intel_bufmgr_fake *) bo->bufmgr;
-	drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo;
-
-	if (bo_fake->flags & BM_NO_BACKING_STORE
-	    && bo_fake->invalidate_cb != NULL)
-		bo_fake->invalidate_cb(bo, bo_fake->invalidate_ptr);
-
-	assert(!(bo_fake->flags & BM_PINNED));
-
-	DBG("set_dirty - buf %d\n", bo_fake->id);
-	bo_fake->dirty = 1;
-}
-
-static int
-evict_lru(drm_intel_bufmgr_fake *bufmgr_fake, unsigned int max_fence)
-{
-	struct block *block, *tmp;
-
-	DBG("%s\n", __FUNCTION__);
-
-	DRMLISTFOREACHSAFE(block, tmp, &bufmgr_fake->lru) {
-		drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) block->bo;
-
-		if (bo_fake != NULL && (bo_fake->flags & BM_NO_FENCE_SUBDATA))
-			continue;
-
-		if (block->fence && max_fence && !FENCE_LTE(block->fence,
-							    max_fence))
-			return 0;
-
-		set_dirty(&bo_fake->bo);
-		bo_fake->block = NULL;
-
-		free_block(bufmgr_fake, block, 0);
-		return 1;
-	}
-
-	return 0;
-}
-
-static int
-evict_mru(drm_intel_bufmgr_fake *bufmgr_fake)
-{
-	struct block *block, *tmp;
-
-	DBG("%s\n", __FUNCTION__);
-
-	DRMLISTFOREACHSAFEREVERSE(block, tmp, &bufmgr_fake->lru) {
-		drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) block->bo;
-
-		if (bo_fake && (bo_fake->flags & BM_NO_FENCE_SUBDATA))
-			continue;
-
-		set_dirty(&bo_fake->bo);
-		bo_fake->block = NULL;
-
-		free_block(bufmgr_fake, block, 0);
-		return 1;
-	}
-
-	return 0;
-}
-
-/**
- * Removes all objects from the fenced list older than the given fence.
- */
-static int
-clear_fenced(drm_intel_bufmgr_fake *bufmgr_fake, unsigned int fence_cookie)
-{
-	struct block *block, *tmp;
-	int ret = 0;
-
-	bufmgr_fake->last_fence = fence_cookie;
-	DRMLISTFOREACHSAFE(block, tmp, &bufmgr_fake->fenced) {
-		assert(block->fenced);
-
-		if (_fence_test(bufmgr_fake, block->fence)) {
-
-			block->fenced = 0;
-
-			if (!block->bo) {
-				DBG("delayed free: offset %x sz %x\n",
-				    block->mem->ofs, block->mem->size);
-				DRMLISTDEL(block);
-				mmFreeMem(block->mem);
-				free(block);
-			} else {
-				DBG("return to lru: offset %x sz %x\n",
-				    block->mem->ofs, block->mem->size);
-				DRMLISTDEL(block);
-				DRMLISTADDTAIL(block, &bufmgr_fake->lru);
-			}
-
-			ret = 1;
-		} else {
-			/* Blocks are ordered by fence, so if one fails, all
-			 * from here will fail also:
-			 */
-			DBG("fence not passed: offset %x sz %x %d %d \n",
-			    block->mem->ofs, block->mem->size, block->fence,
-			    bufmgr_fake->last_fence);
-			break;
-		}
-	}
-
-	DBG("%s: %d\n", __FUNCTION__, ret);
-	return ret;
-}
-
-static void
-fence_blocks(drm_intel_bufmgr_fake *bufmgr_fake, unsigned fence)
-{
-	struct block *block, *tmp;
-
-	DRMLISTFOREACHSAFE(block, tmp, &bufmgr_fake->on_hardware) {
-		DBG("Fence block %p (sz 0x%x ofs %x buf %p) with fence %d\n",
-		    block, block->mem->size, block->mem->ofs, block->bo, fence);
-		block->fence = fence;
-
-		block->on_hardware = 0;
-		block->fenced = 1;
-
-		/* Move to tail of pending list here
-		 */
-		DRMLISTDEL(block);
-		DRMLISTADDTAIL(block, &bufmgr_fake->fenced);
-	}
-
-	assert(DRMLISTEMPTY(&bufmgr_fake->on_hardware));
-}
-
-static int
-evict_and_alloc_block(drm_intel_bo *bo)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake =
-	    (drm_intel_bufmgr_fake *) bo->bufmgr;
-	drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo;
-
-	assert(bo_fake->block == NULL);
-
-	/* Search for already free memory:
-	 */
-	if (alloc_block(bo))
-		return 1;
-
-	/* If we're not thrashing, allow lru eviction to dig deeper into
-	 * recently used textures.  We'll probably be thrashing soon:
-	 */
-	if (!bufmgr_fake->thrashing) {
-		while (evict_lru(bufmgr_fake, 0))
-			if (alloc_block(bo))
-				return 1;
-	}
-
-	/* Keep thrashing counter alive?
-	 */
-	if (bufmgr_fake->thrashing)
-		bufmgr_fake->thrashing = 20;
-
-	/* Wait on any already pending fences - here we are waiting for any
-	 * freed memory that has been submitted to hardware and fenced to
-	 * become available:
-	 */
-	while (!DRMLISTEMPTY(&bufmgr_fake->fenced)) {
-		uint32_t fence = bufmgr_fake->fenced.next->fence;
-		_fence_wait_internal(bufmgr_fake, fence);
-
-		if (alloc_block(bo))
-			return 1;
-	}
-
-	if (!DRMLISTEMPTY(&bufmgr_fake->on_hardware)) {
-		while (!DRMLISTEMPTY(&bufmgr_fake->fenced)) {
-			uint32_t fence = bufmgr_fake->fenced.next->fence;
-			_fence_wait_internal(bufmgr_fake, fence);
-		}
-
-		if (!bufmgr_fake->thrashing) {
-			DBG("thrashing\n");
-		}
-		bufmgr_fake->thrashing = 20;
-
-		if (alloc_block(bo))
-			return 1;
-	}
-
-	while (evict_mru(bufmgr_fake))
-		if (alloc_block(bo))
-			return 1;
-
-	DBG("%s 0x%x bytes failed\n", __FUNCTION__, bo->size);
-
-	return 0;
-}
-
-/***********************************************************************
- * Public functions
- */
-
-/**
- * Wait for hardware idle by emitting a fence and waiting for it.
- */
-static void
-drm_intel_bufmgr_fake_wait_idle(drm_intel_bufmgr_fake *bufmgr_fake)
-{
-	unsigned int cookie;
-
-	cookie = _fence_emit_internal(bufmgr_fake);
-	_fence_wait_internal(bufmgr_fake, cookie);
-}
-
-/**
- * Wait for rendering to a buffer to complete.
- *
- * It is assumed that the bathcbuffer which performed the rendering included
- * the necessary flushing.
- */
-static void
-drm_intel_fake_bo_wait_rendering_locked(drm_intel_bo *bo)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake =
-	    (drm_intel_bufmgr_fake *) bo->bufmgr;
-	drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo;
-
-	if (bo_fake->block == NULL || !bo_fake->block->fenced)
-		return;
-
-	_fence_wait_internal(bufmgr_fake, bo_fake->block->fence);
-}
-
-static void
-drm_intel_fake_bo_wait_rendering(drm_intel_bo *bo)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake =
-	    (drm_intel_bufmgr_fake *) bo->bufmgr;
-
-	pthread_mutex_lock(&bufmgr_fake->lock);
-	drm_intel_fake_bo_wait_rendering_locked(bo);
-	pthread_mutex_unlock(&bufmgr_fake->lock);
-}
-
-/* Specifically ignore texture memory sharing.
- *  -- just evict everything
- *  -- and wait for idle
- */
-void
-drm_intel_bufmgr_fake_contended_lock_take(drm_intel_bufmgr *bufmgr)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake = (drm_intel_bufmgr_fake *) bufmgr;
-	struct block *block, *tmp;
-
-	pthread_mutex_lock(&bufmgr_fake->lock);
-
-	bufmgr_fake->need_fence = 1;
-	bufmgr_fake->fail = 0;
-
-	/* Wait for hardware idle.  We don't know where acceleration has been
-	 * happening, so we'll need to wait anyway before letting anything get
-	 * put on the card again.
-	 */
-	drm_intel_bufmgr_fake_wait_idle(bufmgr_fake);
-
-	/* Check that we hadn't released the lock without having fenced the last
-	 * set of buffers.
-	 */
-	assert(DRMLISTEMPTY(&bufmgr_fake->fenced));
-	assert(DRMLISTEMPTY(&bufmgr_fake->on_hardware));
-
-	DRMLISTFOREACHSAFE(block, tmp, &bufmgr_fake->lru) {
-		assert(_fence_test(bufmgr_fake, block->fence));
-		set_dirty(block->bo);
-	}
-
-	pthread_mutex_unlock(&bufmgr_fake->lock);
-}
-
-static drm_intel_bo *
-drm_intel_fake_bo_alloc(drm_intel_bufmgr *bufmgr,
-			const char *name,
-			unsigned long size,
-			unsigned int alignment)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake;
-	drm_intel_bo_fake *bo_fake;
-
-	bufmgr_fake = (drm_intel_bufmgr_fake *) bufmgr;
-
-	assert(size != 0);
-
-	bo_fake = calloc(1, sizeof(*bo_fake));
-	if (!bo_fake)
-		return NULL;
-
-	bo_fake->bo.size = size;
-	bo_fake->bo.offset = -1;
-	bo_fake->bo.virtual = NULL;
-	bo_fake->bo.bufmgr = bufmgr;
-	bo_fake->refcount = 1;
-
-	/* Alignment must be a power of two */
-	assert((alignment & (alignment - 1)) == 0);
-	if (alignment == 0)
-		alignment = 1;
-	bo_fake->alignment = alignment;
-	bo_fake->id = ++bufmgr_fake->buf_nr;
-	bo_fake->name = name;
-	bo_fake->flags = 0;
-	bo_fake->is_static = 0;
-
-	DBG("drm_bo_alloc: (buf %d: %s, %d kb)\n", bo_fake->id, bo_fake->name,
-	    bo_fake->bo.size / 1024);
-
-	return &bo_fake->bo;
-}
-
-static drm_intel_bo *
-drm_intel_fake_bo_alloc_tiled(drm_intel_bufmgr * bufmgr,
-			      const char *name,
-			      int x, int y, int cpp,
-			      uint32_t *tiling_mode,
-			      unsigned long *pitch,
-			      unsigned long flags)
-{
-	unsigned long stride, aligned_y;
-
-	/* No runtime tiling support for fake. */
-	*tiling_mode = I915_TILING_NONE;
-
-	/* Align it for being a render target.  Shouldn't need anything else. */
-	stride = x * cpp;
-	stride = ROUND_UP_TO(stride, 64);
-
-	/* 965 subspan loading alignment */
-	aligned_y = ALIGN(y, 2);
-
-	*pitch = stride;
-
-	return drm_intel_fake_bo_alloc(bufmgr, name, stride * aligned_y,
-				       4096);
-}
-
-drm_intel_bo *
-drm_intel_bo_fake_alloc_static(drm_intel_bufmgr *bufmgr,
-			       const char *name,
-			       unsigned long offset,
-			       unsigned long size, void *virtual)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake;
-	drm_intel_bo_fake *bo_fake;
-
-	bufmgr_fake = (drm_intel_bufmgr_fake *) bufmgr;
-
-	assert(size != 0);
-
-	bo_fake = calloc(1, sizeof(*bo_fake));
-	if (!bo_fake)
-		return NULL;
-
-	bo_fake->bo.size = size;
-	bo_fake->bo.offset = offset;
-	bo_fake->bo.virtual = virtual;
-	bo_fake->bo.bufmgr = bufmgr;
-	bo_fake->refcount = 1;
-	bo_fake->id = ++bufmgr_fake->buf_nr;
-	bo_fake->name = name;
-	bo_fake->flags = BM_PINNED;
-	bo_fake->is_static = 1;
-
-	DBG("drm_bo_alloc_static: (buf %d: %s, %d kb)\n", bo_fake->id,
-	    bo_fake->name, bo_fake->bo.size / 1024);
-
-	return &bo_fake->bo;
-}
-
-static void
-drm_intel_fake_bo_reference(drm_intel_bo *bo)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake =
-	    (drm_intel_bufmgr_fake *) bo->bufmgr;
-	drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo;
-
-	pthread_mutex_lock(&bufmgr_fake->lock);
-	bo_fake->refcount++;
-	pthread_mutex_unlock(&bufmgr_fake->lock);
-}
-
-static void
-drm_intel_fake_bo_reference_locked(drm_intel_bo *bo)
-{
-	drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo;
-
-	bo_fake->refcount++;
-}
-
-static void
-drm_intel_fake_bo_unreference_locked(drm_intel_bo *bo)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake =
-	    (drm_intel_bufmgr_fake *) bo->bufmgr;
-	drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo;
-	int i;
-
-	if (--bo_fake->refcount == 0) {
-		assert(bo_fake->map_count == 0);
-		/* No remaining references, so free it */
-		if (bo_fake->block)
-			free_block(bufmgr_fake, bo_fake->block, 1);
-		free_backing_store(bo);
-
-		for (i = 0; i < bo_fake->nr_relocs; i++)
-			drm_intel_fake_bo_unreference_locked(bo_fake->relocs[i].
-							     target_buf);
-
-		DBG("drm_bo_unreference: free buf %d %s\n", bo_fake->id,
-		    bo_fake->name);
-
-		free(bo_fake->relocs);
-		free(bo);
-	}
-}
-
-static void
-drm_intel_fake_bo_unreference(drm_intel_bo *bo)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake =
-	    (drm_intel_bufmgr_fake *) bo->bufmgr;
-
-	pthread_mutex_lock(&bufmgr_fake->lock);
-	drm_intel_fake_bo_unreference_locked(bo);
-	pthread_mutex_unlock(&bufmgr_fake->lock);
-}
-
-/**
- * Set the buffer as not requiring backing store, and instead get the callback
- * invoked whenever it would be set dirty.
- */
-void
-drm_intel_bo_fake_disable_backing_store(drm_intel_bo *bo,
-					void (*invalidate_cb) (drm_intel_bo *bo,
-							       void *ptr),
-					void *ptr)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake =
-	    (drm_intel_bufmgr_fake *) bo->bufmgr;
-	drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo;
-
-	pthread_mutex_lock(&bufmgr_fake->lock);
-
-	if (bo_fake->backing_store)
-		free_backing_store(bo);
-
-	bo_fake->flags |= BM_NO_BACKING_STORE;
-
-	DBG("disable_backing_store set buf %d dirty\n", bo_fake->id);
-	bo_fake->dirty = 1;
-	bo_fake->invalidate_cb = invalidate_cb;
-	bo_fake->invalidate_ptr = ptr;
-
-	/* Note that it is invalid right from the start.  Also note
-	 * invalidate_cb is called with the bufmgr locked, so cannot
-	 * itself make bufmgr calls.
-	 */
-	if (invalidate_cb != NULL)
-		invalidate_cb(bo, ptr);
-
-	pthread_mutex_unlock(&bufmgr_fake->lock);
-}
-
-/**
- * Map a buffer into bo->virtual, allocating either card memory space (If
- * BM_NO_BACKING_STORE or BM_PINNED) or backing store, as necessary.
- */
-static int
- drm_intel_fake_bo_map_locked(drm_intel_bo *bo, int write_enable)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake =
-	    (drm_intel_bufmgr_fake *) bo->bufmgr;
-	drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo;
-
-	/* Static buffers are always mapped. */
-	if (bo_fake->is_static) {
-		if (bo_fake->card_dirty) {
-			drm_intel_bufmgr_fake_wait_idle(bufmgr_fake);
-			bo_fake->card_dirty = 0;
-		}
-		return 0;
-	}
-
-	/* Allow recursive mapping.  Mesa may recursively map buffers with
-	 * nested display loops, and it is used internally in bufmgr_fake
-	 * for relocation.
-	 */
-	if (bo_fake->map_count++ != 0)
-		return 0;
-
-	{
-		DBG("drm_bo_map: (buf %d: %s, %d kb)\n", bo_fake->id,
-		    bo_fake->name, bo_fake->bo.size / 1024);
-
-		if (bo->virtual != NULL) {
-			drmMsg("%s: already mapped\n", __FUNCTION__);
-			abort();
-		} else if (bo_fake->flags & (BM_NO_BACKING_STORE | BM_PINNED)) {
-
-			if (!bo_fake->block && !evict_and_alloc_block(bo)) {
-				DBG("%s: alloc failed\n", __FUNCTION__);
-				bufmgr_fake->fail = 1;
-				return 1;
-			} else {
-				assert(bo_fake->block);
-				bo_fake->dirty = 0;
-
-				if (!(bo_fake->flags & BM_NO_FENCE_SUBDATA) &&
-				    bo_fake->block->fenced) {
-					drm_intel_fake_bo_wait_rendering_locked
-					    (bo);
-				}
-
-				bo->virtual = bo_fake->block->virtual;
-			}
-		} else {
-			if (write_enable)
-				set_dirty(bo);
-
-			if (bo_fake->backing_store == 0)
-				alloc_backing_store(bo);
-
-			if ((bo_fake->card_dirty == 1) && bo_fake->block) {
-				if (bo_fake->block->fenced)
-					drm_intel_fake_bo_wait_rendering_locked
-					    (bo);
-
-				memcpy(bo_fake->backing_store,
-				       bo_fake->block->virtual,
-				       bo_fake->block->bo->size);
-				bo_fake->card_dirty = 0;
-			}
-
-			bo->virtual = bo_fake->backing_store;
-		}
-	}
-
-	return 0;
-}
-
-static int
- drm_intel_fake_bo_map(drm_intel_bo *bo, int write_enable)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake =
-	    (drm_intel_bufmgr_fake *) bo->bufmgr;
-	int ret;
-
-	pthread_mutex_lock(&bufmgr_fake->lock);
-	ret = drm_intel_fake_bo_map_locked(bo, write_enable);
-	pthread_mutex_unlock(&bufmgr_fake->lock);
-
-	return ret;
-}
-
-static int
- drm_intel_fake_bo_unmap_locked(drm_intel_bo *bo)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake =
-	    (drm_intel_bufmgr_fake *) bo->bufmgr;
-	drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo;
-
-	/* Static buffers are always mapped. */
-	if (bo_fake->is_static)
-		return 0;
-
-	assert(bo_fake->map_count != 0);
-	if (--bo_fake->map_count != 0)
-		return 0;
-
-	DBG("drm_bo_unmap: (buf %d: %s, %d kb)\n", bo_fake->id, bo_fake->name,
-	    bo_fake->bo.size / 1024);
-
-	bo->virtual = NULL;
-
-	return 0;
-}
-
-static int drm_intel_fake_bo_unmap(drm_intel_bo *bo)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake =
-	    (drm_intel_bufmgr_fake *) bo->bufmgr;
-	int ret;
-
-	pthread_mutex_lock(&bufmgr_fake->lock);
-	ret = drm_intel_fake_bo_unmap_locked(bo);
-	pthread_mutex_unlock(&bufmgr_fake->lock);
-
-	return ret;
-}
-
-static void
- drm_intel_fake_kick_all_locked(drm_intel_bufmgr_fake *bufmgr_fake)
-{
-	struct block *block, *tmp;
-
-	bufmgr_fake->performed_rendering = 0;
-	/* okay for ever BO that is on the HW kick it off.
-	   seriously not afraid of the POLICE right now */
-	DRMLISTFOREACHSAFE(block, tmp, &bufmgr_fake->on_hardware) {
-		drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) block->bo;
-
-		block->on_hardware = 0;
-		free_block(bufmgr_fake, block, 0);
-		bo_fake->block = NULL;
-		bo_fake->validated = 0;
-		if (!(bo_fake->flags & BM_NO_BACKING_STORE))
-			bo_fake->dirty = 1;
-	}
-
-}
-
-static int
- drm_intel_fake_bo_validate(drm_intel_bo *bo)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake;
-	drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo;
-
-	bufmgr_fake = (drm_intel_bufmgr_fake *) bo->bufmgr;
-
-	DBG("drm_bo_validate: (buf %d: %s, %d kb)\n", bo_fake->id,
-	    bo_fake->name, bo_fake->bo.size / 1024);
-
-	/* Sanity check: Buffers should be unmapped before being validated.
-	 * This is not so much of a problem for bufmgr_fake, but TTM refuses,
-	 * and the problem is harder to debug there.
-	 */
-	assert(bo_fake->map_count == 0);
-
-	if (bo_fake->is_static) {
-		/* Add it to the needs-fence list */
-		bufmgr_fake->need_fence = 1;
-		return 0;
-	}
-
-	/* Allocate the card memory */
-	if (!bo_fake->block && !evict_and_alloc_block(bo)) {
-		bufmgr_fake->fail = 1;
-		DBG("Failed to validate buf %d:%s\n", bo_fake->id,
-		    bo_fake->name);
-		return -1;
-	}
-
-	assert(bo_fake->block);
-	assert(bo_fake->block->bo == &bo_fake->bo);
-
-	bo->offset = bo_fake->block->mem->ofs;
-
-	/* Upload the buffer contents if necessary */
-	if (bo_fake->dirty) {
-		DBG("Upload dirty buf %d:%s, sz %d offset 0x%x\n", bo_fake->id,
-		    bo_fake->name, bo->size, bo_fake->block->mem->ofs);
-
-		assert(!(bo_fake->flags & (BM_NO_BACKING_STORE | BM_PINNED)));
-
-		/* Actually, should be able to just wait for a fence on the
-		 * mmory, hich we would be tracking when we free it.  Waiting
-		 * for idle is a sufficiently large hammer for now.
-		 */
-		drm_intel_bufmgr_fake_wait_idle(bufmgr_fake);
-
-		/* we may never have mapped this BO so it might not have any
-		 * backing store if this happens it should be rare, but 0 the
-		 * card memory in any case */
-		if (bo_fake->backing_store)
-			memcpy(bo_fake->block->virtual, bo_fake->backing_store,
-			       bo->size);
-		else
-			memset(bo_fake->block->virtual, 0, bo->size);
-
-		bo_fake->dirty = 0;
-	}
-
-	bo_fake->block->fenced = 0;
-	bo_fake->block->on_hardware = 1;
-	DRMLISTDEL(bo_fake->block);
-	DRMLISTADDTAIL(bo_fake->block, &bufmgr_fake->on_hardware);
-
-	bo_fake->validated = 1;
-	bufmgr_fake->need_fence = 1;
-
-	return 0;
-}
-
-static void
-drm_intel_fake_fence_validated(drm_intel_bufmgr *bufmgr)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake = (drm_intel_bufmgr_fake *) bufmgr;
-	unsigned int cookie;
-
-	cookie = _fence_emit_internal(bufmgr_fake);
-	fence_blocks(bufmgr_fake, cookie);
-
-	DBG("drm_fence_validated: 0x%08x cookie\n", cookie);
-}
-
-static void
-drm_intel_fake_destroy(drm_intel_bufmgr *bufmgr)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake = (drm_intel_bufmgr_fake *) bufmgr;
-
-	pthread_mutex_destroy(&bufmgr_fake->lock);
-	mmDestroy(bufmgr_fake->heap);
-	free(bufmgr);
-}
-
-static int
-drm_intel_fake_emit_reloc(drm_intel_bo *bo, uint32_t offset,
-			  drm_intel_bo *target_bo, uint32_t target_offset,
-			  uint32_t read_domains, uint32_t write_domain)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake =
-	    (drm_intel_bufmgr_fake *) bo->bufmgr;
-	struct fake_buffer_reloc *r;
-	drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo;
-	drm_intel_bo_fake *target_fake = (drm_intel_bo_fake *) target_bo;
-	int i;
-
-	pthread_mutex_lock(&bufmgr_fake->lock);
-
-	assert(bo);
-	assert(target_bo);
-
-	if (bo_fake->relocs == NULL) {
-		bo_fake->relocs =
-		    malloc(sizeof(struct fake_buffer_reloc) * MAX_RELOCS);
-	}
-
-	r = &bo_fake->relocs[bo_fake->nr_relocs++];
-
-	assert(bo_fake->nr_relocs <= MAX_RELOCS);
-
-	drm_intel_fake_bo_reference_locked(target_bo);
-
-	if (!target_fake->is_static) {
-		bo_fake->child_size +=
-		    ALIGN(target_bo->size, target_fake->alignment);
-		bo_fake->child_size += target_fake->child_size;
-	}
-	r->target_buf = target_bo;
-	r->offset = offset;
-	r->last_target_offset = target_bo->offset;
-	r->delta = target_offset;
-	r->read_domains = read_domains;
-	r->write_domain = write_domain;
-
-	if (bufmgr_fake->debug) {
-		/* Check that a conflicting relocation hasn't already been
-		 * emitted.
-		 */
-		for (i = 0; i < bo_fake->nr_relocs - 1; i++) {
-			struct fake_buffer_reloc *r2 = &bo_fake->relocs[i];
-
-			assert(r->offset != r2->offset);
-		}
-	}
-
-	pthread_mutex_unlock(&bufmgr_fake->lock);
-
-	return 0;
-}
-
-/**
- * Incorporates the validation flags associated with each relocation into
- * the combined validation flags for the buffer on this batchbuffer submission.
- */
-static void
-drm_intel_fake_calculate_domains(drm_intel_bo *bo)
-{
-	drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo;
-	int i;
-
-	for (i = 0; i < bo_fake->nr_relocs; i++) {
-		struct fake_buffer_reloc *r = &bo_fake->relocs[i];
-		drm_intel_bo_fake *target_fake =
-		    (drm_intel_bo_fake *) r->target_buf;
-
-		/* Do the same for the tree of buffers we depend on */
-		drm_intel_fake_calculate_domains(r->target_buf);
-
-		target_fake->read_domains |= r->read_domains;
-		target_fake->write_domain |= r->write_domain;
-	}
-}
-
-static int
-drm_intel_fake_reloc_and_validate_buffer(drm_intel_bo *bo)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake =
-	    (drm_intel_bufmgr_fake *) bo->bufmgr;
-	drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo;
-	int i, ret;
-
-	assert(bo_fake->map_count == 0);
-
-	for (i = 0; i < bo_fake->nr_relocs; i++) {
-		struct fake_buffer_reloc *r = &bo_fake->relocs[i];
-		drm_intel_bo_fake *target_fake =
-		    (drm_intel_bo_fake *) r->target_buf;
-		uint32_t reloc_data;
-
-		/* Validate the target buffer if that hasn't been done. */
-		if (!target_fake->validated) {
-			ret =
-			    drm_intel_fake_reloc_and_validate_buffer(r->target_buf);
-			if (ret != 0) {
-				if (bo->virtual != NULL)
-					drm_intel_fake_bo_unmap_locked(bo);
-				return ret;
-			}
-		}
-
-		/* Calculate the value of the relocation entry. */
-		if (r->target_buf->offset != r->last_target_offset) {
-			reloc_data = r->target_buf->offset + r->delta;
-
-			if (bo->virtual == NULL)
-				drm_intel_fake_bo_map_locked(bo, 1);
-
-			*(uint32_t *) ((uint8_t *) bo->virtual + r->offset) =
-			    reloc_data;
-
-			r->last_target_offset = r->target_buf->offset;
-		}
-	}
-
-	if (bo->virtual != NULL)
-		drm_intel_fake_bo_unmap_locked(bo);
-
-	if (bo_fake->write_domain != 0) {
-		if (!(bo_fake->flags & (BM_NO_BACKING_STORE | BM_PINNED))) {
-			if (bo_fake->backing_store == 0)
-				alloc_backing_store(bo);
-		}
-		bo_fake->card_dirty = 1;
-		bufmgr_fake->performed_rendering = 1;
-	}
-
-	return drm_intel_fake_bo_validate(bo);
-}
-
-static void
-drm_intel_bo_fake_post_submit(drm_intel_bo *bo)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake =
-	    (drm_intel_bufmgr_fake *) bo->bufmgr;
-	drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo;
-	int i;
-
-	for (i = 0; i < bo_fake->nr_relocs; i++) {
-		struct fake_buffer_reloc *r = &bo_fake->relocs[i];
-		drm_intel_bo_fake *target_fake =
-		    (drm_intel_bo_fake *) r->target_buf;
-
-		if (target_fake->validated)
-			drm_intel_bo_fake_post_submit(r->target_buf);
-
-		DBG("%s@0x%08x + 0x%08x -> %s@0x%08x + 0x%08x\n",
-		    bo_fake->name, (uint32_t) bo->offset, r->offset,
-		    target_fake->name, (uint32_t) r->target_buf->offset,
-		    r->delta);
-	}
-
-	assert(bo_fake->map_count == 0);
-	bo_fake->validated = 0;
-	bo_fake->read_domains = 0;
-	bo_fake->write_domain = 0;
-}
-
-void
-drm_intel_bufmgr_fake_set_exec_callback(drm_intel_bufmgr *bufmgr,
-					     int (*exec) (drm_intel_bo *bo,
-							  unsigned int used,
-							  void *priv),
-					     void *priv)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake = (drm_intel_bufmgr_fake *) bufmgr;
-
-	bufmgr_fake->exec = exec;
-	bufmgr_fake->exec_priv = priv;
-}
-
-static int
-drm_intel_fake_bo_exec(drm_intel_bo *bo, int used,
-		       drm_clip_rect_t * cliprects, int num_cliprects, int DR4)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake =
-	    (drm_intel_bufmgr_fake *) bo->bufmgr;
-	drm_intel_bo_fake *batch_fake = (drm_intel_bo_fake *) bo;
-	struct drm_i915_batchbuffer batch;
-	int ret;
-	int retry_count = 0;
-
-	pthread_mutex_lock(&bufmgr_fake->lock);
-
-	bufmgr_fake->performed_rendering = 0;
-
-	drm_intel_fake_calculate_domains(bo);
-
-	batch_fake->read_domains = I915_GEM_DOMAIN_COMMAND;
-
-	/* we've ran out of RAM so blow the whole lot away and retry */
-restart:
-	ret = drm_intel_fake_reloc_and_validate_buffer(bo);
-	if (bufmgr_fake->fail == 1) {
-		if (retry_count == 0) {
-			retry_count++;
-			drm_intel_fake_kick_all_locked(bufmgr_fake);
-			bufmgr_fake->fail = 0;
-			goto restart;
-		} else		/* dump out the memory here */
-			mmDumpMemInfo(bufmgr_fake->heap);
-	}
-
-	assert(ret == 0);
-
-	if (bufmgr_fake->exec != NULL) {
-		int ret = bufmgr_fake->exec(bo, used, bufmgr_fake->exec_priv);
-		if (ret != 0) {
-			pthread_mutex_unlock(&bufmgr_fake->lock);
-			return ret;
-		}
-	} else {
-		batch.start = bo->offset;
-		batch.used = used;
-		batch.cliprects = cliprects;
-		batch.num_cliprects = num_cliprects;
-		batch.DR1 = 0;
-		batch.DR4 = DR4;
-
-		if (drmCommandWrite
-		    (bufmgr_fake->fd, DRM_I915_BATCHBUFFER, &batch,
-		     sizeof(batch))) {
-			drmMsg("DRM_I915_BATCHBUFFER: %d\n", -errno);
-			pthread_mutex_unlock(&bufmgr_fake->lock);
-			return -errno;
-		}
-	}
-
-	drm_intel_fake_fence_validated(bo->bufmgr);
-
-	drm_intel_bo_fake_post_submit(bo);
-
-	pthread_mutex_unlock(&bufmgr_fake->lock);
-
-	return 0;
-}
-
-/**
- * Return an error if the list of BOs will exceed the aperture size.
- *
- * This is a rough guess and likely to fail, as during the validate sequence we
- * may place a buffer in an inopportune spot early on and then fail to fit
- * a set smaller than the aperture.
- */
-static int
-drm_intel_fake_check_aperture_space(drm_intel_bo ** bo_array, int count)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake =
-	    (drm_intel_bufmgr_fake *) bo_array[0]->bufmgr;
-	unsigned int sz = 0;
-	int i;
-
-	for (i = 0; i < count; i++) {
-		drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo_array[i];
-
-		if (bo_fake == NULL)
-			continue;
-
-		if (!bo_fake->is_static)
-			sz += ALIGN(bo_array[i]->size, bo_fake->alignment);
-		sz += bo_fake->child_size;
-	}
-
-	if (sz > bufmgr_fake->size) {
-		DBG("check_space: overflowed bufmgr size, %dkb vs %dkb\n",
-		    sz / 1024, bufmgr_fake->size / 1024);
-		return -1;
-	}
-
-	DBG("drm_check_space: sz %dkb vs bufgr %dkb\n", sz / 1024,
-	    bufmgr_fake->size / 1024);
-	return 0;
-}
-
-/**
- * Evicts all buffers, waiting for fences to pass and copying contents out
- * as necessary.
- *
- * Used by the X Server on LeaveVT, when the card memory is no longer our
- * own.
- */
-void drm_intel_bufmgr_fake_evict_all(drm_intel_bufmgr *bufmgr)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake = (drm_intel_bufmgr_fake *) bufmgr;
-	struct block *block, *tmp;
-
-	pthread_mutex_lock(&bufmgr_fake->lock);
-
-	bufmgr_fake->need_fence = 1;
-	bufmgr_fake->fail = 0;
-
-	/* Wait for hardware idle.  We don't know where acceleration has been
-	 * happening, so we'll need to wait anyway before letting anything get
-	 * put on the card again.
-	 */
-	drm_intel_bufmgr_fake_wait_idle(bufmgr_fake);
-
-	/* Check that we hadn't released the lock without having fenced the last
-	 * set of buffers.
-	 */
-	assert(DRMLISTEMPTY(&bufmgr_fake->fenced));
-	assert(DRMLISTEMPTY(&bufmgr_fake->on_hardware));
-
-	DRMLISTFOREACHSAFE(block, tmp, &bufmgr_fake->lru) {
-		drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) block->bo;
-		/* Releases the memory, and memcpys dirty contents out if
-		 * necessary.
-		 */
-		free_block(bufmgr_fake, block, 0);
-		bo_fake->block = NULL;
-	}
-
-	pthread_mutex_unlock(&bufmgr_fake->lock);
-}
-
-void drm_intel_bufmgr_fake_set_last_dispatch(drm_intel_bufmgr *bufmgr,
-					     volatile unsigned int
-					     *last_dispatch)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake = (drm_intel_bufmgr_fake *) bufmgr;
-
-	bufmgr_fake->last_dispatch = (volatile int *)last_dispatch;
-}
-
-drm_intel_bufmgr *drm_intel_bufmgr_fake_init(int fd,
-					     unsigned long low_offset,
-					     void *low_virtual,
-					     unsigned long size,
-					     volatile unsigned int
-					     *last_dispatch)
-{
-	drm_intel_bufmgr_fake *bufmgr_fake;
-
-	bufmgr_fake = calloc(1, sizeof(*bufmgr_fake));
-
-	if (pthread_mutex_init(&bufmgr_fake->lock, NULL) != 0) {
-		free(bufmgr_fake);
-		return NULL;
-	}
-
-	/* Initialize allocator */
-	DRMINITLISTHEAD(&bufmgr_fake->fenced);
-	DRMINITLISTHEAD(&bufmgr_fake->on_hardware);
-	DRMINITLISTHEAD(&bufmgr_fake->lru);
-
-	bufmgr_fake->low_offset = low_offset;
-	bufmgr_fake->virtual = low_virtual;
-	bufmgr_fake->size = size;
-	bufmgr_fake->heap = mmInit(low_offset, size);
-
-	/* Hook in methods */
-	bufmgr_fake->bufmgr.bo_alloc = drm_intel_fake_bo_alloc;
-	bufmgr_fake->bufmgr.bo_alloc_for_render = drm_intel_fake_bo_alloc;
-	bufmgr_fake->bufmgr.bo_alloc_tiled = drm_intel_fake_bo_alloc_tiled;
-	bufmgr_fake->bufmgr.bo_reference = drm_intel_fake_bo_reference;
-	bufmgr_fake->bufmgr.bo_unreference = drm_intel_fake_bo_unreference;
-	bufmgr_fake->bufmgr.bo_map = drm_intel_fake_bo_map;
-	bufmgr_fake->bufmgr.bo_unmap = drm_intel_fake_bo_unmap;
-	bufmgr_fake->bufmgr.bo_wait_rendering =
-	    drm_intel_fake_bo_wait_rendering;
-	bufmgr_fake->bufmgr.bo_emit_reloc = drm_intel_fake_emit_reloc;
-	bufmgr_fake->bufmgr.destroy = drm_intel_fake_destroy;
-	bufmgr_fake->bufmgr.bo_exec = drm_intel_fake_bo_exec;
-	bufmgr_fake->bufmgr.check_aperture_space =
-	    drm_intel_fake_check_aperture_space;
-	bufmgr_fake->bufmgr.debug = 0;
-
-	bufmgr_fake->fd = fd;
-	bufmgr_fake->last_dispatch = (volatile int *)last_dispatch;
-
-	return &bufmgr_fake->bufmgr;
-}
diff --git a/libdrm/intel/intel_bufmgr_gem.c b/libdrm/intel/intel_bufmgr_gem.c
deleted file mode 100644
index 87795f33..00000000
--- a/libdrm/intel/intel_bufmgr_gem.c
+++ /dev/null
@@ -1,1722 +0,0 @@
-/**************************************************************************
- *
- * Copyright © 2007 Red Hat Inc.
- * Copyright © 2007 Intel Corporation
- * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- *
- **************************************************************************/
-/*
- * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
- *          Keith Whitwell <keithw-at-tungstengraphics-dot-com>
- *	    Eric Anholt <eric@anholt.net>
- *	    Dave Airlie <airlied@linux.ie>
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include <xf86drm.h>
-#include <fcntl.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <unistd.h>
-#include <assert.h>
-#include <pthread.h>
-#include <sys/ioctl.h>
-#include <sys/mman.h>
-#include <sys/stat.h>
-#include <sys/types.h>
-
-#include "errno.h"
-#include "libdrm_lists.h"
-#include "intel_atomic.h"
-#include "intel_bufmgr.h"
-#include "intel_bufmgr_priv.h"
-#include "intel_chipset.h"
-#include "string.h"
-
-#include "i915_drm.h"
-
-#define DBG(...) do {					\
-	if (bufmgr_gem->bufmgr.debug)			\
-		fprintf(stderr, __VA_ARGS__);		\
-} while (0)
-
-typedef struct _drm_intel_bo_gem drm_intel_bo_gem;
-
-struct drm_intel_gem_bo_bucket {
-	drmMMListHead head;
-	unsigned long size;
-};
-
-/* Only cache objects up to 64MB.  Bigger than that, and the rounding of the
- * size makes many operations fail that wouldn't otherwise.
- */
-#define DRM_INTEL_GEM_BO_BUCKETS	14
-typedef struct _drm_intel_bufmgr_gem {
-	drm_intel_bufmgr bufmgr;
-
-	int fd;
-
-	int max_relocs;
-
-	pthread_mutex_t lock;
-
-	struct drm_i915_gem_exec_object *exec_objects;
-	drm_intel_bo **exec_bos;
-	int exec_size;
-	int exec_count;
-
-	/** Array of lists of cached gem objects of power-of-two sizes */
-	struct drm_intel_gem_bo_bucket cache_bucket[DRM_INTEL_GEM_BO_BUCKETS];
-
-	uint64_t gtt_size;
-	int available_fences;
-	int pci_device;
-	char bo_reuse;
-} drm_intel_bufmgr_gem;
-
-struct _drm_intel_bo_gem {
-	drm_intel_bo bo;
-
-	atomic_t refcount;
-	uint32_t gem_handle;
-	const char *name;
-
-	/**
-	 * Kenel-assigned global name for this object
-	 */
-	unsigned int global_name;
-
-	/**
-	 * Index of the buffer within the validation list while preparing a
-	 * batchbuffer execution.
-	 */
-	int validate_index;
-
-	/**
-	 * Current tiling mode
-	 */
-	uint32_t tiling_mode;
-	uint32_t swizzle_mode;
-
-	time_t free_time;
-
-	/** Array passed to the DRM containing relocation information. */
-	struct drm_i915_gem_relocation_entry *relocs;
-	/** Array of bos corresponding to relocs[i].target_handle */
-	drm_intel_bo **reloc_target_bo;
-	/** Number of entries in relocs */
-	int reloc_count;
-	/** Mapped address for the buffer, saved across map/unmap cycles */
-	void *mem_virtual;
-	/** GTT virtual address for the buffer, saved across map/unmap cycles */
-	void *gtt_virtual;
-
-	/** BO cache list */
-	drmMMListHead head;
-
-	/**
-	 * Boolean of whether this BO and its children have been included in
-	 * the current drm_intel_bufmgr_check_aperture_space() total.
-	 */
-	char included_in_check_aperture;
-
-	/**
-	 * Boolean of whether this buffer has been used as a relocation
-	 * target and had its size accounted for, and thus can't have any
-	 * further relocations added to it.
-	 */
-	char used_as_reloc_target;
-
-	/**
-	 * Boolean of whether this buffer can be re-used
-	 */
-	char reusable;
-
-	/**
-	 * Size in bytes of this buffer and its relocation descendents.
-	 *
-	 * Used to avoid costly tree walking in
-	 * drm_intel_bufmgr_check_aperture in the common case.
-	 */
-	int reloc_tree_size;
-
-	/**
-	 * Number of potential fence registers required by this buffer and its
-	 * relocations.
-	 */
-	int reloc_tree_fences;
-};
-
-static unsigned int
-drm_intel_gem_estimate_batch_space(drm_intel_bo ** bo_array, int count);
-
-static unsigned int
-drm_intel_gem_compute_batch_space(drm_intel_bo ** bo_array, int count);
-
-static int
-drm_intel_gem_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
-			    uint32_t * swizzle_mode);
-
-static int
-drm_intel_gem_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
-			    uint32_t stride);
-
-static void drm_intel_gem_bo_unreference_locked(drm_intel_bo *bo);
-static void drm_intel_gem_bo_unreference_locked_timed(drm_intel_bo *bo,
-						      time_t time);
-
-static void drm_intel_gem_bo_unreference(drm_intel_bo *bo);
-
-static void drm_intel_gem_bo_free(drm_intel_bo *bo);
-
-static unsigned long
-drm_intel_gem_bo_tile_size(drm_intel_bufmgr_gem *bufmgr_gem, unsigned long size,
-			   uint32_t *tiling_mode)
-{
-	unsigned long min_size, max_size;
-	unsigned long i;
-
-	if (*tiling_mode == I915_TILING_NONE)
-		return size;
-
-	/* 965+ just need multiples of page size for tiling */
-	if (IS_I965G(bufmgr_gem))
-		return ROUND_UP_TO(size, 4096);
-
-	/* Older chips need powers of two, of at least 512k or 1M */
-	if (IS_I9XX(bufmgr_gem)) {
-		min_size = 1024*1024;
-		max_size = 128*1024*1024;
-	} else {
-		min_size = 512*1024;
-		max_size = 64*1024*1024;
-	}
-
-	if (size > max_size) {
-		*tiling_mode = I915_TILING_NONE;
-		return size;
-	}
-
-	for (i = min_size; i < size; i <<= 1)
-		;
-
-	return i;
-}
-
-/*
- * Round a given pitch up to the minimum required for X tiling on a
- * given chip.  We use 512 as the minimum to allow for a later tiling
- * change.
- */
-static unsigned long
-drm_intel_gem_bo_tile_pitch(drm_intel_bufmgr_gem *bufmgr_gem,
-			    unsigned long pitch, uint32_t tiling_mode)
-{
-	unsigned long tile_width = 512;
-	unsigned long i;
-
-	if (tiling_mode == I915_TILING_NONE)
-		return ROUND_UP_TO(pitch, tile_width);
-
-	/* 965 is flexible */
-	if (IS_I965G(bufmgr_gem))
-		return ROUND_UP_TO(pitch, tile_width);
-
-	/* Pre-965 needs power of two tile width */
-	for (i = tile_width; i < pitch; i <<= 1)
-		;
-
-	return i;
-}
-
-static struct drm_intel_gem_bo_bucket *
-drm_intel_gem_bo_bucket_for_size(drm_intel_bufmgr_gem *bufmgr_gem,
-				 unsigned long size)
-{
-	int i;
-
-	for (i = 0; i < DRM_INTEL_GEM_BO_BUCKETS; i++) {
-		struct drm_intel_gem_bo_bucket *bucket =
-		    &bufmgr_gem->cache_bucket[i];
-		if (bucket->size >= size) {
-			return bucket;
-		}
-	}
-
-	return NULL;
-}
-
-static void
-drm_intel_gem_dump_validation_list(drm_intel_bufmgr_gem *bufmgr_gem)
-{
-	int i, j;
-
-	for (i = 0; i < bufmgr_gem->exec_count; i++) {
-		drm_intel_bo *bo = bufmgr_gem->exec_bos[i];
-		drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-
-		if (bo_gem->relocs == NULL) {
-			DBG("%2d: %d (%s)\n", i, bo_gem->gem_handle,
-			    bo_gem->name);
-			continue;
-		}
-
-		for (j = 0; j < bo_gem->reloc_count; j++) {
-			drm_intel_bo *target_bo = bo_gem->reloc_target_bo[j];
-			drm_intel_bo_gem *target_gem =
-			    (drm_intel_bo_gem *) target_bo;
-
-			DBG("%2d: %d (%s)@0x%08llx -> "
-			    "%d (%s)@0x%08lx + 0x%08x\n",
-			    i,
-			    bo_gem->gem_handle, bo_gem->name,
-			    (unsigned long long)bo_gem->relocs[j].offset,
-			    target_gem->gem_handle,
-			    target_gem->name,
-			    target_bo->offset,
-			    bo_gem->relocs[j].delta);
-		}
-	}
-}
-
-static void
-drm_intel_gem_bo_reference(drm_intel_bo *bo)
-{
-	drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-
-	assert(atomic_read(&bo_gem->refcount) > 0);
-	atomic_inc(&bo_gem->refcount);
-}
-
-/**
- * Adds the given buffer to the list of buffers to be validated (moved into the
- * appropriate memory type) with the next batch submission.
- *
- * If a buffer is validated multiple times in a batch submission, it ends up
- * with the intersection of the memory type flags and the union of the
- * access flags.
- */
-static void
-drm_intel_add_validate_buffer(drm_intel_bo *bo)
-{
-	drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr;
-	drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-	int index;
-
-	if (bo_gem->validate_index != -1)
-		return;
-
-	/* Extend the array of validation entries as necessary. */
-	if (bufmgr_gem->exec_count == bufmgr_gem->exec_size) {
-		int new_size = bufmgr_gem->exec_size * 2;
-
-		if (new_size == 0)
-			new_size = 5;
-
-		bufmgr_gem->exec_objects =
-		    realloc(bufmgr_gem->exec_objects,
-			    sizeof(*bufmgr_gem->exec_objects) * new_size);
-		bufmgr_gem->exec_bos =
-		    realloc(bufmgr_gem->exec_bos,
-			    sizeof(*bufmgr_gem->exec_bos) * new_size);
-		bufmgr_gem->exec_size = new_size;
-	}
-
-	index = bufmgr_gem->exec_count;
-	bo_gem->validate_index = index;
-	/* Fill in array entry */
-	bufmgr_gem->exec_objects[index].handle = bo_gem->gem_handle;
-	bufmgr_gem->exec_objects[index].relocation_count = bo_gem->reloc_count;
-	bufmgr_gem->exec_objects[index].relocs_ptr = (uintptr_t) bo_gem->relocs;
-	bufmgr_gem->exec_objects[index].alignment = 0;
-	bufmgr_gem->exec_objects[index].offset = 0;
-	bufmgr_gem->exec_bos[index] = bo;
-	drm_intel_gem_bo_reference(bo);
-	bufmgr_gem->exec_count++;
-}
-
-#define RELOC_BUF_SIZE(x) ((I915_RELOC_HEADER + x * I915_RELOC0_STRIDE) * \
-	sizeof(uint32_t))
-
-static int
-drm_intel_setup_reloc_list(drm_intel_bo *bo)
-{
-	drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-	drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr;
-	unsigned int max_relocs = bufmgr_gem->max_relocs;
-
-	if (bo->size / 4 < max_relocs)
-		max_relocs = bo->size / 4;
-
-	bo_gem->relocs = malloc(max_relocs *
-				sizeof(struct drm_i915_gem_relocation_entry));
-	bo_gem->reloc_target_bo = malloc(max_relocs * sizeof(drm_intel_bo *));
-
-	return 0;
-}
-
-static int
-drm_intel_gem_bo_busy(drm_intel_bo *bo)
-{
-	drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr;
-	drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-	struct drm_i915_gem_busy busy;
-	int ret;
-
-	memset(&busy, 0, sizeof(busy));
-	busy.handle = bo_gem->gem_handle;
-
-	ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_BUSY, &busy);
-
-	return (ret == 0 && busy.busy);
-}
-
-static int
-drm_intel_gem_bo_madvise(drm_intel_bufmgr_gem *bufmgr_gem,
-			 drm_intel_bo_gem *bo_gem, int state)
-{
-	struct drm_i915_gem_madvise madv;
-
-	madv.handle = bo_gem->gem_handle;
-	madv.madv = state;
-	madv.retained = 1;
-	ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_MADVISE, &madv);
-
-	return madv.retained;
-}
-
-/* drop the oldest entries that have been purged by the kernel */
-static void
-drm_intel_gem_bo_cache_purge_bucket(drm_intel_bufmgr_gem *bufmgr_gem,
-				    struct drm_intel_gem_bo_bucket *bucket)
-{
-	while (!DRMLISTEMPTY(&bucket->head)) {
-		drm_intel_bo_gem *bo_gem;
-
-		bo_gem = DRMLISTENTRY(drm_intel_bo_gem,
-				      bucket->head.next, head);
-		if (drm_intel_gem_bo_madvise
-		    (bufmgr_gem, bo_gem, I915_MADV_DONTNEED))
-			break;
-
-		DRMLISTDEL(&bo_gem->head);
-		drm_intel_gem_bo_free(&bo_gem->bo);
-	}
-}
-
-static drm_intel_bo *
-drm_intel_gem_bo_alloc_internal(drm_intel_bufmgr *bufmgr,
-				const char *name,
-				unsigned long size,
-				unsigned long flags)
-{
-	drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bufmgr;
-	drm_intel_bo_gem *bo_gem;
-	unsigned int page_size = getpagesize();
-	int ret;
-	struct drm_intel_gem_bo_bucket *bucket;
-	int alloc_from_cache;
-	unsigned long bo_size;
-	int for_render = 0;
-
-	if (flags & BO_ALLOC_FOR_RENDER)
-		for_render = 1;
-
-	/* Round the allocated size up to a power of two number of pages. */
-	bucket = drm_intel_gem_bo_bucket_for_size(bufmgr_gem, size);
-
-	/* If we don't have caching at this size, don't actually round the
-	 * allocation up.
-	 */
-	if (bucket == NULL) {
-		bo_size = size;
-		if (bo_size < page_size)
-			bo_size = page_size;
-	} else {
-		bo_size = bucket->size;
-	}
-
-	pthread_mutex_lock(&bufmgr_gem->lock);
-	/* Get a buffer out of the cache if available */
-retry:
-	alloc_from_cache = 0;
-	if (bucket != NULL && !DRMLISTEMPTY(&bucket->head)) {
-		if (for_render) {
-			/* Allocate new render-target BOs from the tail (MRU)
-			 * of the list, as it will likely be hot in the GPU
-			 * cache and in the aperture for us.
-			 */
-			bo_gem = DRMLISTENTRY(drm_intel_bo_gem,
-					      bucket->head.prev, head);
-			DRMLISTDEL(&bo_gem->head);
-			alloc_from_cache = 1;
-		} else {
-			/* For non-render-target BOs (where we're probably
-			 * going to map it first thing in order to fill it
-			 * with data), check if the last BO in the cache is
-			 * unbusy, and only reuse in that case. Otherwise,
-			 * allocating a new buffer is probably faster than
-			 * waiting for the GPU to finish.
-			 */
-			bo_gem = DRMLISTENTRY(drm_intel_bo_gem,
-					      bucket->head.next, head);
-			if (!drm_intel_gem_bo_busy(&bo_gem->bo)) {
-				alloc_from_cache = 1;
-				DRMLISTDEL(&bo_gem->head);
-			}
-		}
-
-		if (alloc_from_cache) {
-			if (!drm_intel_gem_bo_madvise
-			    (bufmgr_gem, bo_gem, I915_MADV_WILLNEED)) {
-				drm_intel_gem_bo_free(&bo_gem->bo);
-				drm_intel_gem_bo_cache_purge_bucket(bufmgr_gem,
-								    bucket);
-				goto retry;
-			}
-		}
-	}
-	pthread_mutex_unlock(&bufmgr_gem->lock);
-
-	if (!alloc_from_cache) {
-		struct drm_i915_gem_create create;
-
-		bo_gem = calloc(1, sizeof(*bo_gem));
-		if (!bo_gem)
-			return NULL;
-
-		bo_gem->bo.size = bo_size;
-		memset(&create, 0, sizeof(create));
-		create.size = bo_size;
-
-		ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_CREATE, &create);
-		bo_gem->gem_handle = create.handle;
-		bo_gem->bo.handle = bo_gem->gem_handle;
-		if (ret != 0) {
-			free(bo_gem);
-			return NULL;
-		}
-		bo_gem->bo.bufmgr = bufmgr;
-	}
-
-	bo_gem->name = name;
-	atomic_set(&bo_gem->refcount, 1);
-	bo_gem->validate_index = -1;
-	bo_gem->reloc_tree_size = bo_gem->bo.size;
-	bo_gem->reloc_tree_fences = 0;
-	bo_gem->used_as_reloc_target = 0;
-	bo_gem->tiling_mode = I915_TILING_NONE;
-	bo_gem->swizzle_mode = I915_BIT_6_SWIZZLE_NONE;
-	bo_gem->reusable = 1;
-
-	DBG("bo_create: buf %d (%s) %ldb\n",
-	    bo_gem->gem_handle, bo_gem->name, size);
-
-	return &bo_gem->bo;
-}
-
-static drm_intel_bo *
-drm_intel_gem_bo_alloc_for_render(drm_intel_bufmgr *bufmgr,
-				  const char *name,
-				  unsigned long size,
-				  unsigned int alignment)
-{
-	return drm_intel_gem_bo_alloc_internal(bufmgr, name, size,
-					       BO_ALLOC_FOR_RENDER);
-}
-
-static drm_intel_bo *
-drm_intel_gem_bo_alloc(drm_intel_bufmgr *bufmgr,
-		       const char *name,
-		       unsigned long size,
-		       unsigned int alignment)
-{
-	return drm_intel_gem_bo_alloc_internal(bufmgr, name, size, 0);
-}
-
-static drm_intel_bo *
-drm_intel_gem_bo_alloc_tiled(drm_intel_bufmgr *bufmgr, const char *name,
-			     int x, int y, int cpp, uint32_t *tiling_mode,
-			     unsigned long *pitch, unsigned long flags)
-{
-	drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bufmgr;
-	drm_intel_bo *bo;
-	unsigned long size, stride, aligned_y = y;
-	int ret;
-
-	if (*tiling_mode == I915_TILING_NONE)
-		aligned_y = ALIGN(y, 2);
-	else if (*tiling_mode == I915_TILING_X)
-		aligned_y = ALIGN(y, 8);
-	else if (*tiling_mode == I915_TILING_Y)
-		aligned_y = ALIGN(y, 32);
-
-	stride = x * cpp;
-	stride = drm_intel_gem_bo_tile_pitch(bufmgr_gem, stride, *tiling_mode);
-	size = stride * aligned_y;
-	size = drm_intel_gem_bo_tile_size(bufmgr_gem, size, tiling_mode);
-
-	bo = drm_intel_gem_bo_alloc_internal(bufmgr, name, size, flags);
-	if (!bo)
-		return NULL;
-
-	ret = drm_intel_gem_bo_set_tiling(bo, tiling_mode, stride);
-	if (ret != 0) {
-		drm_intel_gem_bo_unreference(bo);
-		return NULL;
-	}
-
-	*pitch = stride;
-
-	return bo;
-}
-
-/**
- * Returns a drm_intel_bo wrapping the given buffer object handle.
- *
- * This can be used when one application needs to pass a buffer object
- * to another.
- */
-drm_intel_bo *
-drm_intel_bo_gem_create_from_name(drm_intel_bufmgr *bufmgr,
-				  const char *name,
-				  unsigned int handle)
-{
-	drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bufmgr;
-	drm_intel_bo_gem *bo_gem;
-	int ret;
-	struct drm_gem_open open_arg;
-	struct drm_i915_gem_get_tiling get_tiling;
-
-	bo_gem = calloc(1, sizeof(*bo_gem));
-	if (!bo_gem)
-		return NULL;
-
-	memset(&open_arg, 0, sizeof(open_arg));
-	open_arg.name = handle;
-	ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_GEM_OPEN, &open_arg);
-	if (ret != 0) {
-		fprintf(stderr, "Couldn't reference %s handle 0x%08x: %s\n",
-			name, handle, strerror(errno));
-		free(bo_gem);
-		return NULL;
-	}
-	bo_gem->bo.size = open_arg.size;
-	bo_gem->bo.offset = 0;
-	bo_gem->bo.virtual = NULL;
-	bo_gem->bo.bufmgr = bufmgr;
-	bo_gem->name = name;
-	atomic_set(&bo_gem->refcount, 1);
-	bo_gem->validate_index = -1;
-	bo_gem->gem_handle = open_arg.handle;
-	bo_gem->global_name = handle;
-	bo_gem->reusable = 0;
-
-	memset(&get_tiling, 0, sizeof(get_tiling));
-	get_tiling.handle = bo_gem->gem_handle;
-	ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_GET_TILING, &get_tiling);
-	if (ret != 0) {
-		drm_intel_gem_bo_unreference(&bo_gem->bo);
-		return NULL;
-	}
-	bo_gem->tiling_mode = get_tiling.tiling_mode;
-	bo_gem->swizzle_mode = get_tiling.swizzle_mode;
-	if (bo_gem->tiling_mode == I915_TILING_NONE)
-		bo_gem->reloc_tree_fences = 0;
-	else
-		bo_gem->reloc_tree_fences = 1;
-
-	DBG("bo_create_from_handle: %d (%s)\n", handle, bo_gem->name);
-
-	return &bo_gem->bo;
-}
-
-static void
-drm_intel_gem_bo_free(drm_intel_bo *bo)
-{
-	drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr;
-	drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-	struct drm_gem_close close;
-	int ret;
-
-	if (bo_gem->mem_virtual)
-		munmap(bo_gem->mem_virtual, bo_gem->bo.size);
-	if (bo_gem->gtt_virtual)
-		munmap(bo_gem->gtt_virtual, bo_gem->bo.size);
-
-	free(bo_gem->reloc_target_bo);
-	free(bo_gem->relocs);
-
-	/* Close this object */
-	memset(&close, 0, sizeof(close));
-	close.handle = bo_gem->gem_handle;
-	ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_GEM_CLOSE, &close);
-	if (ret != 0) {
-		fprintf(stderr,
-			"DRM_IOCTL_GEM_CLOSE %d failed (%s): %s\n",
-			bo_gem->gem_handle, bo_gem->name, strerror(errno));
-	}
-	free(bo);
-}
-
-/** Frees all cached buffers significantly older than @time. */
-static void
-drm_intel_gem_cleanup_bo_cache(drm_intel_bufmgr_gem *bufmgr_gem, time_t time)
-{
-	int i;
-
-	for (i = 0; i < DRM_INTEL_GEM_BO_BUCKETS; i++) {
-		struct drm_intel_gem_bo_bucket *bucket =
-		    &bufmgr_gem->cache_bucket[i];
-
-		while (!DRMLISTEMPTY(&bucket->head)) {
-			drm_intel_bo_gem *bo_gem;
-
-			bo_gem = DRMLISTENTRY(drm_intel_bo_gem,
-					      bucket->head.next, head);
-			if (time - bo_gem->free_time <= 1)
-				break;
-
-			DRMLISTDEL(&bo_gem->head);
-
-			drm_intel_gem_bo_free(&bo_gem->bo);
-		}
-	}
-}
-
-static void
-drm_intel_gem_bo_unreference_final(drm_intel_bo *bo, time_t time)
-{
-	drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr;
-	drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-	struct drm_intel_gem_bo_bucket *bucket;
-	uint32_t tiling_mode;
-	int i;
-
-	/* Unreference all the target buffers */
-	for (i = 0; i < bo_gem->reloc_count; i++) {
-		drm_intel_gem_bo_unreference_locked_timed(bo_gem->
-							  reloc_target_bo[i],
-							  time);
-	}
-
-	DBG("bo_unreference final: %d (%s)\n",
-	    bo_gem->gem_handle, bo_gem->name);
-
-	bucket = drm_intel_gem_bo_bucket_for_size(bufmgr_gem, bo->size);
-	/* Put the buffer into our internal cache for reuse if we can. */
-	tiling_mode = I915_TILING_NONE;
-	if (bufmgr_gem->bo_reuse && bo_gem->reusable && bucket != NULL &&
-	    drm_intel_gem_bo_set_tiling(bo, &tiling_mode, 0) == 0) {
-		bo_gem->free_time = time;
-
-		bo_gem->name = NULL;
-		bo_gem->validate_index = -1;
-		bo_gem->reloc_count = 0;
-
-		DRMLISTADDTAIL(&bo_gem->head, &bucket->head);
-
-		drm_intel_gem_bo_madvise(bufmgr_gem, bo_gem,
-					 I915_MADV_DONTNEED);
-		drm_intel_gem_cleanup_bo_cache(bufmgr_gem, time);
-	} else {
-		drm_intel_gem_bo_free(bo);
-	}
-}
-
-static void drm_intel_gem_bo_unreference_locked(drm_intel_bo *bo)
-{
-	drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-
-	assert(atomic_read(&bo_gem->refcount) > 0);
-	if (atomic_dec_and_test(&bo_gem->refcount)) {
-		struct timespec time;
-
-		clock_gettime(CLOCK_MONOTONIC, &time);
-		drm_intel_gem_bo_unreference_final(bo, time.tv_sec);
-	}
-}
-
-static void drm_intel_gem_bo_unreference_locked_timed(drm_intel_bo *bo,
-						      time_t time)
-{
-	drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-
-	assert(atomic_read(&bo_gem->refcount) > 0);
-	if (atomic_dec_and_test(&bo_gem->refcount))
-		drm_intel_gem_bo_unreference_final(bo, time);
-}
-
-static void drm_intel_gem_bo_unreference(drm_intel_bo *bo)
-{
-	drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-
-	assert(atomic_read(&bo_gem->refcount) > 0);
-	if (atomic_dec_and_test(&bo_gem->refcount)) {
-		drm_intel_bufmgr_gem *bufmgr_gem =
-		    (drm_intel_bufmgr_gem *) bo->bufmgr;
-		struct timespec time;
-
-		clock_gettime(CLOCK_MONOTONIC, &time);
-
-		pthread_mutex_lock(&bufmgr_gem->lock);
-		drm_intel_gem_bo_unreference_final(bo, time.tv_sec);
-		pthread_mutex_unlock(&bufmgr_gem->lock);
-	}
-}
-
-static int drm_intel_gem_bo_map(drm_intel_bo *bo, int write_enable)
-{
-	drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr;
-	drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-	struct drm_i915_gem_set_domain set_domain;
-	int ret;
-
-	pthread_mutex_lock(&bufmgr_gem->lock);
-
-	/* Allow recursive mapping. Mesa may recursively map buffers with
-	 * nested display loops.
-	 */
-	if (!bo_gem->mem_virtual) {
-		struct drm_i915_gem_mmap mmap_arg;
-
-		DBG("bo_map: %d (%s)\n", bo_gem->gem_handle, bo_gem->name);
-
-		memset(&mmap_arg, 0, sizeof(mmap_arg));
-		mmap_arg.handle = bo_gem->gem_handle;
-		mmap_arg.offset = 0;
-		mmap_arg.size = bo->size;
-		ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_MMAP, &mmap_arg);
-		if (ret != 0) {
-			fprintf(stderr,
-				"%s:%d: Error mapping buffer %d (%s): %s .\n",
-				__FILE__, __LINE__, bo_gem->gem_handle,
-				bo_gem->name, strerror(errno));
-			pthread_mutex_unlock(&bufmgr_gem->lock);
-			return ret;
-		}
-		bo_gem->mem_virtual = (void *)(uintptr_t) mmap_arg.addr_ptr;
-	}
-	DBG("bo_map: %d (%s) -> %p\n", bo_gem->gem_handle, bo_gem->name,
-	    bo_gem->mem_virtual);
-	bo->virtual = bo_gem->mem_virtual;
-
-	set_domain.handle = bo_gem->gem_handle;
-	set_domain.read_domains = I915_GEM_DOMAIN_CPU;
-	if (write_enable)
-		set_domain.write_domain = I915_GEM_DOMAIN_CPU;
-	else
-		set_domain.write_domain = 0;
-	do {
-		ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN,
-			    &set_domain);
-	} while (ret == -1 && errno == EINTR);
-	if (ret != 0) {
-		fprintf(stderr, "%s:%d: Error setting to CPU domain %d: %s\n",
-			__FILE__, __LINE__, bo_gem->gem_handle,
-			strerror(errno));
-		pthread_mutex_unlock(&bufmgr_gem->lock);
-		return ret;
-	}
-
-	pthread_mutex_unlock(&bufmgr_gem->lock);
-
-	return 0;
-}
-
-int drm_intel_gem_bo_map_gtt(drm_intel_bo *bo)
-{
-	drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr;
-	drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-	struct drm_i915_gem_set_domain set_domain;
-	int ret;
-
-	pthread_mutex_lock(&bufmgr_gem->lock);
-
-	/* Get a mapping of the buffer if we haven't before. */
-	if (bo_gem->gtt_virtual == NULL) {
-		struct drm_i915_gem_mmap_gtt mmap_arg;
-
-		DBG("bo_map_gtt: mmap %d (%s)\n", bo_gem->gem_handle,
-		    bo_gem->name);
-
-		memset(&mmap_arg, 0, sizeof(mmap_arg));
-		mmap_arg.handle = bo_gem->gem_handle;
-
-		/* Get the fake offset back... */
-		ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_MMAP_GTT,
-			    &mmap_arg);
-		if (ret != 0) {
-			fprintf(stderr,
-				"%s:%d: Error preparing buffer map %d (%s): %s .\n",
-				__FILE__, __LINE__,
-				bo_gem->gem_handle, bo_gem->name,
-				strerror(errno));
-			pthread_mutex_unlock(&bufmgr_gem->lock);
-			return ret;
-		}
-
-		/* and mmap it */
-		bo_gem->gtt_virtual = mmap(0, bo->size, PROT_READ | PROT_WRITE,
-					   MAP_SHARED, bufmgr_gem->fd,
-					   mmap_arg.offset);
-		if (bo_gem->gtt_virtual == MAP_FAILED) {
-			fprintf(stderr,
-				"%s:%d: Error mapping buffer %d (%s): %s .\n",
-				__FILE__, __LINE__,
-				bo_gem->gem_handle, bo_gem->name,
-				strerror(errno));
-			pthread_mutex_unlock(&bufmgr_gem->lock);
-			return errno;
-		}
-	}
-
-	bo->virtual = bo_gem->gtt_virtual;
-
-	DBG("bo_map_gtt: %d (%s) -> %p\n", bo_gem->gem_handle, bo_gem->name,
-	    bo_gem->gtt_virtual);
-
-	/* Now move it to the GTT domain so that the CPU caches are flushed */
-	set_domain.handle = bo_gem->gem_handle;
-	set_domain.read_domains = I915_GEM_DOMAIN_GTT;
-	set_domain.write_domain = I915_GEM_DOMAIN_GTT;
-	do {
-		ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN,
-			    &set_domain);
-	} while (ret == -1 && errno == EINTR);
-
-	if (ret != 0) {
-		fprintf(stderr, "%s:%d: Error setting domain %d: %s\n",
-			__FILE__, __LINE__, bo_gem->gem_handle,
-			strerror(errno));
-	}
-
-	pthread_mutex_unlock(&bufmgr_gem->lock);
-
-	return 0;
-}
-
-int drm_intel_gem_bo_unmap_gtt(drm_intel_bo *bo)
-{
-	drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr;
-	drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-	int ret = 0;
-
-	if (bo == NULL)
-		return 0;
-
-	assert(bo_gem->gtt_virtual != NULL);
-
-	pthread_mutex_lock(&bufmgr_gem->lock);
-	bo->virtual = NULL;
-	pthread_mutex_unlock(&bufmgr_gem->lock);
-
-	return ret;
-}
-
-static int drm_intel_gem_bo_unmap(drm_intel_bo *bo)
-{
-	drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr;
-	drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-	struct drm_i915_gem_sw_finish sw_finish;
-	int ret;
-
-	if (bo == NULL)
-		return 0;
-
-	assert(bo_gem->mem_virtual != NULL);
-
-	pthread_mutex_lock(&bufmgr_gem->lock);
-
-	/* Cause a flush to happen if the buffer's pinned for scanout, so the
-	 * results show up in a timely manner.
-	 */
-	sw_finish.handle = bo_gem->gem_handle;
-	do {
-		ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_SW_FINISH,
-			    &sw_finish);
-	} while (ret == -1 && errno == EINTR);
-
-	bo->virtual = NULL;
-	pthread_mutex_unlock(&bufmgr_gem->lock);
-	return 0;
-}
-
-static int
-drm_intel_gem_bo_subdata(drm_intel_bo *bo, unsigned long offset,
-			 unsigned long size, const void *data)
-{
-	drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr;
-	drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-	struct drm_i915_gem_pwrite pwrite;
-	int ret;
-
-	memset(&pwrite, 0, sizeof(pwrite));
-	pwrite.handle = bo_gem->gem_handle;
-	pwrite.offset = offset;
-	pwrite.size = size;
-	pwrite.data_ptr = (uint64_t) (uintptr_t) data;
-	do {
-		ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_PWRITE, &pwrite);
-	} while (ret == -1 && errno == EINTR);
-	if (ret != 0) {
-		fprintf(stderr,
-			"%s:%d: Error writing data to buffer %d: (%d %d) %s .\n",
-			__FILE__, __LINE__, bo_gem->gem_handle, (int)offset,
-			(int)size, strerror(errno));
-	}
-	return 0;
-}
-
-static int
-drm_intel_gem_get_pipe_from_crtc_id(drm_intel_bufmgr *bufmgr, int crtc_id)
-{
-	drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bufmgr;
-	struct drm_i915_get_pipe_from_crtc_id get_pipe_from_crtc_id;
-	int ret;
-
-	get_pipe_from_crtc_id.crtc_id = crtc_id;
-	ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID,
-		    &get_pipe_from_crtc_id);
-	if (ret != 0) {
-		/* We return -1 here to signal that we don't
-		 * know which pipe is associated with this crtc.
-		 * This lets the caller know that this information
-		 * isn't available; using the wrong pipe for
-		 * vblank waiting can cause the chipset to lock up
-		 */
-		return -1;
-	}
-
-	return get_pipe_from_crtc_id.pipe;
-}
-
-static int
-drm_intel_gem_bo_get_subdata(drm_intel_bo *bo, unsigned long offset,
-			     unsigned long size, void *data)
-{
-	drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr;
-	drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-	struct drm_i915_gem_pread pread;
-	int ret;
-
-	memset(&pread, 0, sizeof(pread));
-	pread.handle = bo_gem->gem_handle;
-	pread.offset = offset;
-	pread.size = size;
-	pread.data_ptr = (uint64_t) (uintptr_t) data;
-	do {
-		ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_PREAD, &pread);
-	} while (ret == -1 && errno == EINTR);
-	if (ret != 0) {
-		fprintf(stderr,
-			"%s:%d: Error reading data from buffer %d: (%d %d) %s .\n",
-			__FILE__, __LINE__, bo_gem->gem_handle, (int)offset,
-			(int)size, strerror(errno));
-	}
-	return 0;
-}
-
-/** Waits for all GPU rendering to the object to have completed. */
-static void
-drm_intel_gem_bo_wait_rendering(drm_intel_bo *bo)
-{
-	drm_intel_gem_bo_start_gtt_access(bo, 0);
-}
-
-/**
- * Sets the object to the GTT read and possibly write domain, used by the X
- * 2D driver in the absence of kernel support to do drm_intel_gem_bo_map_gtt().
- *
- * In combination with drm_intel_gem_bo_pin() and manual fence management, we
- * can do tiled pixmaps this way.
- */
-void
-drm_intel_gem_bo_start_gtt_access(drm_intel_bo *bo, int write_enable)
-{
-	drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr;
-	drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-	struct drm_i915_gem_set_domain set_domain;
-	int ret;
-
-	set_domain.handle = bo_gem->gem_handle;
-	set_domain.read_domains = I915_GEM_DOMAIN_GTT;
-	set_domain.write_domain = write_enable ? I915_GEM_DOMAIN_GTT : 0;
-	do {
-		ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN,
-			    &set_domain);
-	} while (ret == -1 && errno == EINTR);
-	if (ret != 0) {
-		fprintf(stderr,
-			"%s:%d: Error setting memory domains %d (%08x %08x): %s .\n",
-			__FILE__, __LINE__, bo_gem->gem_handle,
-			set_domain.read_domains, set_domain.write_domain,
-			strerror(errno));
-	}
-}
-
-static void
-drm_intel_bufmgr_gem_destroy(drm_intel_bufmgr *bufmgr)
-{
-	drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bufmgr;
-	int i;
-
-	free(bufmgr_gem->exec_objects);
-	free(bufmgr_gem->exec_bos);
-
-	pthread_mutex_destroy(&bufmgr_gem->lock);
-
-	/* Free any cached buffer objects we were going to reuse */
-	for (i = 0; i < DRM_INTEL_GEM_BO_BUCKETS; i++) {
-		struct drm_intel_gem_bo_bucket *bucket =
-		    &bufmgr_gem->cache_bucket[i];
-		drm_intel_bo_gem *bo_gem;
-
-		while (!DRMLISTEMPTY(&bucket->head)) {
-			bo_gem = DRMLISTENTRY(drm_intel_bo_gem,
-					      bucket->head.next, head);
-			DRMLISTDEL(&bo_gem->head);
-
-			drm_intel_gem_bo_free(&bo_gem->bo);
-		}
-	}
-
-	free(bufmgr);
-}
-
-/**
- * Adds the target buffer to the validation list and adds the relocation
- * to the reloc_buffer's relocation list.
- *
- * The relocation entry at the given offset must already contain the
- * precomputed relocation value, because the kernel will optimize out
- * the relocation entry write when the buffer hasn't moved from the
- * last known offset in target_bo.
- */
-static int
-drm_intel_gem_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
-			    drm_intel_bo *target_bo, uint32_t target_offset,
-			    uint32_t read_domains, uint32_t write_domain)
-{
-	drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr;
-	drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-	drm_intel_bo_gem *target_bo_gem = (drm_intel_bo_gem *) target_bo;
-
-	pthread_mutex_lock(&bufmgr_gem->lock);
-
-	/* Create a new relocation list if needed */
-	if (bo_gem->relocs == NULL)
-		drm_intel_setup_reloc_list(bo);
-
-	/* Check overflow */
-	assert(bo_gem->reloc_count < bufmgr_gem->max_relocs);
-
-	/* Check args */
-	assert(offset <= bo->size - 4);
-	assert((write_domain & (write_domain - 1)) == 0);
-
-	/* Make sure that we're not adding a reloc to something whose size has
-	 * already been accounted for.
-	 */
-	assert(!bo_gem->used_as_reloc_target);
-	bo_gem->reloc_tree_size += target_bo_gem->reloc_tree_size;
-	bo_gem->reloc_tree_fences += target_bo_gem->reloc_tree_fences;
-
-	/* Flag the target to disallow further relocations in it. */
-	target_bo_gem->used_as_reloc_target = 1;
-
-	bo_gem->relocs[bo_gem->reloc_count].offset = offset;
-	bo_gem->relocs[bo_gem->reloc_count].delta = target_offset;
-	bo_gem->relocs[bo_gem->reloc_count].target_handle =
-	    target_bo_gem->gem_handle;
-	bo_gem->relocs[bo_gem->reloc_count].read_domains = read_domains;
-	bo_gem->relocs[bo_gem->reloc_count].write_domain = write_domain;
-	bo_gem->relocs[bo_gem->reloc_count].presumed_offset = target_bo->offset;
-
-	bo_gem->reloc_target_bo[bo_gem->reloc_count] = target_bo;
-	drm_intel_gem_bo_reference(target_bo);
-
-	bo_gem->reloc_count++;
-
-	pthread_mutex_unlock(&bufmgr_gem->lock);
-
-	return 0;
-}
-
-/**
- * Walk the tree of relocations rooted at BO and accumulate the list of
- * validations to be performed and update the relocation buffers with
- * index values into the validation list.
- */
-static void
-drm_intel_gem_bo_process_reloc(drm_intel_bo *bo)
-{
-	drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-	int i;
-
-	if (bo_gem->relocs == NULL)
-		return;
-
-	for (i = 0; i < bo_gem->reloc_count; i++) {
-		drm_intel_bo *target_bo = bo_gem->reloc_target_bo[i];
-
-		/* Continue walking the tree depth-first. */
-		drm_intel_gem_bo_process_reloc(target_bo);
-
-		/* Add the target to the validate list */
-		drm_intel_add_validate_buffer(target_bo);
-	}
-}
-
-static void
-drm_intel_update_buffer_offsets(drm_intel_bufmgr_gem *bufmgr_gem)
-{
-	int i;
-
-	for (i = 0; i < bufmgr_gem->exec_count; i++) {
-		drm_intel_bo *bo = bufmgr_gem->exec_bos[i];
-		drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-
-		/* Update the buffer offset */
-		if (bufmgr_gem->exec_objects[i].offset != bo->offset) {
-			DBG("BO %d (%s) migrated: 0x%08lx -> 0x%08llx\n",
-			    bo_gem->gem_handle, bo_gem->name, bo->offset,
-			    (unsigned long long)bufmgr_gem->exec_objects[i].
-			    offset);
-			bo->offset = bufmgr_gem->exec_objects[i].offset;
-		}
-	}
-}
-
-static int
-drm_intel_gem_bo_exec(drm_intel_bo *bo, int used,
-		      drm_clip_rect_t * cliprects, int num_cliprects, int DR4)
-{
-	drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr;
-	struct drm_i915_gem_execbuffer execbuf;
-	int ret, i;
-
-	pthread_mutex_lock(&bufmgr_gem->lock);
-	/* Update indices and set up the validate list. */
-	drm_intel_gem_bo_process_reloc(bo);
-
-	/* Add the batch buffer to the validation list.  There are no
-	 * relocations pointing to it.
-	 */
-	drm_intel_add_validate_buffer(bo);
-
-	execbuf.buffers_ptr = (uintptr_t) bufmgr_gem->exec_objects;
-	execbuf.buffer_count = bufmgr_gem->exec_count;
-	execbuf.batch_start_offset = 0;
-	execbuf.batch_len = used;
-	execbuf.cliprects_ptr = (uintptr_t) cliprects;
-	execbuf.num_cliprects = num_cliprects;
-	execbuf.DR1 = 0;
-	execbuf.DR4 = DR4;
-
-	do {
-		ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_EXECBUFFER,
-			    &execbuf);
-	} while (ret != 0 && errno == EAGAIN);
-
-	if (ret != 0 && errno == ENOMEM) {
-		fprintf(stderr,
-			"Execbuffer fails to pin. "
-			"Estimate: %u. Actual: %u. Available: %u\n",
-			drm_intel_gem_estimate_batch_space(bufmgr_gem->exec_bos,
-							   bufmgr_gem->
-							   exec_count),
-			drm_intel_gem_compute_batch_space(bufmgr_gem->exec_bos,
-							  bufmgr_gem->
-							  exec_count),
-			(unsigned int)bufmgr_gem->gtt_size);
-	}
-	drm_intel_update_buffer_offsets(bufmgr_gem);
-
-	if (bufmgr_gem->bufmgr.debug)
-		drm_intel_gem_dump_validation_list(bufmgr_gem);
-
-	for (i = 0; i < bufmgr_gem->exec_count; i++) {
-		drm_intel_bo *bo = bufmgr_gem->exec_bos[i];
-		drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-
-		/* Disconnect the buffer from the validate list */
-		bo_gem->validate_index = -1;
-		drm_intel_gem_bo_unreference_locked(bo);
-		bufmgr_gem->exec_bos[i] = NULL;
-	}
-	bufmgr_gem->exec_count = 0;
-	pthread_mutex_unlock(&bufmgr_gem->lock);
-
-	return 0;
-}
-
-static int
-drm_intel_gem_bo_pin(drm_intel_bo *bo, uint32_t alignment)
-{
-	drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr;
-	drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-	struct drm_i915_gem_pin pin;
-	int ret;
-
-	memset(&pin, 0, sizeof(pin));
-	pin.handle = bo_gem->gem_handle;
-	pin.alignment = alignment;
-
-	do {
-		ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_PIN, &pin);
-	} while (ret == -1 && errno == EINTR);
-
-	if (ret != 0)
-		return -errno;
-
-	bo->offset = pin.offset;
-	return 0;
-}
-
-static int
-drm_intel_gem_bo_unpin(drm_intel_bo *bo)
-{
-	drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr;
-	drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-	struct drm_i915_gem_unpin unpin;
-	int ret;
-
-	memset(&unpin, 0, sizeof(unpin));
-	unpin.handle = bo_gem->gem_handle;
-
-	ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_UNPIN, &unpin);
-	if (ret != 0)
-		return -errno;
-
-	return 0;
-}
-
-static int
-drm_intel_gem_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
-			    uint32_t stride)
-{
-	drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr;
-	drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-	struct drm_i915_gem_set_tiling set_tiling;
-	int ret;
-
-	if (bo_gem->global_name == 0 && *tiling_mode == bo_gem->tiling_mode)
-		return 0;
-
-	/* If we're going from non-tiling to tiling, bump fence count */
-	if (bo_gem->tiling_mode == I915_TILING_NONE)
-		bo_gem->reloc_tree_fences++;
-
-	memset(&set_tiling, 0, sizeof(set_tiling));
-	set_tiling.handle = bo_gem->gem_handle;
-	set_tiling.tiling_mode = *tiling_mode;
-	set_tiling.stride = stride;
-
-	ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_SET_TILING, &set_tiling);
-	if (ret != 0) {
-		*tiling_mode = bo_gem->tiling_mode;
-		return -errno;
-	}
-	bo_gem->tiling_mode = set_tiling.tiling_mode;
-	bo_gem->swizzle_mode = set_tiling.swizzle_mode;
-
-	/* If we're going from tiling to non-tiling, drop fence count */
-	if (bo_gem->tiling_mode == I915_TILING_NONE)
-		bo_gem->reloc_tree_fences--;
-
-	*tiling_mode = bo_gem->tiling_mode;
-	return 0;
-}
-
-static int
-drm_intel_gem_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
-			    uint32_t * swizzle_mode)
-{
-	drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-
-	*tiling_mode = bo_gem->tiling_mode;
-	*swizzle_mode = bo_gem->swizzle_mode;
-	return 0;
-}
-
-static int
-drm_intel_gem_bo_flink(drm_intel_bo *bo, uint32_t * name)
-{
-	drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr;
-	drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-	struct drm_gem_flink flink;
-	int ret;
-
-	if (!bo_gem->global_name) {
-		memset(&flink, 0, sizeof(flink));
-		flink.handle = bo_gem->gem_handle;
-
-		ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_GEM_FLINK, &flink);
-		if (ret != 0)
-			return -errno;
-		bo_gem->global_name = flink.name;
-		bo_gem->reusable = 0;
-	}
-
-	*name = bo_gem->global_name;
-	return 0;
-}
-
-/**
- * Enables unlimited caching of buffer objects for reuse.
- *
- * This is potentially very memory expensive, as the cache at each bucket
- * size is only bounded by how many buffers of that size we've managed to have
- * in flight at once.
- */
-void
-drm_intel_bufmgr_gem_enable_reuse(drm_intel_bufmgr *bufmgr)
-{
-	drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bufmgr;
-
-	bufmgr_gem->bo_reuse = 1;
-}
-
-/**
- * Return the additional aperture space required by the tree of buffer objects
- * rooted at bo.
- */
-static int
-drm_intel_gem_bo_get_aperture_space(drm_intel_bo *bo)
-{
-	drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-	int i;
-	int total = 0;
-
-	if (bo == NULL || bo_gem->included_in_check_aperture)
-		return 0;
-
-	total += bo->size;
-	bo_gem->included_in_check_aperture = 1;
-
-	for (i = 0; i < bo_gem->reloc_count; i++)
-		total +=
-		    drm_intel_gem_bo_get_aperture_space(bo_gem->
-							reloc_target_bo[i]);
-
-	return total;
-}
-
-/**
- * Count the number of buffers in this list that need a fence reg
- *
- * If the count is greater than the number of available regs, we'll have
- * to ask the caller to resubmit a batch with fewer tiled buffers.
- *
- * This function over-counts if the same buffer is used multiple times.
- */
-static unsigned int
-drm_intel_gem_total_fences(drm_intel_bo ** bo_array, int count)
-{
-	int i;
-	unsigned int total = 0;
-
-	for (i = 0; i < count; i++) {
-		drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo_array[i];
-
-		if (bo_gem == NULL)
-			continue;
-
-		total += bo_gem->reloc_tree_fences;
-	}
-	return total;
-}
-
-/**
- * Clear the flag set by drm_intel_gem_bo_get_aperture_space() so we're ready
- * for the next drm_intel_bufmgr_check_aperture_space() call.
- */
-static void
-drm_intel_gem_bo_clear_aperture_space_flag(drm_intel_bo *bo)
-{
-	drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-	int i;
-
-	if (bo == NULL || !bo_gem->included_in_check_aperture)
-		return;
-
-	bo_gem->included_in_check_aperture = 0;
-
-	for (i = 0; i < bo_gem->reloc_count; i++)
-		drm_intel_gem_bo_clear_aperture_space_flag(bo_gem->
-							   reloc_target_bo[i]);
-}
-
-/**
- * Return a conservative estimate for the amount of aperture required
- * for a collection of buffers. This may double-count some buffers.
- */
-static unsigned int
-drm_intel_gem_estimate_batch_space(drm_intel_bo **bo_array, int count)
-{
-	int i;
-	unsigned int total = 0;
-
-	for (i = 0; i < count; i++) {
-		drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo_array[i];
-		if (bo_gem != NULL)
-			total += bo_gem->reloc_tree_size;
-	}
-	return total;
-}
-
-/**
- * Return the amount of aperture needed for a collection of buffers.
- * This avoids double counting any buffers, at the cost of looking
- * at every buffer in the set.
- */
-static unsigned int
-drm_intel_gem_compute_batch_space(drm_intel_bo **bo_array, int count)
-{
-	int i;
-	unsigned int total = 0;
-
-	for (i = 0; i < count; i++) {
-		total += drm_intel_gem_bo_get_aperture_space(bo_array[i]);
-		/* For the first buffer object in the array, we get an
-		 * accurate count back for its reloc_tree size (since nothing
-		 * had been flagged as being counted yet).  We can save that
-		 * value out as a more conservative reloc_tree_size that
-		 * avoids double-counting target buffers.  Since the first
-		 * buffer happens to usually be the batch buffer in our
-		 * callers, this can pull us back from doing the tree
-		 * walk on every new batch emit.
-		 */
-		if (i == 0) {
-			drm_intel_bo_gem *bo_gem =
-			    (drm_intel_bo_gem *) bo_array[i];
-			bo_gem->reloc_tree_size = total;
-		}
-	}
-
-	for (i = 0; i < count; i++)
-		drm_intel_gem_bo_clear_aperture_space_flag(bo_array[i]);
-	return total;
-}
-
-/**
- * Return -1 if the batchbuffer should be flushed before attempting to
- * emit rendering referencing the buffers pointed to by bo_array.
- *
- * This is required because if we try to emit a batchbuffer with relocations
- * to a tree of buffers that won't simultaneously fit in the aperture,
- * the rendering will return an error at a point where the software is not
- * prepared to recover from it.
- *
- * However, we also want to emit the batchbuffer significantly before we reach
- * the limit, as a series of batchbuffers each of which references buffers
- * covering almost all of the aperture means that at each emit we end up
- * waiting to evict a buffer from the last rendering, and we get synchronous
- * performance.  By emitting smaller batchbuffers, we eat some CPU overhead to
- * get better parallelism.
- */
-static int
-drm_intel_gem_check_aperture_space(drm_intel_bo **bo_array, int count)
-{
-	drm_intel_bufmgr_gem *bufmgr_gem =
-	    (drm_intel_bufmgr_gem *) bo_array[0]->bufmgr;
-	unsigned int total = 0;
-	unsigned int threshold = bufmgr_gem->gtt_size * 3 / 4;
-	int total_fences;
-
-	/* Check for fence reg constraints if necessary */
-	if (bufmgr_gem->available_fences) {
-		total_fences = drm_intel_gem_total_fences(bo_array, count);
-		if (total_fences > bufmgr_gem->available_fences)
-			return -1;
-	}
-
-	total = drm_intel_gem_estimate_batch_space(bo_array, count);
-
-	if (total > threshold)
-		total = drm_intel_gem_compute_batch_space(bo_array, count);
-
-	if (total > threshold) {
-		DBG("check_space: overflowed available aperture, "
-		    "%dkb vs %dkb\n",
-		    total / 1024, (int)bufmgr_gem->gtt_size / 1024);
-		return -1;
-	} else {
-		DBG("drm_check_space: total %dkb vs bufgr %dkb\n", total / 1024,
-		    (int)bufmgr_gem->gtt_size / 1024);
-		return 0;
-	}
-}
-
-/*
- * Disable buffer reuse for objects which are shared with the kernel
- * as scanout buffers
- */
-static int
-drm_intel_gem_bo_disable_reuse(drm_intel_bo *bo)
-{
-	drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-
-	bo_gem->reusable = 0;
-	return 0;
-}
-
-static int
-_drm_intel_gem_bo_references(drm_intel_bo *bo, drm_intel_bo *target_bo)
-{
-	drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
-	int i;
-
-	for (i = 0; i < bo_gem->reloc_count; i++) {
-		if (bo_gem->reloc_target_bo[i] == target_bo)
-			return 1;
-		if (_drm_intel_gem_bo_references(bo_gem->reloc_target_bo[i],
-						target_bo))
-			return 1;
-	}
-
-	return 0;
-}
-
-/** Return true if target_bo is referenced by bo's relocation tree. */
-static int
-drm_intel_gem_bo_references(drm_intel_bo *bo, drm_intel_bo *target_bo)
-{
-	drm_intel_bo_gem *target_bo_gem = (drm_intel_bo_gem *) target_bo;
-
-	if (bo == NULL || target_bo == NULL)
-		return 0;
-	if (target_bo_gem->used_as_reloc_target)
-		return _drm_intel_gem_bo_references(bo, target_bo);
-	return 0;
-}
-
-/**
- * Initializes the GEM buffer manager, which uses the kernel to allocate, map,
- * and manage map buffer objections.
- *
- * \param fd File descriptor of the opened DRM device.
- */
-drm_intel_bufmgr *
-drm_intel_bufmgr_gem_init(int fd, int batch_size)
-{
-	drm_intel_bufmgr_gem *bufmgr_gem;
-	struct drm_i915_gem_get_aperture aperture;
-	drm_i915_getparam_t gp;
-	int ret, i;
-	unsigned long size;
-
-	bufmgr_gem = calloc(1, sizeof(*bufmgr_gem));
-	bufmgr_gem->fd = fd;
-
-	if (pthread_mutex_init(&bufmgr_gem->lock, NULL) != 0) {
-		free(bufmgr_gem);
-		return NULL;
-	}
-
-	ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_GET_APERTURE, &aperture);
-
-	if (ret == 0)
-		bufmgr_gem->gtt_size = aperture.aper_available_size;
-	else {
-		fprintf(stderr, "DRM_IOCTL_I915_GEM_APERTURE failed: %s\n",
-			strerror(errno));
-		bufmgr_gem->gtt_size = 128 * 1024 * 1024;
-		fprintf(stderr, "Assuming %dkB available aperture size.\n"
-			"May lead to reduced performance or incorrect "
-			"rendering.\n",
-			(int)bufmgr_gem->gtt_size / 1024);
-	}
-
-	gp.param = I915_PARAM_CHIPSET_ID;
-	gp.value = &bufmgr_gem->pci_device;
-	ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp);
-	if (ret) {
-		fprintf(stderr, "get chip id failed: %d [%d]\n", ret, errno);
-		fprintf(stderr, "param: %d, val: %d\n", gp.param, *gp.value);
-	}
-
-	if (!IS_I965G(bufmgr_gem)) {
-		gp.param = I915_PARAM_NUM_FENCES_AVAIL;
-		gp.value = &bufmgr_gem->available_fences;
-		ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp);
-		if (ret) {
-			fprintf(stderr, "get fences failed: %d [%d]\n", ret,
-				errno);
-			fprintf(stderr, "param: %d, val: %d\n", gp.param,
-				*gp.value);
-			bufmgr_gem->available_fences = 0;
-		}
-	}
-
-	/* Let's go with one relocation per every 2 dwords (but round down a bit
-	 * since a power of two will mean an extra page allocation for the reloc
-	 * buffer).
-	 *
-	 * Every 4 was too few for the blender benchmark.
-	 */
-	bufmgr_gem->max_relocs = batch_size / sizeof(uint32_t) / 2 - 2;
-
-	bufmgr_gem->bufmgr.bo_alloc = drm_intel_gem_bo_alloc;
-	bufmgr_gem->bufmgr.bo_alloc_for_render =
-	    drm_intel_gem_bo_alloc_for_render;
-	bufmgr_gem->bufmgr.bo_alloc_tiled = drm_intel_gem_bo_alloc_tiled;
-	bufmgr_gem->bufmgr.bo_reference = drm_intel_gem_bo_reference;
-	bufmgr_gem->bufmgr.bo_unreference = drm_intel_gem_bo_unreference;
-	bufmgr_gem->bufmgr.bo_map = drm_intel_gem_bo_map;
-	bufmgr_gem->bufmgr.bo_unmap = drm_intel_gem_bo_unmap;
-	bufmgr_gem->bufmgr.bo_subdata = drm_intel_gem_bo_subdata;
-	bufmgr_gem->bufmgr.bo_get_subdata = drm_intel_gem_bo_get_subdata;
-	bufmgr_gem->bufmgr.bo_wait_rendering = drm_intel_gem_bo_wait_rendering;
-	bufmgr_gem->bufmgr.bo_emit_reloc = drm_intel_gem_bo_emit_reloc;
-	bufmgr_gem->bufmgr.bo_pin = drm_intel_gem_bo_pin;
-	bufmgr_gem->bufmgr.bo_unpin = drm_intel_gem_bo_unpin;
-	bufmgr_gem->bufmgr.bo_get_tiling = drm_intel_gem_bo_get_tiling;
-	bufmgr_gem->bufmgr.bo_set_tiling = drm_intel_gem_bo_set_tiling;
-	bufmgr_gem->bufmgr.bo_flink = drm_intel_gem_bo_flink;
-	bufmgr_gem->bufmgr.bo_exec = drm_intel_gem_bo_exec;
-	bufmgr_gem->bufmgr.bo_busy = drm_intel_gem_bo_busy;
-	bufmgr_gem->bufmgr.destroy = drm_intel_bufmgr_gem_destroy;
-	bufmgr_gem->bufmgr.debug = 0;
-	bufmgr_gem->bufmgr.check_aperture_space =
-	    drm_intel_gem_check_aperture_space;
-	bufmgr_gem->bufmgr.bo_disable_reuse = drm_intel_gem_bo_disable_reuse;
-	bufmgr_gem->bufmgr.get_pipe_from_crtc_id =
-	    drm_intel_gem_get_pipe_from_crtc_id;
-	bufmgr_gem->bufmgr.bo_references = drm_intel_gem_bo_references;
-
-	/* Initialize the linked lists for BO reuse cache. */
-	for (i = 0, size = 4096; i < DRM_INTEL_GEM_BO_BUCKETS; i++, size *= 2) {
-		DRMINITLISTHEAD(&bufmgr_gem->cache_bucket[i].head);
-		bufmgr_gem->cache_bucket[i].size = size;
-	}
-
-	return &bufmgr_gem->bufmgr;
-}
diff --git a/libdrm/intel/intel_bufmgr_priv.h b/libdrm/intel/intel_bufmgr_priv.h
deleted file mode 100644
index 475c402f..00000000
--- a/libdrm/intel/intel_bufmgr_priv.h
+++ /dev/null
@@ -1,254 +0,0 @@
-/*
- * Copyright © 2008 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- *
- * Authors:
- *    Eric Anholt <eric@anholt.net>
- *
- */
-
-/**
- * @file intel_bufmgr_priv.h
- *
- * Private definitions of Intel-specific bufmgr functions and structures.
- */
-
-#ifndef INTEL_BUFMGR_PRIV_H
-#define INTEL_BUFMGR_PRIV_H
-
-/**
- * Context for a buffer manager instance.
- *
- * Contains public methods followed by private storage for the buffer manager.
- */
-struct _drm_intel_bufmgr {
-	/**
-	 * Allocate a buffer object.
-	 *
-	 * Buffer objects are not necessarily initially mapped into CPU virtual
-	 * address space or graphics device aperture.  They must be mapped
-	 * using bo_map() or drm_intel_gem_bo_map_gtt() to be used by the CPU.
-	 */
-	drm_intel_bo *(*bo_alloc) (drm_intel_bufmgr *bufmgr, const char *name,
-				   unsigned long size, unsigned int alignment);
-
-	/**
-	 * Allocate a buffer object, hinting that it will be used as a
-	 * render target.
-	 *
-	 * This is otherwise the same as bo_alloc.
-	 */
-	drm_intel_bo *(*bo_alloc_for_render) (drm_intel_bufmgr *bufmgr,
-					      const char *name,
-					      unsigned long size,
-					      unsigned int alignment);
-
-	/**
-	 * Allocate a tiled buffer object.
-	 *
-	 * Alignment for tiled objects is set automatically; the 'flags'
-	 * argument provides a hint about how the object will be used initially.
-	 *
-	 * Valid tiling formats are:
-	 *  I915_TILING_NONE
-	 *  I915_TILING_X
-	 *  I915_TILING_Y
-	 *
-	 * Note the tiling format may be rejected; callers should check the
-	 * 'tiling_mode' field on return, as well as the pitch value, which
-	 * may have been rounded up to accommodate for tiling restrictions.
-	 */
-	drm_intel_bo *(*bo_alloc_tiled) (drm_intel_bufmgr *bufmgr,
-					 const char *name,
-					 int x, int y, int cpp,
-					 uint32_t *tiling_mode,
-					 unsigned long *pitch,
-					 unsigned long flags);
-
-	/** Takes a reference on a buffer object */
-	void (*bo_reference) (drm_intel_bo *bo);
-
-	/**
-	 * Releases a reference on a buffer object, freeing the data if
-	 * no references remain.
-	 */
-	void (*bo_unreference) (drm_intel_bo *bo);
-
-	/**
-	 * Maps the buffer into userspace.
-	 *
-	 * This function will block waiting for any existing execution on the
-	 * buffer to complete, first.  The resulting mapping is available at
-	 * buf->virtual.
-	 */
-	int (*bo_map) (drm_intel_bo *bo, int write_enable);
-
-	/**
-	 * Reduces the refcount on the userspace mapping of the buffer
-	 * object.
-	 */
-	int (*bo_unmap) (drm_intel_bo *bo);
-
-	/**
-	 * Write data into an object.
-	 *
-	 * This is an optional function, if missing,
-	 * drm_intel_bo will map/memcpy/unmap.
-	 */
-	int (*bo_subdata) (drm_intel_bo *bo, unsigned long offset,
-			   unsigned long size, const void *data);
-
-	/**
-	 * Read data from an object
-	 *
-	 * This is an optional function, if missing,
-	 * drm_intel_bo will map/memcpy/unmap.
-	 */
-	int (*bo_get_subdata) (drm_intel_bo *bo, unsigned long offset,
-			       unsigned long size, void *data);
-
-	/**
-	 * Waits for rendering to an object by the GPU to have completed.
-	 *
-	 * This is not required for any access to the BO by bo_map,
-	 * bo_subdata, etc.  It is merely a way for the driver to implement
-	 * glFinish.
-	 */
-	void (*bo_wait_rendering) (drm_intel_bo *bo);
-
-	/**
-	 * Tears down the buffer manager instance.
-	 */
-	void (*destroy) (drm_intel_bufmgr *bufmgr);
-
-	/**
-	 * Add relocation entry in reloc_buf, which will be updated with the
-	 * target buffer's real offset on on command submission.
-	 *
-	 * Relocations remain in place for the lifetime of the buffer object.
-	 *
-	 * \param bo Buffer to write the relocation into.
-	 * \param offset Byte offset within reloc_bo of the pointer to
-	 *			target_bo.
-	 * \param target_bo Buffer whose offset should be written into the
-	 *                  relocation entry.
-	 * \param target_offset Constant value to be added to target_bo's
-	 *			offset in relocation entry.
-	 * \param read_domains GEM read domains which the buffer will be
-	 *			read into by the command that this relocation
-	 *			is part of.
-	 * \param write_domains GEM read domains which the buffer will be
-	 *			dirtied in by the command that this
-	 *			relocation is part of.
-	 */
-	int (*bo_emit_reloc) (drm_intel_bo *bo, uint32_t offset,
-			      drm_intel_bo *target_bo, uint32_t target_offset,
-			      uint32_t read_domains, uint32_t write_domain);
-
-	/** Executes the command buffer pointed to by bo. */
-	int (*bo_exec) (drm_intel_bo *bo, int used,
-			drm_clip_rect_t *cliprects, int num_cliprects,
-			int DR4);
-
-	/**
-	 * Pin a buffer to the aperture and fix the offset until unpinned
-	 *
-	 * \param buf Buffer to pin
-	 * \param alignment Required alignment for aperture, in bytes
-	 */
-	int (*bo_pin) (drm_intel_bo *bo, uint32_t alignment);
-
-	/**
-	 * Unpin a buffer from the aperture, allowing it to be removed
-	 *
-	 * \param buf Buffer to unpin
-	 */
-	int (*bo_unpin) (drm_intel_bo *bo);
-
-	/**
-	 * Ask that the buffer be placed in tiling mode
-	 *
-	 * \param buf Buffer to set tiling mode for
-	 * \param tiling_mode desired, and returned tiling mode
-	 */
-	int (*bo_set_tiling) (drm_intel_bo *bo, uint32_t * tiling_mode,
-			      uint32_t stride);
-
-	/**
-	 * Get the current tiling (and resulting swizzling) mode for the bo.
-	 *
-	 * \param buf Buffer to get tiling mode for
-	 * \param tiling_mode returned tiling mode
-	 * \param swizzle_mode returned swizzling mode
-	 */
-	int (*bo_get_tiling) (drm_intel_bo *bo, uint32_t * tiling_mode,
-			      uint32_t * swizzle_mode);
-
-	/**
-	 * Create a visible name for a buffer which can be used by other apps
-	 *
-	 * \param buf Buffer to create a name for
-	 * \param name Returned name
-	 */
-	int (*bo_flink) (drm_intel_bo *bo, uint32_t * name);
-
-	/**
-	 * Returns 1 if mapping the buffer for write could cause the process
-	 * to block, due to the object being active in the GPU.
-	 */
-	int (*bo_busy) (drm_intel_bo *bo);
-
-	int (*check_aperture_space) (drm_intel_bo ** bo_array, int count);
-
-	/**
-	 * Disable buffer reuse for buffers which will be shared in some way,
-	 * as with scanout buffers. When the buffer reference count goes to
-	 * zero, it will be freed and not placed in the reuse list.
-	 *
-	 * \param bo Buffer to disable reuse for
-	 */
-	int (*bo_disable_reuse) (drm_intel_bo *bo);
-
-	/**
-	 *
-	 * Return the pipe associated with a crtc_id so that vblank
-	 * synchronization can use the correct data in the request.
-	 * This is only supported for KMS and gem at this point, when
-	 * unsupported, this function returns -1 and leaves the decision
-	 * of what to do in that case to the caller
-	 *
-	 * \param bufmgr the associated buffer manager
-	 * \param crtc_id the crtc identifier
-	 */
-	int (*get_pipe_from_crtc_id) (drm_intel_bufmgr *bufmgr, int crtc_id);
-
-	/** Returns true if target_bo is in the relocation tree rooted at bo. */
-	int (*bo_references) (drm_intel_bo *bo, drm_intel_bo *target_bo);
-
-	/**< Enables verbose debugging printouts */
-	int debug;
-};
-
-#define ALIGN(value, alignment)	((value + alignment - 1) & ~(alignment - 1))
-#define ROUND_UP_TO(x, y)	(((x) + (y) - 1) / (y) * (y))
-#define ROUND_UP_TO_MB(x)	ROUND_UP_TO((x), 1024*1024)
-
-#endif /* INTEL_BUFMGR_PRIV_H */
diff --git a/libdrm/intel/intel_chipset.h b/libdrm/intel/intel_chipset.h
deleted file mode 100644
index 688476a4..00000000
--- a/libdrm/intel/intel_chipset.h
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- *
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#ifndef _INTEL_CHIPSET_H
-#define _INTEL_CHIPSET_H
-
-#define IS_I830(dev) ((dev)->pci_device == 0x3577)
-#define IS_845G(dev) ((dev)->pci_device == 0x2562)
-#define IS_I85X(dev) ((dev)->pci_device == 0x3582)
-#define IS_I855(dev) ((dev)->pci_device == 0x3582)
-#define IS_I865G(dev) ((dev)->pci_device == 0x2572)
-
-#define IS_I915G(dev) ((dev)->pci_device == 0x2582 || (dev)->pci_device == 0x258a)
-#define IS_I915GM(dev) ((dev)->pci_device == 0x2592)
-#define IS_I945G(dev) ((dev)->pci_device == 0x2772)
-#define IS_I945GM(dev) ((dev)->pci_device == 0x27A2 ||\
-                        (dev)->pci_device == 0x27AE)
-#define IS_I965G(dev) ((dev)->pci_device == 0x2972 || \
-                       (dev)->pci_device == 0x2982 || \
-                       (dev)->pci_device == 0x2992 || \
-                       (dev)->pci_device == 0x29A2 || \
-                       (dev)->pci_device == 0x2A02 || \
-                       (dev)->pci_device == 0x2A12 || \
-                       (dev)->pci_device == 0x2A42 || \
-                       (dev)->pci_device == 0x2E02 || \
-                       (dev)->pci_device == 0x2E12 || \
-                       (dev)->pci_device == 0x2E22 || \
-                       (dev)->pci_device == 0x2E32 || \
-                       (dev)->pci_device == 0x2E42 || \
-                       (dev)->pci_device == 0x0042 || \
-                       (dev)->pci_device == 0x0046)
-
-#define IS_I965GM(dev) ((dev)->pci_device == 0x2A02)
-
-#define IS_GM45(dev) ((dev)->pci_device == 0x2A42)
-
-#define IS_G4X(dev) ((dev)->pci_device == 0x2E02 || \
-                     (dev)->pci_device == 0x2E12 || \
-                     (dev)->pci_device == 0x2E22 || \
-                     (dev)->pci_device == 0x2E32 || \
-                     (dev)->pci_device == 0x2E42)
-
-#define IS_G33(dev)    ((dev)->pci_device == 0x29C2 ||  \
-                        (dev)->pci_device == 0x29B2 ||  \
-                        (dev)->pci_device == 0x29D2)
-
-#define IS_I9XX(dev) (IS_I915G(dev) || IS_I915GM(dev) || IS_I945G(dev) || \
-                      IS_I945GM(dev) || IS_I965G(dev) || IS_G33(dev))
-
-#define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \
-                        IS_I945GM(dev) || IS_I965GM(dev) || IS_GM45(dev))
-
-#endif /* _INTEL_CHIPSET_H */
diff --git a/libdrm/intel/libdrm_intel.pc.in b/libdrm/intel/libdrm_intel.pc.in
deleted file mode 100644
index ea71cc3e..00000000
--- a/libdrm/intel/libdrm_intel.pc.in
+++ /dev/null
@@ -1,10 +0,0 @@
-prefix=@prefix@
-exec_prefix=@exec_prefix@
-libdir=@libdir@
-includedir=@includedir@
-
-Name: libdrm
-Description: Userspace interface to kernel DRM services
-Version: @PACKAGE_VERSION@
-Libs: -L${libdir} -ldrm -ldrm_intel
-Cflags: -I${includedir} -I${includedir}/drm
diff --git a/libdrm/intel/mm.c b/libdrm/intel/mm.c
deleted file mode 100644
index 10697452..00000000
--- a/libdrm/intel/mm.c
+++ /dev/null
@@ -1,271 +0,0 @@
-/*
- * GLX Hardware Device Driver common code
- * Copyright (C) 1999 Wittawat Yamwong
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included
- * in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * WITTAWAT YAMWONG, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM, 
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE 
- * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#include <stdlib.h>
-#include <assert.h>
-
-#include "xf86drm.h"
-#include "mm.h"
-
-void mmDumpMemInfo(const struct mem_block *heap)
-{
-	drmMsg("Memory heap %p:\n", (void *)heap);
-	if (heap == 0) {
-		drmMsg("  heap == 0\n");
-	} else {
-		const struct mem_block *p;
-
-		for (p = heap->next; p != heap; p = p->next) {
-			drmMsg("  Offset:%08x, Size:%08x, %c%c\n", p->ofs,
-			       p->size, p->free ? 'F' : '.',
-			       p->reserved ? 'R' : '.');
-		}
-
-		drmMsg("\nFree list:\n");
-
-		for (p = heap->next_free; p != heap; p = p->next_free) {
-			drmMsg(" FREE Offset:%08x, Size:%08x, %c%c\n", p->ofs,
-			       p->size, p->free ? 'F' : '.',
-			       p->reserved ? 'R' : '.');
-		}
-
-	}
-	drmMsg("End of memory blocks\n");
-}
-
-struct mem_block *mmInit(int ofs, int size)
-{
-	struct mem_block *heap, *block;
-
-	if (size <= 0)
-		return NULL;
-
-	heap = (struct mem_block *)calloc(1, sizeof(struct mem_block));
-	if (!heap)
-		return NULL;
-
-	block = (struct mem_block *)calloc(1, sizeof(struct mem_block));
-	if (!block) {
-		free(heap);
-		return NULL;
-	}
-
-	heap->next = block;
-	heap->prev = block;
-	heap->next_free = block;
-	heap->prev_free = block;
-
-	block->heap = heap;
-	block->next = heap;
-	block->prev = heap;
-	block->next_free = heap;
-	block->prev_free = heap;
-
-	block->ofs = ofs;
-	block->size = size;
-	block->free = 1;
-
-	return heap;
-}
-
-static struct mem_block *SliceBlock(struct mem_block *p,
-				    int startofs, int size,
-				    int reserved, int alignment)
-{
-	struct mem_block *newblock;
-
-	/* break left  [p, newblock, p->next], then p = newblock */
-	if (startofs > p->ofs) {
-		newblock =
-		    (struct mem_block *)calloc(1, sizeof(struct mem_block));
-		if (!newblock)
-			return NULL;
-		newblock->ofs = startofs;
-		newblock->size = p->size - (startofs - p->ofs);
-		newblock->free = 1;
-		newblock->heap = p->heap;
-
-		newblock->next = p->next;
-		newblock->prev = p;
-		p->next->prev = newblock;
-		p->next = newblock;
-
-		newblock->next_free = p->next_free;
-		newblock->prev_free = p;
-		p->next_free->prev_free = newblock;
-		p->next_free = newblock;
-
-		p->size -= newblock->size;
-		p = newblock;
-	}
-
-	/* break right, also [p, newblock, p->next] */
-	if (size < p->size) {
-		newblock =
-		    (struct mem_block *)calloc(1, sizeof(struct mem_block));
-		if (!newblock)
-			return NULL;
-		newblock->ofs = startofs + size;
-		newblock->size = p->size - size;
-		newblock->free = 1;
-		newblock->heap = p->heap;
-
-		newblock->next = p->next;
-		newblock->prev = p;
-		p->next->prev = newblock;
-		p->next = newblock;
-
-		newblock->next_free = p->next_free;
-		newblock->prev_free = p;
-		p->next_free->prev_free = newblock;
-		p->next_free = newblock;
-
-		p->size = size;
-	}
-
-	/* p = middle block */
-	p->free = 0;
-
-	/* Remove p from the free list: 
-	 */
-	p->next_free->prev_free = p->prev_free;
-	p->prev_free->next_free = p->next_free;
-
-	p->next_free = 0;
-	p->prev_free = 0;
-
-	p->reserved = reserved;
-	return p;
-}
-
-struct mem_block *mmAllocMem(struct mem_block *heap, int size, int align2,
-			     int startSearch)
-{
-	struct mem_block *p;
-	const int mask = (1 << align2) - 1;
-	int startofs = 0;
-	int endofs;
-
-	if (!heap || align2 < 0 || size <= 0)
-		return NULL;
-
-	for (p = heap->next_free; p != heap; p = p->next_free) {
-		assert(p->free);
-
-		startofs = (p->ofs + mask) & ~mask;
-		if (startofs < startSearch) {
-			startofs = startSearch;
-		}
-		endofs = startofs + size;
-		if (endofs <= (p->ofs + p->size))
-			break;
-	}
-
-	if (p == heap)
-		return NULL;
-
-	assert(p->free);
-	p = SliceBlock(p, startofs, size, 0, mask + 1);
-
-	return p;
-}
-
-struct mem_block *mmFindBlock(struct mem_block *heap, int start)
-{
-	struct mem_block *p;
-
-	for (p = heap->next; p != heap; p = p->next) {
-		if (p->ofs == start)
-			return p;
-	}
-
-	return NULL;
-}
-
-static int Join2Blocks(struct mem_block *p)
-{
-	/* XXX there should be some assertions here */
-
-	/* NOTE: heap->free == 0 */
-
-	if (p->free && p->next->free) {
-		struct mem_block *q = p->next;
-
-		assert(p->ofs + p->size == q->ofs);
-		p->size += q->size;
-
-		p->next = q->next;
-		q->next->prev = p;
-
-		q->next_free->prev_free = q->prev_free;
-		q->prev_free->next_free = q->next_free;
-
-		free(q);
-		return 1;
-	}
-	return 0;
-}
-
-int mmFreeMem(struct mem_block *b)
-{
-	if (!b)
-		return 0;
-
-	if (b->free) {
-		drmMsg("block already free\n");
-		return -1;
-	}
-	if (b->reserved) {
-		drmMsg("block is reserved\n");
-		return -1;
-	}
-
-	b->free = 1;
-	b->next_free = b->heap->next_free;
-	b->prev_free = b->heap;
-	b->next_free->prev_free = b;
-	b->prev_free->next_free = b;
-
-	Join2Blocks(b);
-	if (b->prev != b->heap)
-		Join2Blocks(b->prev);
-
-	return 0;
-}
-
-void mmDestroy(struct mem_block *heap)
-{
-	struct mem_block *p;
-
-	if (!heap)
-		return;
-
-	for (p = heap->next; p != heap;) {
-		struct mem_block *next = p->next;
-		free(p);
-		p = next;
-	}
-
-	free(heap);
-}
diff --git a/libdrm/intel/mm.h b/libdrm/intel/mm.h
deleted file mode 100644
index 8a5235b0..00000000
--- a/libdrm/intel/mm.h
+++ /dev/null
@@ -1,94 +0,0 @@
-/*
- * GLX Hardware Device Driver common code
- * Copyright (C) 1999 Wittawat Yamwong
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included
- * in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * KEITH WHITWELL, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM, 
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE 
- * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/**
- * Memory manager code.  Primarily used by device drivers to manage texture
- * heaps, etc.
- */
-
-#ifndef MM_H
-#define MM_H
-
-struct mem_block {
-	struct mem_block *next, *prev;
-	struct mem_block *next_free, *prev_free;
-	struct mem_block *heap;
-	int ofs, size;
-	unsigned int free:1;
-	unsigned int reserved:1;
-};
-
-/* Rename the variables in the drm copy of this code so that it doesn't
- * conflict with mesa or whoever else has copied it around.
- */
-#define mmInit drm_mmInit
-#define mmAllocMem drm_mmAllocMem
-#define mmFreeMem drm_mmFreeMem
-#define mmFindBlock drm_mmFindBlock
-#define mmDestroy drm_mmDestroy
-#define mmDumpMemInfo drm_mmDumpMemInfo
-
-/** 
- * input: total size in bytes
- * return: a heap pointer if OK, NULL if error
- */
-extern struct mem_block *mmInit(int ofs, int size);
-
-/**
- * Allocate 'size' bytes with 2^align2 bytes alignment,
- * restrict the search to free memory after 'startSearch'
- * depth and back buffers should be in different 4mb banks
- * to get better page hits if possible
- * input:	size = size of block
- *       	align2 = 2^align2 bytes alignment
- *		startSearch = linear offset from start of heap to begin search
- * return: pointer to the allocated block, 0 if error
- */
-extern struct mem_block *mmAllocMem(struct mem_block *heap, int size,
-				    int align2, int startSearch);
-
-/**
- * Free block starts at offset
- * input: pointer to a block
- * return: 0 if OK, -1 if error
- */
-extern int mmFreeMem(struct mem_block *b);
-
-/**
- * Free block starts at offset
- * input: pointer to a heap, start offset
- * return: pointer to a block
- */
-extern struct mem_block *mmFindBlock(struct mem_block *heap, int start);
-
-/**
- * destroy MM
- */
-extern void mmDestroy(struct mem_block *mmInit);
-
-/**
- * For debuging purpose.
- */
-extern void mmDumpMemInfo(const struct mem_block *mmInit);
-
-#endif
diff --git a/libdrm/libdrm_lists.h b/libdrm/libdrm_lists.h
deleted file mode 100644
index 6410f573..00000000
--- a/libdrm/libdrm_lists.h
+++ /dev/null
@@ -1,89 +0,0 @@
-/**************************************************************************
- *
- * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND. USA.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- */
-
-/*
- * List macros heavily inspired by the Linux kernel
- * list handling. No list looping yet.
- */
-
-#include <stddef.h>
-
-typedef struct _drmMMListHead
-{
-    struct _drmMMListHead *prev;
-    struct _drmMMListHead *next;
-} drmMMListHead;
-
-#define DRMINITLISTHEAD(__item)		       \
-  do{					       \
-    (__item)->prev = (__item);		       \
-    (__item)->next = (__item);		       \
-  } while (0)
-
-#define DRMLISTADD(__item, __list)		\
-  do {						\
-    (__item)->prev = (__list);			\
-    (__item)->next = (__list)->next;		\
-    (__list)->next->prev = (__item);		\
-    (__list)->next = (__item);			\
-  } while (0)
-
-#define DRMLISTADDTAIL(__item, __list)		\
-  do {						\
-    (__item)->next = (__list);			\
-    (__item)->prev = (__list)->prev;		\
-    (__list)->prev->next = (__item);		\
-    (__list)->prev = (__item);			\
-  } while(0)
-
-#define DRMLISTDEL(__item)			\
-  do {						\
-    (__item)->prev->next = (__item)->next;	\
-    (__item)->next->prev = (__item)->prev;	\
-  } while(0)
-
-#define DRMLISTDELINIT(__item)			\
-  do {						\
-    (__item)->prev->next = (__item)->next;	\
-    (__item)->next->prev = (__item)->prev;	\
-    (__item)->next = (__item);			\
-    (__item)->prev = (__item);			\
-  } while(0)
-
-#define DRMLISTENTRY(__type, __item, __field)   \
-    ((__type *)(((char *) (__item)) - offsetof(__type, __field)))
-
-#define DRMLISTEMPTY(__item) ((__item)->next == (__item))
-
-#define DRMLISTFOREACHSAFE(__item, __temp, __list)			\
-	for ((__item) = (__list)->next, (__temp) = (__item)->next;	\
-	     (__item) != (__list);					\
-	     (__item) = (__temp), (__temp) = (__item)->next)
-
-#define DRMLISTFOREACHSAFEREVERSE(__item, __temp, __list)		\
-	for ((__item) = (__list)->prev, (__temp) = (__item)->prev;	\
-	     (__item) != (__list);					\
-	     (__item) = (__temp), (__temp) = (__item)->prev)
diff --git a/libdrm/nouveau/Makefile.am b/libdrm/nouveau/Makefile.am
deleted file mode 100644
index db6243cc..00000000
--- a/libdrm/nouveau/Makefile.am
+++ /dev/null
@@ -1,39 +0,0 @@
-AM_CFLAGS = \
-	$(WARN_CFLAGS) \
-	-I$(top_srcdir)/libdrm \
-	-I$(top_srcdir)/libdrm/nouveau \
-	$(PTHREADSTUBS_CFLAGS) \
-	-I$(top_srcdir)/include/drm
-
-libdrm_nouveau_la_LTLIBRARIES = libdrm_nouveau.la
-libdrm_nouveau_ladir = $(libdir)
-libdrm_nouveau_la_LDFLAGS = -version-number 1:0:0 -no-undefined
-libdrm_nouveau_la_LIBADD = ../libdrm.la @PTHREADSTUBS_LIBS@
-
-libdrm_nouveau_la_SOURCES = \
-			    nouveau_device.c \
-			    nouveau_channel.c \
-			    nouveau_pushbuf.c \
-			    nouveau_grobj.c \
-			    nouveau_notifier.c \
-			    nouveau_bo.c \
-			    nouveau_resource.c \
-			    nouveau_private.h
-
-libdrm_nouveaucommonincludedir = ${includedir}/nouveau
-libdrm_nouveaucommoninclude_HEADERS = \
-				nouveau_device.h \
-				nouveau_channel.h \
-				nouveau_grobj.h \
-				nouveau_notifier.h \
-				nouveau_pushbuf.h \
-				nouveau_bo.h \
-				nouveau_resource.h \
-				nouveau_class.h
-
-libdrm_nouveauincludedir = ${includedir}/drm
-libdrm_nouveauinclude_HEADERS = \
-				nouveau_drmif.h
-
-pkgconfigdir = @pkgconfigdir@
-pkgconfig_DATA = libdrm_nouveau.pc
diff --git a/libdrm/nouveau/libdrm_nouveau.pc.in b/libdrm/nouveau/libdrm_nouveau.pc.in
deleted file mode 100644
index 7ef49e5a..00000000
--- a/libdrm/nouveau/libdrm_nouveau.pc.in
+++ /dev/null
@@ -1,10 +0,0 @@
-prefix=@prefix@
-exec_prefix=@exec_prefix@
-libdir=@libdir@
-includedir=@includedir@
-
-Name: libdrm_nouveau
-Description: Userspace interface to nouveau kernel DRM services
-Version: 0.6
-Libs: -L${libdir} -ldrm_nouveau
-Cflags: -I${includedir} -I${includedir}/drm -I${includedir}/nouveau
diff --git a/libdrm/nouveau/nouveau_bo.c b/libdrm/nouveau/nouveau_bo.c
deleted file mode 100644
index 85fc14f6..00000000
--- a/libdrm/nouveau/nouveau_bo.c
+++ /dev/null
@@ -1,622 +0,0 @@
-/*
- * Copyright 2007 Nouveau Project
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
- * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifdef HAVE_CONFIG_H
-#include <config.h>
-#endif
-#include <stdint.h>
-#include <stdlib.h>
-#include <errno.h>
-#include <assert.h>
-
-#include <sys/mman.h>
-#include <sys/ioctl.h>
-
-#include "nouveau_private.h"
-
-int
-nouveau_bo_init(struct nouveau_device *dev)
-{
-	return 0;
-}
-
-void
-nouveau_bo_takedown(struct nouveau_device *dev)
-{
-}
-
-static int
-nouveau_bo_info(struct nouveau_bo_priv *nvbo, struct drm_nouveau_gem_info *arg)
-{
-	nvbo->handle = nvbo->base.handle = arg->handle;
-	nvbo->domain = arg->domain;
-	nvbo->size = arg->size;
-	nvbo->offset = arg->offset;
-	nvbo->map_handle = arg->map_handle;
-	nvbo->base.tile_mode = arg->tile_mode;
-	nvbo->base.tile_flags = arg->tile_flags;
-	return 0;
-}
-
-static int
-nouveau_bo_allocated(struct nouveau_bo_priv *nvbo)
-{
-	if (nvbo->sysmem || nvbo->handle || (nvbo->flags & NOUVEAU_BO_PIN))
-		return 1;
-	return 0;
-}
-
-static int
-nouveau_bo_ualloc(struct nouveau_bo_priv *nvbo)
-{
-	if (nvbo->user || nvbo->sysmem) {
-		assert(nvbo->sysmem);
-		return 0;
-	}
-
-	nvbo->sysmem = malloc(nvbo->size);
-	if (!nvbo->sysmem)
-		return -ENOMEM;
-
-	return 0;
-}
-
-static void
-nouveau_bo_ufree(struct nouveau_bo_priv *nvbo)
-{
-	if (nvbo->sysmem) {
-		if (!nvbo->user)
-			free(nvbo->sysmem);
-		nvbo->sysmem = NULL;
-	}
-}
-
-static void
-nouveau_bo_kfree(struct nouveau_bo_priv *nvbo)
-{
-	struct nouveau_device_priv *nvdev = nouveau_device(nvbo->base.device);
-	struct drm_gem_close req;
-
-	if (!nvbo->handle)
-		return;
-
-	if (nvbo->map) {
-		munmap(nvbo->map, nvbo->size);
-		nvbo->map = NULL;
-	}
-
-	req.handle = nvbo->handle;
-	nvbo->handle = 0;
-	ioctl(nvdev->fd, DRM_IOCTL_GEM_CLOSE, &req);
-}
-
-static int
-nouveau_bo_kalloc(struct nouveau_bo_priv *nvbo, struct nouveau_channel *chan)
-{
-	struct nouveau_device_priv *nvdev = nouveau_device(nvbo->base.device);
-	struct drm_nouveau_gem_new req;
-	struct drm_nouveau_gem_info *info = &req.info;
-	int ret;
-
-	if (nvbo->handle || (nvbo->flags & NOUVEAU_BO_PIN))
-		return 0;
-
-	req.channel_hint = chan ? chan->id : 0;
-	req.align = nvbo->align;
-
-
-	info->size = nvbo->size;
-	info->domain = 0;
-
-	if (nvbo->flags & NOUVEAU_BO_VRAM)
-		info->domain |= NOUVEAU_GEM_DOMAIN_VRAM;
-	if (nvbo->flags & NOUVEAU_BO_GART)
-		info->domain |= NOUVEAU_GEM_DOMAIN_GART;
-	if (!info->domain) {
-		info->domain |= (NOUVEAU_GEM_DOMAIN_VRAM |
-				 NOUVEAU_GEM_DOMAIN_GART);
-	}
-
-	if (nvbo->flags & NOUVEAU_BO_MAP)
-		info->domain |= NOUVEAU_GEM_DOMAIN_MAPPABLE;
-
-	info->tile_mode = nvbo->base.tile_mode;
-	info->tile_flags = nvbo->base.tile_flags;
-
-	ret = drmCommandWriteRead(nvdev->fd, DRM_NOUVEAU_GEM_NEW,
-				  &req, sizeof(req));
-	if (ret)
-		return ret;
-
-	nouveau_bo_info(nvbo, &req.info);
-	return 0;
-}
-
-static int
-nouveau_bo_kmap(struct nouveau_bo_priv *nvbo)
-{
-	struct nouveau_device_priv *nvdev = nouveau_device(nvbo->base.device);
-
-	if (nvbo->map)
-		return 0;
-
-	if (!nvbo->map_handle)
-		return -EINVAL;
-
-	nvbo->map = mmap(0, nvbo->size, PROT_READ | PROT_WRITE,
-			 MAP_SHARED, nvdev->fd, nvbo->map_handle);
-	if (nvbo->map == MAP_FAILED) {
-		nvbo->map = NULL;
-		return -errno;
-	}
-
-	return 0;
-}
-
-int
-nouveau_bo_new_tile(struct nouveau_device *dev, uint32_t flags, int align,
-		    int size, uint32_t tile_mode, uint32_t tile_flags,
-		    struct nouveau_bo **bo)
-{
-	struct nouveau_bo_priv *nvbo;
-	int ret;
-
-	if (!dev || !bo || *bo)
-		return -EINVAL;
-
-	nvbo = calloc(1, sizeof(struct nouveau_bo_priv));
-	if (!nvbo)
-		return -ENOMEM;
-	nvbo->base.device = dev;
-	nvbo->base.size = size;
-	nvbo->base.tile_mode = tile_mode;
-	nvbo->base.tile_flags = tile_flags;
-
-	nvbo->refcount = 1;
-	/* Don't set NOUVEAU_BO_PIN here, or nouveau_bo_allocated() will
-	 * decided the buffer's already allocated when it's not.  The
-	 * call to nouveau_bo_pin() later will set this flag.
-	 */
-	nvbo->flags = (flags & ~NOUVEAU_BO_PIN);
-	nvbo->size = size;
-	nvbo->align = align;
-
-	if (flags & NOUVEAU_BO_PIN) {
-		ret = nouveau_bo_pin((void *)nvbo, nvbo->flags);
-		if (ret) {
-			nouveau_bo_ref(NULL, (void *)nvbo);
-			return ret;
-		}
-	}
-
-	*bo = &nvbo->base;
-	return 0;
-}
-
-int
-nouveau_bo_new(struct nouveau_device *dev, uint32_t flags, int align,
-	       int size, struct nouveau_bo **bo)
-{
-	uint32_t tile_flags = 0;
-
-	if (flags & NOUVEAU_BO_TILED) {
-		if (flags & NOUVEAU_BO_ZTILE)
-			tile_flags = 0x2800;
-		else
-			tile_flags = 0x7000;
-	}
-
-	return nouveau_bo_new_tile(dev, flags, align, size, 0, tile_flags, bo);
-}
-
-int
-nouveau_bo_user(struct nouveau_device *dev, void *ptr, int size,
-		struct nouveau_bo **bo)
-{
-	struct nouveau_bo_priv *nvbo;
-	int ret;
-
-	ret = nouveau_bo_new(dev, NOUVEAU_BO_MAP, 0, size, bo);
-	if (ret)
-		return ret;
-	nvbo = nouveau_bo(*bo);
-
-	nvbo->sysmem = ptr;
-	nvbo->user = 1;
-	return 0;
-}
-
-int
-nouveau_bo_wrap(struct nouveau_device *dev, uint32_t handle,
-		struct nouveau_bo **bo)
-{
-	struct nouveau_device_priv *nvdev = nouveau_device(dev);
-	struct drm_nouveau_gem_info req;
-	struct nouveau_bo_priv *nvbo;
-	int ret;
-
-	ret = nouveau_bo_new(dev, 0, 0, 0, bo);
-	if (ret)
-		return ret;
-	nvbo = nouveau_bo(*bo);
-
-	req.handle = handle;
-	ret = drmCommandWriteRead(nvdev->fd, DRM_NOUVEAU_GEM_INFO,
-				  &req, sizeof(req));
-	if (ret) {
-		nouveau_bo_ref(NULL, bo);
-		return ret;
-	}
-
-	nouveau_bo_info(nvbo, &req);
-	nvbo->base.size = nvbo->size;
-	return 0;
-}
-
-int
-nouveau_bo_handle_get(struct nouveau_bo *bo, uint32_t *handle)
-{
-	struct nouveau_device_priv *nvdev = nouveau_device(bo->device);
-	struct nouveau_bo_priv *nvbo = nouveau_bo(bo);
-	int ret;
- 
-	if (!bo || !handle)
-		return -EINVAL;
-
-	if (!nvbo->global_handle) {
-		struct drm_gem_flink req;
- 
-		ret = nouveau_bo_kalloc(nvbo, NULL);
-		if (ret)
-			return ret;
-
-		req.handle = nvbo->handle;
-		ret = ioctl(nvdev->fd, DRM_IOCTL_GEM_FLINK, &req);
-		if (ret) {
-			nouveau_bo_kfree(nvbo);
-			return ret;
-		}
-
-		nvbo->global_handle = req.name;
-	}
- 
-	*handle = nvbo->global_handle;
-	return 0;
-}
- 
-int
-nouveau_bo_handle_ref(struct nouveau_device *dev, uint32_t handle,
-		      struct nouveau_bo **bo)
-{
-	struct nouveau_device_priv *nvdev = nouveau_device(dev);
-	struct nouveau_bo_priv *nvbo;
-	struct drm_gem_open req;
-	int ret;
-
-	req.name = handle;
-	ret = ioctl(nvdev->fd, DRM_IOCTL_GEM_OPEN, &req);
-	if (ret) {
-		nouveau_bo_ref(NULL, bo);
-		return ret;
-	}
-
-	ret = nouveau_bo_wrap(dev, req.handle, bo);
-	if (ret) {
-		nouveau_bo_ref(NULL, bo);
-		return ret;
-	}
-
-	nvbo = nouveau_bo(*bo);
-	nvbo->base.handle = nvbo->handle;
-	return 0;
-} 
-
-static void
-nouveau_bo_del(struct nouveau_bo **bo)
-{
-	struct nouveau_bo_priv *nvbo;
-
-	if (!bo || !*bo)
-		return;
-	nvbo = nouveau_bo(*bo);
-	*bo = NULL;
-
-	if (--nvbo->refcount)
-		return;
-
-	if (nvbo->pending) {
-		nvbo->pending = NULL;
-		nouveau_pushbuf_flush(nvbo->pending_channel, 0);
-	}
-
-	nouveau_bo_ufree(nvbo);
-	nouveau_bo_kfree(nvbo);
-	free(nvbo);
-}
-
-int
-nouveau_bo_ref(struct nouveau_bo *ref, struct nouveau_bo **pbo)
-{
-	if (!pbo)
-		return -EINVAL;
-
-	if (ref)
-		nouveau_bo(ref)->refcount++;
-
-	if (*pbo)
-		nouveau_bo_del(pbo);
-
-	*pbo = ref;
-	return 0;
-}
-
-static int
-nouveau_bo_wait(struct nouveau_bo *bo, int cpu_write, int no_wait, int no_block)
-{
-	struct nouveau_device_priv *nvdev = nouveau_device(bo->device);
-	struct nouveau_bo_priv *nvbo = nouveau_bo(bo);
-	struct drm_nouveau_gem_cpu_prep req;
-	int ret;
-
-	if (!nvbo->global_handle && !nvbo->write_marker && !cpu_write)
-		return 0;
-
-	if (nvbo->pending &&
-	    (nvbo->pending->write_domains || cpu_write)) {
-		nvbo->pending = NULL;
-		nouveau_pushbuf_flush(nvbo->pending_channel, 0);
-	}
-
-	req.handle = nvbo->handle;
-	req.flags = 0;
-	if (cpu_write)
-		req.flags |= NOUVEAU_GEM_CPU_PREP_WRITE;
-	if (no_wait)
-		req.flags |= NOUVEAU_GEM_CPU_PREP_NOWAIT;
-	if (no_block)
-		req.flags |= NOUVEAU_GEM_CPU_PREP_NOBLOCK;
-
-	do {
-		ret = drmCommandWrite(nvdev->fd, DRM_NOUVEAU_GEM_CPU_PREP,
-				      &req, sizeof(req));
-	} while (ret == -EAGAIN);
-	if (ret)
-		return ret;
-
-	if (ret == 0)
-		nvbo->write_marker = 0;
-	return 0;
-}
-
-int
-nouveau_bo_map_range(struct nouveau_bo *bo, uint32_t delta, uint32_t size,
-		     uint32_t flags)
-{
-	struct nouveau_bo_priv *nvbo = nouveau_bo(bo);
-	int ret;
-
-	if (!nvbo || bo->map)
-		return -EINVAL;
-
-	if (!nouveau_bo_allocated(nvbo)) {
-		if (nvbo->flags & (NOUVEAU_BO_VRAM | NOUVEAU_BO_GART)) {
-			ret = nouveau_bo_kalloc(nvbo, NULL);
-			if (ret)
-				return ret;
-		}
-
-		if (!nouveau_bo_allocated(nvbo)) {
-			ret = nouveau_bo_ualloc(nvbo);
-			if (ret)
-				return ret;
-		}
-	}
-
-	if (nvbo->sysmem) {
-		bo->map = (char *)nvbo->sysmem + delta;
-	} else {
-		ret = nouveau_bo_kmap(nvbo);
-		if (ret)
-			return ret;
-
-		if (!(flags & NOUVEAU_BO_NOSYNC)) {
-			ret = nouveau_bo_wait(bo, (flags & NOUVEAU_BO_WR),
-					      (flags & NOUVEAU_BO_NOWAIT), 0);
-			if (ret)
-				return ret;
-		}
-
-		bo->map = (char *)nvbo->map + delta;
-	}
-
-	return 0;
-}
-
-void
-nouveau_bo_map_flush(struct nouveau_bo *bo, uint32_t delta, uint32_t size)
-{
-}
-
-int
-nouveau_bo_map(struct nouveau_bo *bo, uint32_t flags)
-{
-	return nouveau_bo_map_range(bo, 0, bo->size, flags);
-}
-
-void
-nouveau_bo_unmap(struct nouveau_bo *bo)
-{
-	struct nouveau_bo_priv *nvbo = nouveau_bo(bo);
-
-	if (bo->map && !nvbo->sysmem) {
-		struct nouveau_device_priv *nvdev = nouveau_device(bo->device);
-		struct drm_nouveau_gem_cpu_fini req;
-
-		req.handle = nvbo->handle;
-		drmCommandWrite(nvdev->fd, DRM_NOUVEAU_GEM_CPU_FINI,
-				&req, sizeof(req));
-	}
-
-	bo->map = NULL;
-}
-
-int
-nouveau_bo_pin(struct nouveau_bo *bo, uint32_t flags)
-{
-	struct nouveau_device_priv *nvdev = nouveau_device(bo->device);
-	struct nouveau_bo_priv *nvbo = nouveau_bo(bo);
-	struct drm_nouveau_gem_pin req;
-	int ret;
-
-	if (nvbo->pinned)
-		return 0;
-
-	/* Ensure we have a kernel object... */
-	if (!nvbo->flags) {
-		if (!(flags & (NOUVEAU_BO_VRAM | NOUVEAU_BO_GART)))
-			return -EINVAL;
-		nvbo->flags = flags;
-	}
-
-	if (!nvbo->handle) {
-		ret = nouveau_bo_kalloc(nvbo, NULL);
-		if (ret)
-			return ret;
-	}
-
-	/* Now force it to stay put :) */
-	req.handle = nvbo->handle;
-	req.domain = 0;
-	if (nvbo->flags & NOUVEAU_BO_VRAM)
-		req.domain |= NOUVEAU_GEM_DOMAIN_VRAM;
-	if (nvbo->flags & NOUVEAU_BO_GART)
-		req.domain |= NOUVEAU_GEM_DOMAIN_GART;
-
-	ret = drmCommandWriteRead(nvdev->fd, DRM_NOUVEAU_GEM_PIN, &req,
-				  sizeof(struct drm_nouveau_gem_pin));
-	if (ret)
-		return ret;
-	nvbo->offset = req.offset;
-	nvbo->domain = req.domain;
-	nvbo->pinned = 1;
-	nvbo->flags |= NOUVEAU_BO_PIN;
-
-	/* Fill in public nouveau_bo members */
-	if (nvbo->domain & NOUVEAU_GEM_DOMAIN_VRAM)
-		bo->flags = NOUVEAU_BO_VRAM;
-	if (nvbo->domain & NOUVEAU_GEM_DOMAIN_GART)
-		bo->flags = NOUVEAU_BO_GART;
-	bo->offset = nvbo->offset;
-
-	return 0;
-}
-
-void
-nouveau_bo_unpin(struct nouveau_bo *bo)
-{
-	struct nouveau_device_priv *nvdev = nouveau_device(bo->device);
-	struct nouveau_bo_priv *nvbo = nouveau_bo(bo);
-	struct drm_nouveau_gem_unpin req;
-
-	if (!nvbo->pinned)
-		return;
-
-	req.handle = nvbo->handle;
-	drmCommandWrite(nvdev->fd, DRM_NOUVEAU_GEM_UNPIN, &req, sizeof(req));
-
-	nvbo->pinned = bo->offset = bo->flags = 0;
-}
-
-int
-nouveau_bo_busy(struct nouveau_bo *bo, uint32_t access)
-{
-	return nouveau_bo_wait(bo, (access & NOUVEAU_BO_WR), 1, 1);
-}
-
-uint32_t
-nouveau_bo_pending(struct nouveau_bo *bo)
-{
-	struct nouveau_bo_priv *nvbo = nouveau_bo(bo);
-	uint32_t flags;
-
-	if (!nvbo->pending)
-		return 0;
-
-	flags = 0;
-	if (nvbo->pending->read_domains)
-		flags |= NOUVEAU_BO_RD;
-	if (nvbo->pending->write_domains)
-		flags |= NOUVEAU_BO_WR;
-
-	return flags;
-}
-
-struct drm_nouveau_gem_pushbuf_bo *
-nouveau_bo_emit_buffer(struct nouveau_channel *chan, struct nouveau_bo *bo)
-{
-	struct nouveau_pushbuf_priv *nvpb = nouveau_pushbuf(chan->pushbuf);
-	struct nouveau_bo_priv *nvbo = nouveau_bo(bo);
-	struct drm_nouveau_gem_pushbuf_bo *pbbo;
-	struct nouveau_bo *ref = NULL;
-	int ret;
-
-	if (nvbo->pending)
-		return nvbo->pending;
-
-	if (!nvbo->handle) {
-		ret = nouveau_bo_kalloc(nvbo, chan);
-		if (ret)
-			return NULL;
-
-		if (nvbo->sysmem) {
-			void *sysmem_tmp = nvbo->sysmem;
-
-			nvbo->sysmem = NULL;
-			ret = nouveau_bo_map(bo, NOUVEAU_BO_WR);
-			if (ret)
-				return NULL;
-			nvbo->sysmem = sysmem_tmp;
-
-			memcpy(bo->map, nvbo->sysmem, nvbo->base.size);
-			nouveau_bo_ufree(nvbo);
-			nouveau_bo_unmap(bo);
-		}
-	}
-
-	if (nvpb->nr_buffers >= NOUVEAU_GEM_MAX_BUFFERS)
-		return NULL;
-	pbbo = nvpb->buffers + nvpb->nr_buffers++;
-	nvbo->pending = pbbo;
-	nvbo->pending_channel = chan;
-	nvbo->pending_refcnt = 0;
-
-	nouveau_bo_ref(bo, &ref);
-	pbbo->user_priv = (uint64_t)(unsigned long)ref;
-	pbbo->handle = nvbo->handle;
-	pbbo->valid_domains = NOUVEAU_GEM_DOMAIN_VRAM | NOUVEAU_GEM_DOMAIN_GART;
-	pbbo->read_domains = 0;
-	pbbo->write_domains = 0;
-	pbbo->presumed_domain = nvbo->domain;
-	pbbo->presumed_offset = nvbo->offset;
-	pbbo->presumed_ok = 1;
-	return pbbo;
-}
diff --git a/libdrm/nouveau/nouveau_bo.h b/libdrm/nouveau/nouveau_bo.h
deleted file mode 100644
index fdad63ef..00000000
--- a/libdrm/nouveau/nouveau_bo.h
+++ /dev/null
@@ -1,112 +0,0 @@
-/*
- * Copyright 2007 Nouveau Project
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
- * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef __NOUVEAU_BO_H__
-#define __NOUVEAU_BO_H__
-
-/* Relocation/Buffer type flags */
-#define NOUVEAU_BO_VRAM   (1 << 0)
-#define NOUVEAU_BO_GART   (1 << 1)
-#define NOUVEAU_BO_RD     (1 << 2)
-#define NOUVEAU_BO_WR     (1 << 3)
-#define NOUVEAU_BO_RDWR   (NOUVEAU_BO_RD | NOUVEAU_BO_WR)
-#define NOUVEAU_BO_MAP    (1 << 4)
-#define NOUVEAU_BO_PIN    (1 << 5)
-#define NOUVEAU_BO_LOW    (1 << 6)
-#define NOUVEAU_BO_HIGH   (1 << 7)
-#define NOUVEAU_BO_OR     (1 << 8)
-#define NOUVEAU_BO_LOCAL  (1 << 9)
-#define NOUVEAU_BO_TILED  (1 << 10)
-#define NOUVEAU_BO_ZTILE  (1 << 11)
-#define NOUVEAU_BO_INVAL  (1 << 12)
-#define NOUVEAU_BO_NOSYNC (1 << 13)
-#define NOUVEAU_BO_NOWAIT (1 << 14)
-#define NOUVEAU_BO_IFLUSH (1 << 15)
-#define NOUVEAU_BO_DUMMY  (1 << 31)
-
-struct nouveau_bo {
-	struct nouveau_device *device;
-	uint32_t handle;
-
-	uint64_t size;
-	void *map;
-
-	uint32_t tile_mode;
-	uint32_t tile_flags;
-
-	/* Available when buffer is pinned *only* */
-	uint32_t flags;
-	uint64_t offset;
-};
-
-int
-nouveau_bo_new(struct nouveau_device *, uint32_t flags, int align, int size,
-	       struct nouveau_bo **);
-
-int
-nouveau_bo_new_tile(struct nouveau_device *, uint32_t flags, int align,
-		    int size, uint32_t tile_mode, uint32_t tile_flags,
-		    struct nouveau_bo **);
-
-int
-nouveau_bo_user(struct nouveau_device *, void *ptr, int size,
-		struct nouveau_bo **);
-
-int
-nouveau_bo_wrap(struct nouveau_device *, uint32_t handle, struct nouveau_bo **);
-
-int
-nouveau_bo_handle_get(struct nouveau_bo *, uint32_t *);
-
-int
-nouveau_bo_handle_ref(struct nouveau_device *, uint32_t handle,
-		      struct nouveau_bo **);
-
-int
-nouveau_bo_ref(struct nouveau_bo *, struct nouveau_bo **);
-
-int
-nouveau_bo_map_range(struct nouveau_bo *, uint32_t delta, uint32_t size,
-		     uint32_t flags);
-
-void
-nouveau_bo_map_flush(struct nouveau_bo *, uint32_t delta, uint32_t size);
-
-int
-nouveau_bo_map(struct nouveau_bo *, uint32_t flags);
-
-void
-nouveau_bo_unmap(struct nouveau_bo *);
-
-int
-nouveau_bo_pin(struct nouveau_bo *, uint32_t flags);
-
-void
-nouveau_bo_unpin(struct nouveau_bo *);
-
-int
-nouveau_bo_busy(struct nouveau_bo *, uint32_t access);
-
-uint32_t
-nouveau_bo_pending(struct nouveau_bo *);
-
-#endif
diff --git a/libdrm/nouveau/nouveau_channel.c b/libdrm/nouveau/nouveau_channel.c
deleted file mode 100644
index 674c5c37..00000000
--- a/libdrm/nouveau/nouveau_channel.c
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * Copyright 2007 Nouveau Project
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
- * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <stdlib.h>
-#include <string.h>
-#include <errno.h>
-
-#include "nouveau_private.h"
-
-int
-nouveau_channel_alloc(struct nouveau_device *dev, uint32_t fb_ctxdma,
-		      uint32_t tt_ctxdma, struct nouveau_channel **chan)
-{
-	struct nouveau_device_priv *nvdev = nouveau_device(dev);
-	struct nouveau_channel_priv *nvchan;
-	unsigned i;
-	int ret;
-
-	if (!nvdev || !chan || *chan)
-	    return -EINVAL;
-
-	nvchan = calloc(1, sizeof(struct nouveau_channel_priv));
-	if (!nvchan)
-		return -ENOMEM;
-	nvchan->base.device = dev;
-
-	nvchan->drm.fb_ctxdma_handle = fb_ctxdma;
-	nvchan->drm.tt_ctxdma_handle = tt_ctxdma;
-	ret = drmCommandWriteRead(nvdev->fd, DRM_NOUVEAU_CHANNEL_ALLOC,
-				  &nvchan->drm, sizeof(nvchan->drm));
-	if (ret) {
-		free(nvchan);
-		return ret;
-	}
-
-	nvchan->base.id = nvchan->drm.channel;
-	if (nouveau_grobj_ref(&nvchan->base, nvchan->drm.fb_ctxdma_handle,
-			      &nvchan->base.vram) ||
-	    nouveau_grobj_ref(&nvchan->base, nvchan->drm.tt_ctxdma_handle,
-		    	      &nvchan->base.gart)) {
-		nouveau_channel_free((void *)&nvchan);
-		return -EINVAL;
-	}
-
-	/* Mark all DRM-assigned subchannels as in-use */
-	for (i = 0; i < nvchan->drm.nr_subchan; i++) {
-		struct nouveau_grobj_priv *gr = calloc(1, sizeof(*gr));
-
-		gr->base.bound = NOUVEAU_GROBJ_BOUND_EXPLICIT;
-		gr->base.subc = i;
-		gr->base.handle = nvchan->drm.subchan[i].handle;
-		gr->base.grclass = nvchan->drm.subchan[i].grclass;
-		gr->base.channel = &nvchan->base;
-
-		nvchan->base.subc[i].gr = &gr->base;
-	}
-
-	ret = nouveau_bo_wrap(dev, nvchan->drm.notifier_handle,
-			      &nvchan->notifier_bo);
-	if (!ret)
-		ret = nouveau_bo_map(nvchan->notifier_bo, NOUVEAU_BO_RDWR);
-	if (ret) {
-		nouveau_channel_free((void *)&nvchan);
-		return ret;
-	}
-
-	ret = nouveau_grobj_alloc(&nvchan->base, 0x00000000, 0x0030,
-				  &nvchan->base.nullobj);
-	if (ret) {
-		nouveau_channel_free((void *)&nvchan);
-		return ret;
-	}
-
-	nouveau_pushbuf_init(&nvchan->base);
-
-	*chan = &nvchan->base;
-	return 0;
-}
-
-void
-nouveau_channel_free(struct nouveau_channel **chan)
-{
-	struct nouveau_channel_priv *nvchan;
-	struct nouveau_device_priv *nvdev;
-	struct drm_nouveau_channel_free cf;
-
-	if (!chan || !*chan)
-		return;
-	nvchan = nouveau_channel(*chan);
-	*chan = NULL;
-	nvdev = nouveau_device(nvchan->base.device);
-
-	FIRE_RING(&nvchan->base);
-
-	nouveau_bo_unmap(nvchan->notifier_bo);
-	nouveau_bo_ref(NULL, &nvchan->notifier_bo);
-
-	nouveau_grobj_free(&nvchan->base.vram);
-	nouveau_grobj_free(&nvchan->base.gart);
-	nouveau_grobj_free(&nvchan->base.nullobj);
-
-	cf.channel = nvchan->drm.channel;
-	drmCommandWrite(nvdev->fd, DRM_NOUVEAU_CHANNEL_FREE, &cf, sizeof(cf));
-	free(nvchan);
-}
-
-
diff --git a/libdrm/nouveau/nouveau_channel.h b/libdrm/nouveau/nouveau_channel.h
deleted file mode 100644
index 294f7497..00000000
--- a/libdrm/nouveau/nouveau_channel.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * Copyright 2007 Nouveau Project
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
- * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef __NOUVEAU_CHANNEL_H__
-#define __NOUVEAU_CHANNEL_H__
-
-struct nouveau_subchannel {
-	struct nouveau_grobj *gr;
-	unsigned sequence;
-};
-
-struct nouveau_channel {
-	struct nouveau_device *device;
-	int id;
-
-	struct nouveau_pushbuf *pushbuf;
-
-	struct nouveau_grobj *nullobj;
-	struct nouveau_grobj *vram;
-	struct nouveau_grobj *gart;
-
-	void *user_private;
-	void (*hang_notify)(struct nouveau_channel *);
-	void (*flush_notify)(struct nouveau_channel *);
-
-	struct nouveau_subchannel subc[8];
-	unsigned subc_sequence;
-};
-
-int
-nouveau_channel_alloc(struct nouveau_device *, uint32_t fb, uint32_t tt,
-		      struct nouveau_channel **);
-
-void
-nouveau_channel_free(struct nouveau_channel **);
-
-#endif
diff --git a/libdrm/nouveau/nouveau_class.h b/libdrm/nouveau/nouveau_class.h
deleted file mode 100644
index c7dda02e..00000000
--- a/libdrm/nouveau/nouveau_class.h
+++ /dev/null
@@ -1,8393 +0,0 @@
-/*************************************************************************
-
-   Autogenerated file, do not edit !
-
-**************************************************************************
-
-   Copyright (C) 2006-2008 :
-   Dmitry Baryshkov,
-   Laurent Carlier,
-   Matthieu Castet,
-   Dawid Gajownik,
-   Jeremy Kolb,
-   Stephane Loeuillet,
-   Patrice Mandin,
-   Stephane Marchesin,
-   Serge Martin,
-   Sylvain Munaut,
-   Simon Raffeiner,
-   Ben Skeggs,
-   Erik Waling,
-   koala_br,
-
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining
-a copy of this software and associated documentation files (the
-"Software"), to deal in the Software without restriction, including
-without limitation the rights to use, copy, modify, merge, publish,
-distribute, sublicense, and/or sell copies of the Software, and to
-permit persons to whom the Software is furnished to do so, subject to
-the following conditions:
-
-The above copyright notice and this permission notice (including the
-next paragraph) shall be included in all copies or substantial
-portions of the Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
-IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
-LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
-OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
-WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-*************************************************************************/
-
-
-#ifndef NOUVEAU_REG_H
-#define NOUVEAU_REG_H 1
-
-
-#define NV01_ROOT									0x00000001
-
-
-
-#define NV01_CONTEXT_DMA								0x00000002
-
-
-
-#define NV01_DEVICE									0x00000003
-
-
-
-#define NV01_TIMER									0x00000004
-
-#define  NV01_TIMER_SYNCHRONIZE								0x00000100
-#define  NV01_TIMER_STOP_ALARM								0x00000104
-#define  NV01_TIMER_DMA_NOTIFY								0x00000180
-#define  NV01_TIMER_TIME(x)								(0x00000300+((x)*4))
-#define  NV01_TIMER_TIME__SIZE								0x00000002
-#define  NV01_TIMER_ALARM_NOTIFY							0x00000308
-
-
-#define NV_IMAGE_STENCIL								0x00000010
-
-#define  NV_IMAGE_STENCIL_NOTIFY							0x00000104
-#define  NV_IMAGE_STENCIL_DMA_NOTIFY							0x00000180
-#define  NV_IMAGE_STENCIL_IMAGE_OUTPUT							0x00000200
-#define  NV_IMAGE_STENCIL_IMAGE_INPUT(x)						(0x00000204+((x)*4))
-#define  NV_IMAGE_STENCIL_IMAGE_INPUT__SIZE						0x00000002
-
-
-#define NV_IMAGE_BLEND_AND								0x00000011
-
-#define  NV_IMAGE_BLEND_AND_NOP								0x00000100
-#define  NV_IMAGE_BLEND_AND_NOTIFY							0x00000104
-#define  NV_IMAGE_BLEND_AND_DMA_NOTIFY							0x00000180
-#define  NV_IMAGE_BLEND_AND_IMAGE_OUTPUT						0x00000200
-#define  NV_IMAGE_BLEND_AND_BETA_INPUT							0x00000204
-#define  NV_IMAGE_BLEND_AND_IMAGE_INPUT							0x00000208
-
-
-#define NV01_CONTEXT_BETA1								0x00000012
-
-#define  NV01_CONTEXT_BETA1_NOP								0x00000100
-#define  NV01_CONTEXT_BETA1_NOTIFY							0x00000104
-#define  NV01_CONTEXT_BETA1_DMA_NOTIFY							0x00000180
-#define  NV01_CONTEXT_BETA1_BETA_1D31							0x00000300
-
-
-#define NV_IMAGE_ROP_AND								0x00000013
-
-#define  NV_IMAGE_ROP_AND_NOTIFY							0x00000104
-#define  NV_IMAGE_ROP_AND_DMA_NOTIFY							0x00000180
-#define  NV_IMAGE_ROP_AND_IMAGE_OUTPUT							0x00000200
-#define  NV_IMAGE_ROP_AND_ROP_INPUT							0x00000204
-#define  NV_IMAGE_ROP_AND_IMAGE_INPUT(x)						(0x00000208+((x)*4))
-#define  NV_IMAGE_ROP_AND_IMAGE_INPUT__SIZE						0x00000002
-
-
-#define NV_IMAGE_COLOR_KEY								0x00000015
-
-
-
-#define NV01_CONTEXT_COLOR_KEY								0x00000017
-
-#define  NV01_CONTEXT_COLOR_KEY_NOP							0x00000100
-#define  NV01_CONTEXT_COLOR_KEY_NOTIFY							0x00000104
-#define  NV01_CONTEXT_COLOR_KEY_DMA_NOTIFY						0x00000180
-#define  NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT						0x00000300
-#define   NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_X16A8Y8					0x00000001
-#define   NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_X24Y8					0x00000002
-#define   NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_X16A1R5G5B5				0x00000003
-#define   NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_X17R5G5B5					0x00000004
-#define   NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_A8R8G8B8					0x00000005
-#define   NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_X8R8G8B8					0x00000006
-#define   NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_A16Y16					0x00000007
-#define   NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_X16Y16					0x00000008
-#define  NV01_CONTEXT_COLOR_KEY_COLOR							0x00000304
-
-
-#define NV01_CONTEXT_PATTERN								0x00000018
-
-#define  NV01_CONTEXT_PATTERN_NOP							0x00000100
-#define  NV01_CONTEXT_PATTERN_NOTIFY							0x00000104
-#define  NV01_CONTEXT_PATTERN_DMA_NOTIFY						0x00000180
-#define  NV01_CONTEXT_PATTERN_COLOR_FORMAT						0x00000300
-#define  NV01_CONTEXT_PATTERN_MONOCHROME_FORMAT						0x00000304
-#define  NV01_CONTEXT_PATTERN_SHAPE							0x00000308
-#define  NV01_CONTEXT_PATTERN_COLOR(x)							(0x00000310+((x)*4))
-#define  NV01_CONTEXT_PATTERN_COLOR__SIZE						0x00000002
-#define  NV01_CONTEXT_PATTERN_PATTERN(x)						(0x00000318+((x)*4))
-#define  NV01_CONTEXT_PATTERN_PATTERN__SIZE						0x00000002
-
-
-#define NV01_CONTEXT_CLIP_RECTANGLE							0x00000019
-
-#define  NV01_CONTEXT_CLIP_RECTANGLE_NOP						0x00000100
-#define  NV01_CONTEXT_CLIP_RECTANGLE_NOTIFY						0x00000104
-#define  NV01_CONTEXT_CLIP_RECTANGLE_DMA_NOTIFY						0x00000180
-#define  NV01_CONTEXT_CLIP_RECTANGLE_POINT						0x00000300
-#define   NV01_CONTEXT_CLIP_RECTANGLE_POINT_X_SHIFT					0
-#define   NV01_CONTEXT_CLIP_RECTANGLE_POINT_X_MASK					0x0000ffff
-#define   NV01_CONTEXT_CLIP_RECTANGLE_POINT_Y_SHIFT					16
-#define   NV01_CONTEXT_CLIP_RECTANGLE_POINT_Y_MASK					0xffff0000
-#define  NV01_CONTEXT_CLIP_RECTANGLE_SIZE						0x00000304
-#define   NV01_CONTEXT_CLIP_RECTANGLE_SIZE_W_SHIFT					0
-#define   NV01_CONTEXT_CLIP_RECTANGLE_SIZE_W_MASK					0x0000ffff
-#define   NV01_CONTEXT_CLIP_RECTANGLE_SIZE_H_SHIFT					16
-#define   NV01_CONTEXT_CLIP_RECTANGLE_SIZE_H_MASK					0xffff0000
-
-
-#define NV01_RENDER_SOLID_LINE								0x0000001c
-
-#define  NV01_RENDER_SOLID_LINE_NOP							0x00000100
-#define  NV01_RENDER_SOLID_LINE_NOTIFY							0x00000104
-#define  NV01_RENDER_SOLID_LINE_PATCH							0x0000010c
-#define  NV01_RENDER_SOLID_LINE_DMA_NOTIFY						0x00000180
-#define  NV01_RENDER_SOLID_LINE_CLIP_RECTANGLE						0x00000184
-#define  NV01_RENDER_SOLID_LINE_PATTERN							0x00000188
-#define  NV01_RENDER_SOLID_LINE_ROP							0x0000018c
-#define  NV01_RENDER_SOLID_LINE_BETA1							0x00000190
-#define  NV01_RENDER_SOLID_LINE_SURFACE							0x00000194
-#define  NV01_RENDER_SOLID_LINE_OPERATION						0x000002fc
-#define   NV01_RENDER_SOLID_LINE_OPERATION_SRCCOPY_AND					0x00000000
-#define   NV01_RENDER_SOLID_LINE_OPERATION_ROP_AND					0x00000001
-#define   NV01_RENDER_SOLID_LINE_OPERATION_BLEND_AND					0x00000002
-#define   NV01_RENDER_SOLID_LINE_OPERATION_SRCCOPY					0x00000003
-#define   NV01_RENDER_SOLID_LINE_OPERATION_SRCCOPY_PREMULT				0x00000004
-#define   NV01_RENDER_SOLID_LINE_OPERATION_BLEND_PREMULT				0x00000005
-#define  NV01_RENDER_SOLID_LINE_COLOR_FORMAT						0x00000300
-#define   NV01_RENDER_SOLID_LINE_COLOR_FORMAT_X16A8Y8					0x00000001
-#define   NV01_RENDER_SOLID_LINE_COLOR_FORMAT_X24Y8					0x00000002
-#define   NV01_RENDER_SOLID_LINE_COLOR_FORMAT_X16A1R5G5B5				0x00000003
-#define   NV01_RENDER_SOLID_LINE_COLOR_FORMAT_X17R5G5B5					0x00000004
-#define   NV01_RENDER_SOLID_LINE_COLOR_FORMAT_A8R8G8B8					0x00000005
-#define   NV01_RENDER_SOLID_LINE_COLOR_FORMAT_X8R8G8B8					0x00000006
-#define   NV01_RENDER_SOLID_LINE_COLOR_FORMAT_A16Y16					0x00000007
-#define   NV01_RENDER_SOLID_LINE_COLOR_FORMAT_X16Y16					0x00000008
-#define  NV01_RENDER_SOLID_LINE_COLOR							0x00000304
-#define  NV01_RENDER_SOLID_LINE_LINE_POINT0(x)						(0x00000400+((x)*8))
-#define  NV01_RENDER_SOLID_LINE_LINE_POINT0__SIZE					0x00000010
-#define   NV01_RENDER_SOLID_LINE_LINE_POINT0_X_SHIFT					0
-#define   NV01_RENDER_SOLID_LINE_LINE_POINT0_X_MASK					0x0000ffff
-#define   NV01_RENDER_SOLID_LINE_LINE_POINT0_Y_SHIFT					16
-#define   NV01_RENDER_SOLID_LINE_LINE_POINT0_Y_MASK					0xffff0000
-#define  NV01_RENDER_SOLID_LINE_LINE_POINT1(x)						(0x00000404+((x)*8))
-#define  NV01_RENDER_SOLID_LINE_LINE_POINT1__SIZE					0x00000010
-#define   NV01_RENDER_SOLID_LINE_LINE_POINT1_X_SHIFT					0
-#define   NV01_RENDER_SOLID_LINE_LINE_POINT1_X_MASK					0x0000ffff
-#define   NV01_RENDER_SOLID_LINE_LINE_POINT1_Y_SHIFT					16
-#define   NV01_RENDER_SOLID_LINE_LINE_POINT1_Y_MASK					0xffff0000
-#define  NV01_RENDER_SOLID_LINE_LINE32_POINT0_X(x)					(0x00000480+((x)*16))
-#define  NV01_RENDER_SOLID_LINE_LINE32_POINT0_X__SIZE					0x00000010
-#define  NV01_RENDER_SOLID_LINE_LINE32_POINT0_Y(x)					(0x00000484+((x)*16))
-#define  NV01_RENDER_SOLID_LINE_LINE32_POINT0_Y__SIZE					0x00000010
-#define  NV01_RENDER_SOLID_LINE_LINE32_POINT1_X(x)					(0x00000488+((x)*16))
-#define  NV01_RENDER_SOLID_LINE_LINE32_POINT1_X__SIZE					0x00000010
-#define  NV01_RENDER_SOLID_LINE_LINE32_POINT1_Y(x)					(0x0000048c+((x)*16))
-#define  NV01_RENDER_SOLID_LINE_LINE32_POINT1_Y__SIZE					0x00000010
-#define  NV01_RENDER_SOLID_LINE_POLYLINE(x)						(0x00000500+((x)*4))
-#define  NV01_RENDER_SOLID_LINE_POLYLINE__SIZE						0x00000020
-#define   NV01_RENDER_SOLID_LINE_POLYLINE_X_SHIFT					0
-#define   NV01_RENDER_SOLID_LINE_POLYLINE_X_MASK					0x0000ffff
-#define   NV01_RENDER_SOLID_LINE_POLYLINE_Y_SHIFT					16
-#define   NV01_RENDER_SOLID_LINE_POLYLINE_Y_MASK					0xffff0000
-#define  NV01_RENDER_SOLID_LINE_POLYLINE32_POINT_X(x)					(0x00000580+((x)*8))
-#define  NV01_RENDER_SOLID_LINE_POLYLINE32_POINT_X__SIZE				0x00000010
-#define  NV01_RENDER_SOLID_LINE_POLYLINE32_POINT_Y(x)					(0x00000584+((x)*8))
-#define  NV01_RENDER_SOLID_LINE_POLYLINE32_POINT_Y__SIZE				0x00000010
-#define  NV01_RENDER_SOLID_LINE_CPOLYLINE_COLOR(x)					(0x00000600+((x)*8))
-#define  NV01_RENDER_SOLID_LINE_CPOLYLINE_COLOR__SIZE					0x00000010
-#define  NV01_RENDER_SOLID_LINE_CPOLYLINE_POINT(x)					(0x00000604+((x)*8))
-#define  NV01_RENDER_SOLID_LINE_CPOLYLINE_POINT__SIZE					0x00000010
-#define   NV01_RENDER_SOLID_LINE_CPOLYLINE_POINT_X_SHIFT				0
-#define   NV01_RENDER_SOLID_LINE_CPOLYLINE_POINT_X_MASK					0x0000ffff
-#define   NV01_RENDER_SOLID_LINE_CPOLYLINE_POINT_Y_SHIFT				16
-#define   NV01_RENDER_SOLID_LINE_CPOLYLINE_POINT_Y_MASK					0xffff0000
-
-
-#define NV01_RENDER_SOLID_TRIANGLE							0x0000001d
-
-#define  NV01_RENDER_SOLID_TRIANGLE_NOP							0x00000100
-#define  NV01_RENDER_SOLID_TRIANGLE_NOTIFY						0x00000104
-#define  NV01_RENDER_SOLID_TRIANGLE_PATCH						0x0000010c
-#define  NV01_RENDER_SOLID_TRIANGLE_DMA_NOTIFY						0x00000180
-#define  NV01_RENDER_SOLID_TRIANGLE_CLIP_RECTANGLE					0x00000184
-#define  NV01_RENDER_SOLID_TRIANGLE_PATTERN						0x00000188
-#define  NV01_RENDER_SOLID_TRIANGLE_ROP							0x0000018c
-#define  NV01_RENDER_SOLID_TRIANGLE_BETA1						0x00000190
-#define  NV01_RENDER_SOLID_TRIANGLE_SURFACE						0x00000194
-#define  NV01_RENDER_SOLID_TRIANGLE_OPERATION						0x000002fc
-#define   NV01_RENDER_SOLID_TRIANGLE_OPERATION_SRCCOPY_AND				0x00000000
-#define   NV01_RENDER_SOLID_TRIANGLE_OPERATION_ROP_AND					0x00000001
-#define   NV01_RENDER_SOLID_TRIANGLE_OPERATION_BLEND_AND				0x00000002
-#define   NV01_RENDER_SOLID_TRIANGLE_OPERATION_SRCCOPY					0x00000003
-#define   NV01_RENDER_SOLID_TRIANGLE_OPERATION_SRCCOPY_PREMULT				0x00000004
-#define   NV01_RENDER_SOLID_TRIANGLE_OPERATION_BLEND_PREMULT				0x00000005
-#define  NV01_RENDER_SOLID_TRIANGLE_COLOR_FORMAT					0x00000300
-#define  NV01_RENDER_SOLID_TRIANGLE_COLOR						0x00000304
-#define  NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT0					0x00000310
-#define   NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT0_X_SHIFT				0
-#define   NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT0_X_MASK				0x0000ffff
-#define   NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT0_Y_SHIFT				16
-#define   NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT0_Y_MASK				0xffff0000
-#define  NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT1					0x00000314
-#define   NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT1_X_SHIFT				0
-#define   NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT1_X_MASK				0x0000ffff
-#define   NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT1_Y_SHIFT				16
-#define   NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT1_Y_MASK				0xffff0000
-#define  NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT2					0x00000318
-#define   NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT2_X_SHIFT				0
-#define   NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT2_X_MASK				0x0000ffff
-#define   NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT2_Y_SHIFT				16
-#define   NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT2_Y_MASK				0xffff0000
-#define  NV01_RENDER_SOLID_TRIANGLE_TRIANGLE32_POINT0_X					0x00000320
-#define  NV01_RENDER_SOLID_TRIANGLE_TRIANGLE32_POINT0_Y					0x00000324
-#define  NV01_RENDER_SOLID_TRIANGLE_TRIANGLE32_POINT1_X					0x00000328
-#define  NV01_RENDER_SOLID_TRIANGLE_TRIANGLE32_POINT1_Y					0x0000032c
-#define  NV01_RENDER_SOLID_TRIANGLE_TRIANGLE32_POINT2_X					0x00000330
-#define  NV01_RENDER_SOLID_TRIANGLE_TRIANGLE32_POINT2_Y					0x00000334
-#define  NV01_RENDER_SOLID_TRIANGLE_TRIMESH(x)						(0x00000400+((x)*4))
-#define  NV01_RENDER_SOLID_TRIANGLE_TRIMESH__SIZE					0x00000020
-#define   NV01_RENDER_SOLID_TRIANGLE_TRIMESH_X_SHIFT					0
-#define   NV01_RENDER_SOLID_TRIANGLE_TRIMESH_X_MASK					0x0000ffff
-#define   NV01_RENDER_SOLID_TRIANGLE_TRIMESH_Y_SHIFT					16
-#define   NV01_RENDER_SOLID_TRIANGLE_TRIMESH_Y_MASK					0xffff0000
-#define  NV01_RENDER_SOLID_TRIANGLE_TRIMESH32_POINT_X(x)				(0x00000480+((x)*8))
-#define  NV01_RENDER_SOLID_TRIANGLE_TRIMESH32_POINT_X__SIZE				0x00000010
-#define  NV01_RENDER_SOLID_TRIANGLE_TRIMESH32_POINT_Y(x)				(0x00000484+((x)*8))
-#define  NV01_RENDER_SOLID_TRIANGLE_TRIMESH32_POINT_Y__SIZE				0x00000010
-#define  NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_COLOR(x)					(0x00000500+((x)*16))
-#define  NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_COLOR__SIZE				0x00000008
-#define  NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT0(x)					(0x00000504+((x)*16))
-#define  NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT0__SIZE				0x00000008
-#define   NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT0_X_SHIFT				0
-#define   NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT0_X_MASK				0x0000ffff
-#define   NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT0_Y_SHIFT				16
-#define   NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT0_Y_MASK				0xffff0000
-#define  NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT1(x)					(0x00000508+((x)*16))
-#define  NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT1__SIZE				0x00000008
-#define   NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT1_X_SHIFT				0
-#define   NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT1_X_MASK				0x0000ffff
-#define   NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT1_Y_SHIFT				16
-#define   NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT1_Y_MASK				0xffff0000
-#define  NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT2(x)					(0x0000050c+((x)*16))
-#define  NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT2__SIZE				0x00000008
-#define   NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT2_X_SHIFT				0
-#define   NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT2_X_MASK				0x0000ffff
-#define   NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT2_Y_SHIFT				16
-#define   NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT2_Y_MASK				0xffff0000
-#define  NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_COLOR(x)					(0x00000580+((x)*8))
-#define  NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_COLOR__SIZE				0x00000010
-#define  NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_POINT(x)					(0x00000584+((x)*8))
-#define  NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_POINT__SIZE				0x00000010
-#define   NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_POINT_X_SHIFT				0
-#define   NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_POINT_X_MASK				0x0000ffff
-#define   NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_POINT_Y_SHIFT				16
-#define   NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_POINT_Y_MASK				0xffff0000
-
-
-#define NV01_RENDER_SOLID_RECTANGLE							0x0000001e
-
-#define  NV01_RENDER_SOLID_RECTANGLE_NOP						0x00000100
-#define  NV01_RENDER_SOLID_RECTANGLE_NOTIFY						0x00000104
-#define  NV01_RENDER_SOLID_RECTANGLE_PATCH						0x0000010c
-#define  NV01_RENDER_SOLID_RECTANGLE_DMA_NOTIFY						0x00000180
-#define  NV01_RENDER_SOLID_RECTANGLE_CLIP_RECTANGLE					0x00000184
-#define  NV01_RENDER_SOLID_RECTANGLE_PATTERN						0x00000188
-#define  NV01_RENDER_SOLID_RECTANGLE_ROP						0x0000018c
-#define  NV01_RENDER_SOLID_RECTANGLE_BETA1						0x00000190
-#define  NV01_RENDER_SOLID_RECTANGLE_SURFACE						0x00000194
-#define  NV01_RENDER_SOLID_RECTANGLE_OPERATION						0x000002fc
-#define   NV01_RENDER_SOLID_RECTANGLE_OPERATION_SRCCOPY_AND				0x00000000
-#define   NV01_RENDER_SOLID_RECTANGLE_OPERATION_ROP_AND					0x00000001
-#define   NV01_RENDER_SOLID_RECTANGLE_OPERATION_BLEND_AND				0x00000002
-#define   NV01_RENDER_SOLID_RECTANGLE_OPERATION_SRCCOPY					0x00000003
-#define   NV01_RENDER_SOLID_RECTANGLE_OPERATION_SRCCOPY_PREMULT				0x00000004
-#define   NV01_RENDER_SOLID_RECTANGLE_OPERATION_BLEND_PREMULT				0x00000005
-#define  NV01_RENDER_SOLID_RECTANGLE_COLOR_FORMAT					0x00000300
-#define  NV01_RENDER_SOLID_RECTANGLE_COLOR						0x00000304
-#define  NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_POINT(x)					(0x00000400+((x)*8))
-#define  NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_POINT__SIZE				0x00000010
-#define   NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_POINT_X_SHIFT				0
-#define   NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_POINT_X_MASK				0x0000ffff
-#define   NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_POINT_Y_SHIFT				16
-#define   NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_POINT_Y_MASK				0xffff0000
-#define  NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_SIZE(x)					(0x00000404+((x)*8))
-#define  NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_SIZE__SIZE				0x00000010
-#define   NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_SIZE_W_SHIFT				0
-#define   NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_SIZE_W_MASK				0x0000ffff
-#define   NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_SIZE_H_SHIFT				16
-#define   NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_SIZE_H_MASK				0xffff0000
-
-
-#define NV01_IMAGE_BLIT									0x0000001f
-
-#define  NV01_IMAGE_BLIT_NOP								0x00000100
-#define  NV01_IMAGE_BLIT_NOTIFY								0x00000104
-#define  NV01_IMAGE_BLIT_PATCH								0x0000010c
-#define  NV01_IMAGE_BLIT_DMA_NOTIFY							0x00000180
-#define  NV01_IMAGE_BLIT_COLOR_KEY							0x00000184
-#define  NV01_IMAGE_BLIT_CLIP_RECTANGLE							0x00000188
-#define  NV01_IMAGE_BLIT_PATTERN							0x0000018c
-#define  NV01_IMAGE_BLIT_ROP								0x00000190
-#define  NV01_IMAGE_BLIT_BETA1								0x00000194
-#define  NV01_IMAGE_BLIT_SURFACE							0x0000019c
-#define  NV01_IMAGE_BLIT_OPERATION							0x000002fc
-#define  NV01_IMAGE_BLIT_IMAGE_INPUT							0x00000204
-#define  NV01_IMAGE_BLIT_POINT_IN							0x00000300
-#define   NV01_IMAGE_BLIT_POINT_IN_X_SHIFT						0
-#define   NV01_IMAGE_BLIT_POINT_IN_X_MASK						0x0000ffff
-#define   NV01_IMAGE_BLIT_POINT_IN_Y_SHIFT						16
-#define   NV01_IMAGE_BLIT_POINT_IN_Y_MASK						0xffff0000
-#define  NV01_IMAGE_BLIT_POINT_OUT							0x00000304
-#define   NV01_IMAGE_BLIT_POINT_OUT_X_SHIFT						0
-#define   NV01_IMAGE_BLIT_POINT_OUT_X_MASK						0x0000ffff
-#define   NV01_IMAGE_BLIT_POINT_OUT_Y_SHIFT						16
-#define   NV01_IMAGE_BLIT_POINT_OUT_Y_MASK						0xffff0000
-#define  NV01_IMAGE_BLIT_SIZE								0x00000308
-#define   NV01_IMAGE_BLIT_SIZE_W_SHIFT							0
-#define   NV01_IMAGE_BLIT_SIZE_W_MASK							0x0000ffff
-#define   NV01_IMAGE_BLIT_SIZE_H_SHIFT							16
-#define   NV01_IMAGE_BLIT_SIZE_H_MASK							0xffff0000
-
-
-#define NV01_IMAGE_FROM_CPU								0x00000021
-
-#define  NV01_IMAGE_FROM_CPU_NOP							0x00000100
-#define  NV01_IMAGE_FROM_CPU_NOTIFY							0x00000104
-#define  NV01_IMAGE_FROM_CPU_PATCH							0x0000010c
-#define  NV01_IMAGE_FROM_CPU_DMA_NOTIFY							0x00000180
-#define  NV01_IMAGE_FROM_CPU_COLOR_KEY							0x00000184
-#define  NV01_IMAGE_FROM_CPU_CLIP_RECTANGLE						0x00000188
-#define  NV01_IMAGE_FROM_CPU_PATTERN							0x0000018c
-#define  NV01_IMAGE_FROM_CPU_ROP							0x00000190
-#define  NV01_IMAGE_FROM_CPU_BETA1							0x00000194
-#define  NV01_IMAGE_FROM_CPU_SURFACE							0x00000198
-#define  NV01_IMAGE_FROM_CPU_OPERATION							0x000002fc
-#define   NV01_IMAGE_FROM_CPU_OPERATION_SRCCOPY_AND					0x00000000
-#define   NV01_IMAGE_FROM_CPU_OPERATION_ROP_AND						0x00000001
-#define   NV01_IMAGE_FROM_CPU_OPERATION_BLEND_AND					0x00000002
-#define   NV01_IMAGE_FROM_CPU_OPERATION_SRCCOPY						0x00000003
-#define   NV01_IMAGE_FROM_CPU_OPERATION_SRCCOPY_PREMULT					0x00000004
-#define   NV01_IMAGE_FROM_CPU_OPERATION_BLEND_PREMULT					0x00000005
-#define  NV01_IMAGE_FROM_CPU_COLOR_FORMAT						0x00000300
-#define   NV01_IMAGE_FROM_CPU_COLOR_FORMAT_Y8						0x00000001
-#define   NV01_IMAGE_FROM_CPU_COLOR_FORMAT_A1R5G5B5					0x00000002
-#define   NV01_IMAGE_FROM_CPU_COLOR_FORMAT_X1R5G5B5					0x00000003
-#define   NV01_IMAGE_FROM_CPU_COLOR_FORMAT_A8R8G8B8					0x00000004
-#define   NV01_IMAGE_FROM_CPU_COLOR_FORMAT_X8R8G8B8					0x00000005
-#define  NV01_IMAGE_FROM_CPU_POINT							0x00000304
-#define   NV01_IMAGE_FROM_CPU_POINT_X_SHIFT						0
-#define   NV01_IMAGE_FROM_CPU_POINT_X_MASK						0x0000ffff
-#define   NV01_IMAGE_FROM_CPU_POINT_Y_SHIFT						16
-#define   NV01_IMAGE_FROM_CPU_POINT_Y_MASK						0xffff0000
-#define  NV01_IMAGE_FROM_CPU_SIZE_OUT							0x00000308
-#define   NV01_IMAGE_FROM_CPU_SIZE_OUT_W_SHIFT						0
-#define   NV01_IMAGE_FROM_CPU_SIZE_OUT_W_MASK						0x0000ffff
-#define   NV01_IMAGE_FROM_CPU_SIZE_OUT_H_SHIFT						16
-#define   NV01_IMAGE_FROM_CPU_SIZE_OUT_H_MASK						0xffff0000
-#define  NV01_IMAGE_FROM_CPU_SIZE_IN							0x0000030c
-#define   NV01_IMAGE_FROM_CPU_SIZE_IN_W_SHIFT						0
-#define   NV01_IMAGE_FROM_CPU_SIZE_IN_W_MASK						0x0000ffff
-#define   NV01_IMAGE_FROM_CPU_SIZE_IN_H_SHIFT						16
-#define   NV01_IMAGE_FROM_CPU_SIZE_IN_H_MASK						0xffff0000
-#define  NV01_IMAGE_FROM_CPU_COLOR(x)							(0x00000400+((x)*4))
-#define  NV01_IMAGE_FROM_CPU_COLOR__SIZE						0x00000020
-
-
-#define NV01_NULL									0x00000030
-
-
-
-#define NV03_STRETCHED_IMAGE_FROM_CPU							0x00000036
-
-#define  NV03_STRETCHED_IMAGE_FROM_CPU_NOP						0x00000100
-#define  NV03_STRETCHED_IMAGE_FROM_CPU_NOTIFY						0x00000104
-#define  NV03_STRETCHED_IMAGE_FROM_CPU_PATCH						0x0000010c
-#define  NV03_STRETCHED_IMAGE_FROM_CPU_DMA_NOTIFY					0x00000180
-#define  NV03_STRETCHED_IMAGE_FROM_CPU_COLOR_KEY					0x00000184
-#define  NV03_STRETCHED_IMAGE_FROM_CPU_PATTERN						0x00000188
-#define  NV03_STRETCHED_IMAGE_FROM_CPU_ROP						0x0000018c
-#define  NV03_STRETCHED_IMAGE_FROM_CPU_BETA1						0x00000190
-#define  NV03_STRETCHED_IMAGE_FROM_CPU_SURFACE						0x00000194
-#define  NV03_STRETCHED_IMAGE_FROM_CPU_OPERATION					0x000002fc
-#define  NV03_STRETCHED_IMAGE_FROM_CPU_COLOR_FORMAT					0x00000300
-#define  NV03_STRETCHED_IMAGE_FROM_CPU_SIZE_IN						0x00000304
-#define   NV03_STRETCHED_IMAGE_FROM_CPU_SIZE_IN_W_SHIFT					0
-#define   NV03_STRETCHED_IMAGE_FROM_CPU_SIZE_IN_W_MASK					0x0000ffff
-#define   NV03_STRETCHED_IMAGE_FROM_CPU_SIZE_IN_H_SHIFT					16
-#define   NV03_STRETCHED_IMAGE_FROM_CPU_SIZE_IN_H_MASK					0xffff0000
-#define  NV03_STRETCHED_IMAGE_FROM_CPU_DX_DU						0x00000308
-#define  NV03_STRETCHED_IMAGE_FROM_CPU_DY_DV						0x0000030c
-#define  NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_POINT					0x00000310
-#define   NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_POINT_X_SHIFT				0
-#define   NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_POINT_X_MASK				0x0000ffff
-#define   NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_POINT_Y_SHIFT				16
-#define   NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_POINT_Y_MASK				0xffff0000
-#define  NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_SIZE					0x00000314
-#define   NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_SIZE_W_SHIFT				0
-#define   NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_SIZE_W_MASK				0x0000ffff
-#define   NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_SIZE_H_SHIFT				16
-#define   NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_SIZE_H_MASK				0xffff0000
-#define  NV03_STRETCHED_IMAGE_FROM_CPU_POINT12D4					0x00000318
-#define   NV03_STRETCHED_IMAGE_FROM_CPU_POINT12D4_X_SHIFT				0
-#define   NV03_STRETCHED_IMAGE_FROM_CPU_POINT12D4_X_MASK				0x0000ffff
-#define   NV03_STRETCHED_IMAGE_FROM_CPU_POINT12D4_Y_SHIFT				16
-#define   NV03_STRETCHED_IMAGE_FROM_CPU_POINT12D4_Y_MASK				0xffff0000
-#define  NV03_STRETCHED_IMAGE_FROM_CPU_COLOR(x)						(0x00000400+((x)*4))
-#define  NV03_STRETCHED_IMAGE_FROM_CPU_COLOR__SIZE					0x00000020
-
-
-#define NV03_SCALED_IMAGE_FROM_MEMORY							0x00000037
-
-#define  NV03_SCALED_IMAGE_FROM_MEMORY_NOP						0x00000100
-#define  NV03_SCALED_IMAGE_FROM_MEMORY_NOTIFY						0x00000104
-#define  NV03_SCALED_IMAGE_FROM_MEMORY_DMA_NOTIFY					0x00000180
-#define  NV03_SCALED_IMAGE_FROM_MEMORY_DMA_IMAGE					0x00000184
-#define  NV03_SCALED_IMAGE_FROM_MEMORY_PATTERN						0x00000188
-#define  NV03_SCALED_IMAGE_FROM_MEMORY_ROP						0x0000018c
-#define  NV03_SCALED_IMAGE_FROM_MEMORY_BETA1						0x00000190
-#define  NV03_SCALED_IMAGE_FROM_MEMORY_SURFACE						0x00000194
-#define  NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT					0x00000300
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A1R5G5B5				0x00000001
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_X1R5G5B5				0x00000002
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A8R8G8B8				0x00000003
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_X8R8G8B8				0x00000004
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_V8YB8U8YA8				0x00000005
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_YB8V8YA8U8				0x00000006
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_R5G6B5				0x00000007
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_Y8					0x00000008
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_AY8				0x00000009
-#define  NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION					0x00000304
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY_AND				0x00000000
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_ROP_AND				0x00000001
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_BLEND_AND				0x00000002
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY				0x00000003
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY_PREMULT			0x00000004
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_BLEND_PREMULT				0x00000005
-#define  NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT					0x00000308
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_X_SHIFT				0
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_X_MASK				0x0000ffff
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_Y_SHIFT				16
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_Y_MASK				0xffff0000
-#define  NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE					0x0000030c
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_W_SHIFT				0
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_W_MASK				0x0000ffff
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_H_SHIFT				16
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_H_MASK				0xffff0000
-#define  NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_POINT					0x00000310
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_POINT_X_SHIFT				0
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_POINT_X_MASK				0x0000ffff
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_POINT_Y_SHIFT				16
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_POINT_Y_MASK				0xffff0000
-#define  NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_SIZE					0x00000314
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_SIZE_W_SHIFT				0
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_SIZE_W_MASK				0x0000ffff
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_SIZE_H_SHIFT				16
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_SIZE_H_MASK				0xffff0000
-#define  NV03_SCALED_IMAGE_FROM_MEMORY_DELTA_DU_DX					0x00000318
-#define  NV03_SCALED_IMAGE_FROM_MEMORY_DELTA_DV_DY					0x0000031c
-#define  NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_SIZE					0x00000400
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_SIZE_W_SHIFT				0
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_SIZE_W_MASK				0x0000ffff
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_SIZE_H_SHIFT				16
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_SIZE_H_MASK				0xffff0000
-#define  NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_FORMAT					0x00000404
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_FORMAT_PITCH_SHIFT			0
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_FORMAT_PITCH_MASK			0x0000ffff
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_FORMAT_ORIGIN_SHIFT			16
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_FORMAT_ORIGIN_MASK			0x00ff0000
-#define    NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_FORMAT_ORIGIN_CENTER			0x00010000
-#define    NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_FORMAT_ORIGIN_CORNER			0x00020000
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_FORMAT_INTERPOLATOR_SHIFT		24
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_FORMAT_INTERPOLATOR_MASK		0xff000000
-#define  NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_OFFSET					0x00000408
-#define  NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_POINT					0x0000040c
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_POINT_U_SHIFT				0
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_POINT_U_MASK				0x0000ffff
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_POINT_V_SHIFT				16
-#define   NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_POINT_V_MASK				0xffff0000
-
-
-#define NV04_DVD_SUBPICTURE								0x00000038
-
-#define  NV04_DVD_SUBPICTURE_NOP							0x00000100
-#define  NV04_DVD_SUBPICTURE_NOTIFY							0x00000104
-#define  NV04_DVD_SUBPICTURE_WAIT_FOR_IDLE						0x00000108
-#define  NV04_DVD_SUBPICTURE_DMA_NOTIFY							0x00000180
-#define  NV04_DVD_SUBPICTURE_DMA_OVERLAY						0x00000184
-#define  NV04_DVD_SUBPICTURE_DMA_IMAGEIN						0x00000188
-#define  NV04_DVD_SUBPICTURE_DMA_IMAGEOUT						0x0000018c
-#define  NV04_DVD_SUBPICTURE_IMAGEOUT_POINT						0x00000300
-#define   NV04_DVD_SUBPICTURE_IMAGEOUT_POINT_X_SHIFT					0
-#define   NV04_DVD_SUBPICTURE_IMAGEOUT_POINT_X_MASK					0x0000ffff
-#define   NV04_DVD_SUBPICTURE_IMAGEOUT_POINT_Y_SHIFT					16
-#define   NV04_DVD_SUBPICTURE_IMAGEOUT_POINT_Y_MASK					0xffff0000
-#define  NV04_DVD_SUBPICTURE_IMAGEOUT_SIZE						0x00000304
-#define   NV04_DVD_SUBPICTURE_IMAGEOUT_SIZE_W_SHIFT					0
-#define   NV04_DVD_SUBPICTURE_IMAGEOUT_SIZE_W_MASK					0x0000ffff
-#define   NV04_DVD_SUBPICTURE_IMAGEOUT_SIZE_H_SHIFT					16
-#define   NV04_DVD_SUBPICTURE_IMAGEOUT_SIZE_H_MASK					0xffff0000
-#define  NV04_DVD_SUBPICTURE_IMAGEOUT_FORMAT						0x00000308
-#define   NV04_DVD_SUBPICTURE_IMAGEOUT_FORMAT_PITCH_SHIFT				0
-#define   NV04_DVD_SUBPICTURE_IMAGEOUT_FORMAT_PITCH_MASK				0x0000ffff
-#define   NV04_DVD_SUBPICTURE_IMAGEOUT_FORMAT_COLOR_SHIFT				16
-#define   NV04_DVD_SUBPICTURE_IMAGEOUT_FORMAT_COLOR_MASK				0xffff0000
-#define  NV04_DVD_SUBPICTURE_IMAGEOUT_OFFSET						0x0000030c
-#define  NV04_DVD_SUBPICTURE_IMAGEIN_DELTA_DU_DX					0x00000310
-#define  NV04_DVD_SUBPICTURE_IMAGEIN_DELTA_DV_DY					0x00000314
-#define  NV04_DVD_SUBPICTURE_IMAGEIN_SIZE						0x00000318
-#define   NV04_DVD_SUBPICTURE_IMAGEIN_SIZE_W_SHIFT					0
-#define   NV04_DVD_SUBPICTURE_IMAGEIN_SIZE_W_MASK					0x0000ffff
-#define   NV04_DVD_SUBPICTURE_IMAGEIN_SIZE_H_SHIFT					16
-#define   NV04_DVD_SUBPICTURE_IMAGEIN_SIZE_H_MASK					0xffff0000
-#define  NV04_DVD_SUBPICTURE_IMAGEIN_FORMAT						0x0000031c
-#define   NV04_DVD_SUBPICTURE_IMAGEIN_FORMAT_PITCH_SHIFT				0
-#define   NV04_DVD_SUBPICTURE_IMAGEIN_FORMAT_PITCH_MASK					0x0000ffff
-#define   NV04_DVD_SUBPICTURE_IMAGEIN_FORMAT_COLOR_SHIFT				16
-#define   NV04_DVD_SUBPICTURE_IMAGEIN_FORMAT_COLOR_MASK					0xffff0000
-#define  NV04_DVD_SUBPICTURE_IMAGEIN_OFFSET						0x00000320
-#define  NV04_DVD_SUBPICTURE_IMAGEIN_POINT						0x00000324
-#define   NV04_DVD_SUBPICTURE_IMAGEIN_POINT_U_SHIFT					0
-#define   NV04_DVD_SUBPICTURE_IMAGEIN_POINT_U_MASK					0x0000ffff
-#define   NV04_DVD_SUBPICTURE_IMAGEIN_POINT_V_SHIFT					16
-#define   NV04_DVD_SUBPICTURE_IMAGEIN_POINT_V_MASK					0xffff0000
-#define  NV04_DVD_SUBPICTURE_OVERLAY_DELTA_DU_DX					0x00000328
-#define  NV04_DVD_SUBPICTURE_OVERLAY_DELTA_DV_DY					0x0000032c
-#define  NV04_DVD_SUBPICTURE_OVERLAY_SIZE						0x00000330
-#define   NV04_DVD_SUBPICTURE_OVERLAY_SIZE_W_SHIFT					0
-#define   NV04_DVD_SUBPICTURE_OVERLAY_SIZE_W_MASK					0x0000ffff
-#define   NV04_DVD_SUBPICTURE_OVERLAY_SIZE_H_SHIFT					16
-#define   NV04_DVD_SUBPICTURE_OVERLAY_SIZE_H_MASK					0xffff0000
-#define  NV04_DVD_SUBPICTURE_OVERLAY_FORMAT						0x00000334
-#define   NV04_DVD_SUBPICTURE_OVERLAY_FORMAT_PITCH_SHIFT				0
-#define   NV04_DVD_SUBPICTURE_OVERLAY_FORMAT_PITCH_MASK					0x0000ffff
-#define   NV04_DVD_SUBPICTURE_OVERLAY_FORMAT_COLOR_SHIFT				16
-#define   NV04_DVD_SUBPICTURE_OVERLAY_FORMAT_COLOR_MASK					0xffff0000
-#define  NV04_DVD_SUBPICTURE_OVERLAY_OFFSET						0x00000338
-#define  NV04_DVD_SUBPICTURE_OVERLAY_POINT						0x0000033c
-#define   NV04_DVD_SUBPICTURE_OVERLAY_POINT_U_SHIFT					0
-#define   NV04_DVD_SUBPICTURE_OVERLAY_POINT_U_MASK					0x0000ffff
-#define   NV04_DVD_SUBPICTURE_OVERLAY_POINT_V_SHIFT					16
-#define   NV04_DVD_SUBPICTURE_OVERLAY_POINT_V_MASK					0xffff0000
-
-
-#define NV04_MEMORY_TO_MEMORY_FORMAT							0x00000039
-
-#define  NV04_MEMORY_TO_MEMORY_FORMAT_NOP						0x00000100
-#define  NV04_MEMORY_TO_MEMORY_FORMAT_NOTIFY						0x00000104
-#define  NV04_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY					0x00000180
-#define  NV04_MEMORY_TO_MEMORY_FORMAT_DMA_BUFFER_IN					0x00000184
-#define  NV04_MEMORY_TO_MEMORY_FORMAT_DMA_BUFFER_OUT					0x00000188
-#define  NV04_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN						0x0000030c
-#define  NV04_MEMORY_TO_MEMORY_FORMAT_OFFSET_OUT					0x00000310
-#define  NV04_MEMORY_TO_MEMORY_FORMAT_PITCH_IN						0x00000314
-#define  NV04_MEMORY_TO_MEMORY_FORMAT_PITCH_OUT						0x00000318
-#define  NV04_MEMORY_TO_MEMORY_FORMAT_LINE_LENGTH_IN					0x0000031c
-#define  NV04_MEMORY_TO_MEMORY_FORMAT_LINE_COUNT					0x00000320
-#define  NV04_MEMORY_TO_MEMORY_FORMAT_FORMAT						0x00000324
-#define   NV04_MEMORY_TO_MEMORY_FORMAT_FORMAT_INPUT_INC_SHIFT				0
-#define   NV04_MEMORY_TO_MEMORY_FORMAT_FORMAT_INPUT_INC_MASK				0x0000000f
-#define   NV04_MEMORY_TO_MEMORY_FORMAT_FORMAT_OUTPUT_INC_SHIFT				8
-#define   NV04_MEMORY_TO_MEMORY_FORMAT_FORMAT_OUTPUT_INC_MASK				0x00000f00
-#define  NV04_MEMORY_TO_MEMORY_FORMAT_BUF_NOTIFY					0x00000328
-
-
-#define NV01_MEMORY_LOCAL_BANKED							0x0000003d
-
-
-
-#define NV01_MAPPING_SYSTEM								0x0000003e
-
-
-
-#define NV03_MEMORY_LOCAL_CURSOR							0x0000003f
-
-
-
-#define NV01_MEMORY_LOCAL_LINEAR							0x00000040
-
-
-
-#define NV01_MAPPING_LOCAL								0x00000041
-
-
-
-#define NV04_CONTEXT_SURFACES_2D							0x00000042
-
-#define  NV04_CONTEXT_SURFACES_2D_NOP							0x00000100
-#define  NV04_CONTEXT_SURFACES_2D_NOTIFY						0x00000104
-#define  NV04_CONTEXT_SURFACES_2D_PM_TRIGGER						0x00000140
-#define  NV04_CONTEXT_SURFACES_2D_DMA_NOTIFY						0x00000180
-#define  NV04_CONTEXT_SURFACES_2D_DMA_IMAGE_SOURCE					0x00000184
-#define  NV04_CONTEXT_SURFACES_2D_DMA_IMAGE_DESTIN					0x00000188
-#define  NV04_CONTEXT_SURFACES_2D_FORMAT						0x00000300
-#define   NV04_CONTEXT_SURFACES_2D_FORMAT_Y8						0x00000001
-#define   NV04_CONTEXT_SURFACES_2D_FORMAT_X1R5G5B5_Z1R5G5B5				0x00000002
-#define   NV04_CONTEXT_SURFACES_2D_FORMAT_X1R5G5B5_X1R5G5B5				0x00000003
-#define   NV04_CONTEXT_SURFACES_2D_FORMAT_R5G6B5					0x00000004
-#define   NV04_CONTEXT_SURFACES_2D_FORMAT_Y16						0x00000005
-#define   NV04_CONTEXT_SURFACES_2D_FORMAT_X8R8G8B8_Z8R8G8B8				0x00000006
-#define   NV04_CONTEXT_SURFACES_2D_FORMAT_X8R8G8B8_X8R8G8B8				0x00000007
-#define   NV04_CONTEXT_SURFACES_2D_FORMAT_X1A7R8G8B8_Z1A7R8G8B8				0x00000008
-#define   NV04_CONTEXT_SURFACES_2D_FORMAT_X1A7R8G8B8_X1A7R8G8B8				0x00000009
-#define   NV04_CONTEXT_SURFACES_2D_FORMAT_A8R8G8B8					0x0000000a
-#define   NV04_CONTEXT_SURFACES_2D_FORMAT_Y32						0x0000000b
-#define  NV04_CONTEXT_SURFACES_2D_PITCH							0x00000304
-#define   NV04_CONTEXT_SURFACES_2D_PITCH_SOURCE_SHIFT					0
-#define   NV04_CONTEXT_SURFACES_2D_PITCH_SOURCE_MASK					0x0000ffff
-#define   NV04_CONTEXT_SURFACES_2D_PITCH_DESTIN_SHIFT					16
-#define   NV04_CONTEXT_SURFACES_2D_PITCH_DESTIN_MASK					0xffff0000
-#define  NV04_CONTEXT_SURFACES_2D_OFFSET_SOURCE						0x00000308
-#define  NV04_CONTEXT_SURFACES_2D_OFFSET_DESTIN						0x0000030c
-
-
-#define NV03_CONTEXT_ROP								0x00000043
-
-#define  NV03_CONTEXT_ROP_NOP								0x00000100
-#define  NV03_CONTEXT_ROP_NOTIFY							0x00000104
-#define  NV03_CONTEXT_ROP_DMA_NOTIFY							0x00000180
-#define  NV03_CONTEXT_ROP_ROP								0x00000300
-#define   NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_SHIFT					0
-#define   NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_MASK					0x0000000f
-#define    NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_CLEAR					0x00000000
-#define    NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_NOR					0x00000001
-#define    NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_AND_INVERTED				0x00000002
-#define    NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_COPY_INVERTED				0x00000003
-#define    NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_AND_REVERSE				0x00000004
-#define    NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_INVERT					0x00000005
-#define    NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_XOR					0x00000006
-#define    NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_NAND					0x00000007
-#define    NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_AND					0x00000008
-#define    NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_EQUI					0x00000009
-#define    NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_NOOP					0x0000000a
-#define    NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_OR_INVERTED				0x0000000b
-#define    NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_COPY					0x0000000c
-#define    NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_OR_REVERSE					0x0000000d
-#define    NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_OR						0x0000000e
-#define    NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_SET					0x0000000f
-#define   NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_SHIFT					4
-#define   NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_MASK					0x000000f0
-#define    NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_CLEAR					0x00000000
-#define    NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_NOR					0x00000010
-#define    NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_AND_INVERTED				0x00000020
-#define    NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_COPY_INVERTED				0x00000030
-#define    NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_AND_REVERSE				0x00000040
-#define    NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_INVERT					0x00000050
-#define    NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_XOR					0x00000060
-#define    NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_NAND					0x00000070
-#define    NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_AND					0x00000080
-#define    NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_EQUI					0x00000090
-#define    NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_NOOP					0x000000a0
-#define    NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_OR_INVERTED				0x000000b0
-#define    NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_COPY					0x000000c0
-#define    NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_OR_REVERSE					0x000000d0
-#define    NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_OR						0x000000e0
-#define    NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_SET					0x000000f0
-
-
-#define NV04_IMAGE_PATTERN								0x00000044
-
-#define  NV04_IMAGE_PATTERN_NOP								0x00000100
-#define  NV04_IMAGE_PATTERN_NOTIFY							0x00000104
-#define  NV04_IMAGE_PATTERN_DMA_NOTIFY							0x00000180
-#define  NV04_IMAGE_PATTERN_COLOR_FORMAT						0x00000300
-#define   NV04_IMAGE_PATTERN_COLOR_FORMAT_A16R5G6B5					0x00000001
-#define   NV04_IMAGE_PATTERN_COLOR_FORMAT_X16A1R5G5B5					0x00000002
-#define   NV04_IMAGE_PATTERN_COLOR_FORMAT_A8R8G8B8					0x00000003
-#define  NV04_IMAGE_PATTERN_MONOCHROME_FORMAT						0x00000304
-#define   NV04_IMAGE_PATTERN_MONOCHROME_FORMAT_CGA6					0x00000001
-#define   NV04_IMAGE_PATTERN_MONOCHROME_FORMAT_LE					0x00000002
-#define  NV04_IMAGE_PATTERN_MONOCHROME_SHAPE						0x00000308
-#define   NV04_IMAGE_PATTERN_MONOCHROME_SHAPE_8X8					0x00000000
-#define   NV04_IMAGE_PATTERN_MONOCHROME_SHAPE_64X1					0x00000001
-#define   NV04_IMAGE_PATTERN_MONOCHROME_SHAPE_1X64					0x00000002
-#define  NV04_IMAGE_PATTERN_PATTERN_SELECT						0x0000030c
-#define   NV04_IMAGE_PATTERN_PATTERN_SELECT_MONO					0x00000001
-#define   NV04_IMAGE_PATTERN_PATTERN_SELECT_COLOR					0x00000002
-#define  NV04_IMAGE_PATTERN_MONOCHROME_COLOR0						0x00000310
-#define  NV04_IMAGE_PATTERN_MONOCHROME_COLOR1						0x00000314
-#define  NV04_IMAGE_PATTERN_MONOCHROME_PATTERN0						0x00000318
-#define  NV04_IMAGE_PATTERN_MONOCHROME_PATTERN1						0x0000031c
-#define  NV04_IMAGE_PATTERN_PATTERN_Y8(x)						(0x00000400+((x)*4))
-#define  NV04_IMAGE_PATTERN_PATTERN_Y8__SIZE						0x00000010
-#define   NV04_IMAGE_PATTERN_PATTERN_Y8_Y0_SHIFT					0
-#define   NV04_IMAGE_PATTERN_PATTERN_Y8_Y0_MASK						0x000000ff
-#define   NV04_IMAGE_PATTERN_PATTERN_Y8_Y1_SHIFT					8
-#define   NV04_IMAGE_PATTERN_PATTERN_Y8_Y1_MASK						0x0000ff00
-#define   NV04_IMAGE_PATTERN_PATTERN_Y8_Y2_SHIFT					16
-#define   NV04_IMAGE_PATTERN_PATTERN_Y8_Y2_MASK						0x00ff0000
-#define   NV04_IMAGE_PATTERN_PATTERN_Y8_Y3_SHIFT					24
-#define   NV04_IMAGE_PATTERN_PATTERN_Y8_Y3_MASK						0xff000000
-#define  NV04_IMAGE_PATTERN_PATTERN_R5G6B5(x)						(0x00000500+((x)*4))
-#define  NV04_IMAGE_PATTERN_PATTERN_R5G6B5__SIZE					0x00000020
-#define   NV04_IMAGE_PATTERN_PATTERN_R5G6B5_B0_SHIFT					0
-#define   NV04_IMAGE_PATTERN_PATTERN_R5G6B5_B0_MASK					0x0000001f
-#define   NV04_IMAGE_PATTERN_PATTERN_R5G6B5_G0_SHIFT					5
-#define   NV04_IMAGE_PATTERN_PATTERN_R5G6B5_G0_MASK					0x000007e0
-#define   NV04_IMAGE_PATTERN_PATTERN_R5G6B5_R0_SHIFT					11
-#define   NV04_IMAGE_PATTERN_PATTERN_R5G6B5_R0_MASK					0x0000f800
-#define   NV04_IMAGE_PATTERN_PATTERN_R5G6B5_B1_SHIFT					16
-#define   NV04_IMAGE_PATTERN_PATTERN_R5G6B5_B1_MASK					0x001f0000
-#define   NV04_IMAGE_PATTERN_PATTERN_R5G6B5_G1_SHIFT					21
-#define   NV04_IMAGE_PATTERN_PATTERN_R5G6B5_G1_MASK					0x07e00000
-#define   NV04_IMAGE_PATTERN_PATTERN_R5G6B5_R1_SHIFT					27
-#define   NV04_IMAGE_PATTERN_PATTERN_R5G6B5_R1_MASK					0xf8000000
-#define  NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5(x)						(0x00000600+((x)*4))
-#define  NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5__SIZE					0x00000020
-#define   NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_B0_SHIFT					0
-#define   NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_B0_MASK					0x0000001f
-#define   NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_G0_SHIFT					5
-#define   NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_G0_MASK					0x000003e0
-#define   NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_R0_SHIFT					10
-#define   NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_R0_MASK					0x00007c00
-#define   NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_B1_SHIFT					16
-#define   NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_B1_MASK					0x001f0000
-#define   NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_G1_SHIFT					21
-#define   NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_G1_MASK					0x03e00000
-#define   NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_R1_SHIFT					26
-#define   NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_R1_MASK					0x7c000000
-#define  NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8(x)						(0x00000700+((x)*4))
-#define  NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8__SIZE					0x00000040
-#define   NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8_B_SHIFT					0
-#define   NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8_B_MASK					0x000000ff
-#define   NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8_G_SHIFT					8
-#define   NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8_G_MASK					0x0000ff00
-#define   NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8_R_SHIFT					16
-#define   NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8_R_MASK					0x00ff0000
-
-
-#define NV03_VIDEO_LUT_CURSOR_DAC							0x00000046
-
-#define  NV03_VIDEO_LUT_CURSOR_DAC_SYNCHRONIZE						0x00000100
-#define  NV03_VIDEO_LUT_CURSOR_DAC_STOP_IMAGE						0x00000104
-#define  NV03_VIDEO_LUT_CURSOR_DAC_STOP_CURSOR						0x00000108
-#define  NV03_VIDEO_LUT_CURSOR_DAC_STOP_DAC						0x0000010c
-#define  NV03_VIDEO_LUT_CURSOR_DAC_DMA_NOTIFY						0x00000180
-#define  NV03_VIDEO_LUT_CURSOR_DAC_DMA_IMAGE(x)						(0x00000184+((x)*4))
-#define  NV03_VIDEO_LUT_CURSOR_DAC_DMA_IMAGE__SIZE					0x00000002
-#define  NV03_VIDEO_LUT_CURSOR_DAC_DMA_LUT(x)						(0x0000018c+((x)*4))
-#define  NV03_VIDEO_LUT_CURSOR_DAC_DMA_LUT__SIZE					0x00000002
-#define  NV03_VIDEO_LUT_CURSOR_DAC_DMA_CURSOR(x)					(0x00000194+((x)*4))
-#define  NV03_VIDEO_LUT_CURSOR_DAC_DMA_CURSOR__SIZE					0x00000002
-#define  NV03_VIDEO_LUT_CURSOR_DAC_GET							0x000002fc
-#define  NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_OFFSET(x)					(0x00000300+((x)*8))
-#define  NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_OFFSET__SIZE				0x00000002
-#define  NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT(x)					(0x00000304+((x)*8))
-#define  NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT__SIZE				0x00000002
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT_PITCH_SHIFT			0
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT_PITCH_MASK				0x0000ffff
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT_COLOR_SHIFT			16
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT_COLOR_MASK				0x0fff0000
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT_NOTIFY_SHIFT			28
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT_NOTIFY_MASK			0xf0000000
-#define  NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_OFFSET(x)					(0x00000340+((x)*12))
-#define  NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_OFFSET__SIZE				0x00000002
-#define  NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT(x)				(0x00000344+((x)*12))
-#define  NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT__SIZE				0x00000002
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_X_SHIFT			0
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_X_MASK				0x0000ffff
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_Y_SHIFT			16
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_Y_MASK				0xffff0000
-#define  NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_FORMAT(x)					(0x00000348+((x)*12))
-#define  NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_FORMAT__SIZE				0x00000002
-#define  NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_A				0x00000358
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_A_X_SHIFT			0
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_A_X_MASK			0x0000ffff
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_A_Y_SHIFT			16
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_A_Y_MASK			0xffff0000
-#define  NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_IMAGE_SIZE(x)				(0x00000380+((x)*16))
-#define  NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_IMAGE_SIZE__SIZE				0x00000002
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_IMAGE_SIZE_W_SHIFT				0
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_IMAGE_SIZE_W_MASK				0x0000ffff
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_IMAGE_SIZE_H_SHIFT				16
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_IMAGE_SIZE_H_MASK				0xffff0000
-#define  NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC(x)					(0x00000384+((x)*16))
-#define  NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC__SIZE					0x00000002
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC_START_SHIFT				0
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC_START_MASK				0x0000ffff
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC_WIDTH_SHIFT				16
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC_WIDTH_MASK				0x0fff0000
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC_POLARITY_SHIFT			28
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC_POLARITY_MASK				0xf0000000
-#define  NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC(x)					(0x00000388+((x)*16))
-#define  NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC__SIZE					0x00000002
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC_START_SHIFT				0
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC_START_MASK				0x0000ffff
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC_WIDTH_SHIFT				16
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC_WIDTH_MASK				0x0fff0000
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC_POLARITY_SHIFT			28
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC_POLARITY_MASK				0xf0000000
-#define  NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE(x)				(0x0000038c+((x)*16))
-#define  NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE__SIZE				0x00000002
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE_WIDTH_SHIFT			0
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE_WIDTH_MASK			0x0000ffff
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE_HEIGHT_SHIFT			16
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE_HEIGHT_MASK			0x0fff0000
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE_NOTIFY_SHIFT			28
-#define   NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE_NOTIFY_MASK			0xf0000000
-#define  NV03_VIDEO_LUT_CURSOR_DAC_SET_PIXEL_CLOCK					0x000003a0
-
-
-#define NV03_DX3_TEXTURED_TRIANGLE							0x00000048
-
-#define  NV03_DX3_TEXTURED_TRIANGLE_NOP							0x00000100
-#define  NV03_DX3_TEXTURED_TRIANGLE_NOTIFY						0x00000104
-#define  NV03_DX3_TEXTURED_TRIANGLE_PATCH						0x0000010c
-#define  NV03_DX3_TEXTURED_TRIANGLE_DMA_NOTIFY						0x00000180
-#define  NV03_DX3_TEXTURED_TRIANGLE_DMA_TEXTURE						0x00000184
-#define  NV03_DX3_TEXTURED_TRIANGLE_CLIP_RECTANGLE					0x00000188
-#define  NV03_DX3_TEXTURED_TRIANGLE_SURFACE						0x0000018c
-#define  NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_OFFSET					0x00000304
-#define  NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT					0x00000308
-#define   NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_COLOR_KEY_MASK_SHIFT		0
-#define   NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_COLOR_KEY_MASK_MASK			0x0000ffff
-#define   NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_COLOR_KEY_ENABLE_SHIFT		16
-#define   NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_COLOR_KEY_ENABLE_MASK		0x000f0000
-#define   NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_COLOR_SHIFT				20
-#define   NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_COLOR_MASK				0x00f00000
-#define   NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_SIZE_MIN_SHIFT			24
-#define   NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_SIZE_MIN_MASK			0x0f000000
-#define   NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_SIZE_MAX_SHIFT			28
-#define   NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_SIZE_MAX_MASK			0xf0000000
-#define  NV03_DX3_TEXTURED_TRIANGLE_FILTER						0x0000030c
-#define   NV03_DX3_TEXTURED_TRIANGLE_FILTER_SPREAD_X_SHIFT				0
-#define   NV03_DX3_TEXTURED_TRIANGLE_FILTER_SPREAD_X_MASK				0x0000001f
-#define   NV03_DX3_TEXTURED_TRIANGLE_FILTER_SPREAD_Y_SHIFT				8
-#define   NV03_DX3_TEXTURED_TRIANGLE_FILTER_SPREAD_Y_MASK				0x00001f00
-#define   NV03_DX3_TEXTURED_TRIANGLE_FILTER_SIZE_ADJUST_SHIFT				16
-#define   NV03_DX3_TEXTURED_TRIANGLE_FILTER_SIZE_ADJUST_MASK				0x00ff0000
-#define  NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR						0x00000310
-#define   NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR_B_SHIFT					0
-#define   NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR_B_MASK					0x000000ff
-#define   NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR_G_SHIFT					8
-#define   NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR_G_MASK					0x0000ff00
-#define   NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR_R_SHIFT					16
-#define   NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR_R_MASK					0x00ff0000
-#define  NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT						0x00000314
-#define   NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_INTERPOLATOR_SHIFT			0
-#define   NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_INTERPOLATOR_MASK			0x0000000f
-#define   NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_WRAP_U_SHIFT				4
-#define   NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_WRAP_U_MASK				0x00000030
-#define   NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_WRAP_V_SHIFT				6
-#define   NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_WRAP_V_MASK				0x000000c0
-#define   NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_SOURCE_COLOR_SHIFT			8
-#define   NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_SOURCE_COLOR_MASK			0x00000f00
-#define   NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_CULLING_SHIFT				12
-#define   NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_CULLING_MASK				0x00007000
-#define   NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_Z_PERSPECTIVE_ENABLE			(1 << 15)
-#define   NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_Z_FUNC_SHIFT				16
-#define   NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_Z_FUNC_MASK				0x000f0000
-#define   NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_Z_WRITE_ENABLE_SHIFT			20
-#define   NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_Z_WRITE_ENABLE_MASK			0x00f00000
-#define   NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_COLOR_WRITE_ENABLE_SHIFT		24
-#define   NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_COLOR_WRITE_ENABLE_MASK		0x07000000
-#define   NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_ROP_SHIFT				27
-#define   NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_ROP_MASK				0x18000000
-#define   NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_BETA					(1 << 29)
-#define   NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_DST_BLEND				(1 << 30)
-#define   NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_SRC_BLEND				(1 << 31)
-#define  NV03_DX3_TEXTURED_TRIANGLE_ALPHA_CONTROL					0x00000318
-#define   NV03_DX3_TEXTURED_TRIANGLE_ALPHA_CONTROL_ALPHA_REF_SHIFT			0
-#define   NV03_DX3_TEXTURED_TRIANGLE_ALPHA_CONTROL_ALPHA_REF_MASK			0x000000ff
-#define   NV03_DX3_TEXTURED_TRIANGLE_ALPHA_CONTROL_ALPHA_FUNC_SHIFT			8
-#define   NV03_DX3_TEXTURED_TRIANGLE_ALPHA_CONTROL_ALPHA_FUNC_MASK			0xffffff00
-#define  NV03_DX3_TEXTURED_TRIANGLE_SPECULAR(x)						(0x00001000+((x)*32))
-#define  NV03_DX3_TEXTURED_TRIANGLE_SPECULAR__SIZE					0x00000040
-#define   NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I0_SHIFT					0
-#define   NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I0_MASK					0x0000000f
-#define   NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I1_SHIFT					4
-#define   NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I1_MASK					0x000000f0
-#define   NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I2_SHIFT					8
-#define   NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I2_MASK					0x00000f00
-#define   NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I3_SHIFT					12
-#define   NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I3_MASK					0x0000f000
-#define   NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I4_SHIFT					16
-#define   NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I4_MASK					0x000f0000
-#define   NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I5_SHIFT					20
-#define   NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I5_MASK					0x00f00000
-#define   NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_FOG_SHIFT					24
-#define   NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_FOG_MASK					0xff000000
-#define  NV03_DX3_TEXTURED_TRIANGLE_COLOR(x)						(0x00001004+((x)*32))
-#define  NV03_DX3_TEXTURED_TRIANGLE_COLOR__SIZE						0x00000040
-#define  NV03_DX3_TEXTURED_TRIANGLE_X(x)						(0x00001008+((x)*32))
-#define  NV03_DX3_TEXTURED_TRIANGLE_X__SIZE						0x00000040
-#define  NV03_DX3_TEXTURED_TRIANGLE_Y(x)						(0x0000100c+((x)*32))
-#define  NV03_DX3_TEXTURED_TRIANGLE_Y__SIZE						0x00000040
-#define  NV03_DX3_TEXTURED_TRIANGLE_Z(x)						(0x00001010+((x)*32))
-#define  NV03_DX3_TEXTURED_TRIANGLE_Z__SIZE						0x00000040
-#define  NV03_DX3_TEXTURED_TRIANGLE_M(x)						(0x00001014+((x)*32))
-#define  NV03_DX3_TEXTURED_TRIANGLE_M__SIZE						0x00000040
-#define  NV03_DX3_TEXTURED_TRIANGLE_U(x)						(0x00001018+((x)*32))
-#define  NV03_DX3_TEXTURED_TRIANGLE_U__SIZE						0x00000040
-#define  NV03_DX3_TEXTURED_TRIANGLE_V(x)						(0x0000101c+((x)*32))
-#define  NV03_DX3_TEXTURED_TRIANGLE_V__SIZE						0x00000040
-
-
-#define NV04_GDI_RECTANGLE_TEXT								0x0000004a
-
-#define  NV04_GDI_RECTANGLE_TEXT_NOP							0x00000100
-#define  NV04_GDI_RECTANGLE_TEXT_NOTIFY							0x00000104
-#define  NV04_GDI_RECTANGLE_TEXT_PATCH							0x0000010c
-#define  NV04_GDI_RECTANGLE_TEXT_PM_TRIGGER						0x00000140
-#define  NV04_GDI_RECTANGLE_TEXT_DMA_NOTIFY						0x00000180
-#define  NV04_GDI_RECTANGLE_TEXT_DMA_FONTS						0x00000184
-#define  NV04_GDI_RECTANGLE_TEXT_PATTERN						0x00000188
-#define  NV04_GDI_RECTANGLE_TEXT_ROP							0x0000018c
-#define  NV04_GDI_RECTANGLE_TEXT_BETA1							0x00000190
-#define  NV04_GDI_RECTANGLE_TEXT_BETA4							0x00000194
-#define  NV04_GDI_RECTANGLE_TEXT_SURFACE						0x00000198
-#define  NV04_GDI_RECTANGLE_TEXT_OPERATION						0x000002fc
-#define   NV04_GDI_RECTANGLE_TEXT_OPERATION_SRCCOPY_AND					0x00000000
-#define   NV04_GDI_RECTANGLE_TEXT_OPERATION_ROP_AND					0x00000001
-#define   NV04_GDI_RECTANGLE_TEXT_OPERATION_BLEND_AND					0x00000002
-#define   NV04_GDI_RECTANGLE_TEXT_OPERATION_SRCCOPY					0x00000003
-#define   NV04_GDI_RECTANGLE_TEXT_OPERATION_SRCCOPY_PREMULT				0x00000004
-#define   NV04_GDI_RECTANGLE_TEXT_OPERATION_BLEND_PREMULT				0x00000005
-#define  NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT						0x00000300
-#define   NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A16R5G6B5				0x00000001
-#define   NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_X16A1R5G5B5				0x00000002
-#define   NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A8R8G8B8					0x00000003
-#define  NV04_GDI_RECTANGLE_TEXT_MONOCHROME_FORMAT					0x00000304
-#define   NV04_GDI_RECTANGLE_TEXT_MONOCHROME_FORMAT_CGA6				0x00000001
-#define   NV04_GDI_RECTANGLE_TEXT_MONOCHROME_FORMAT_LE					0x00000002
-#define  NV04_GDI_RECTANGLE_TEXT_COLOR1_A						0x000003fc
-#define  NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT(x)				(0x00000400+((x)*8))
-#define  NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT__SIZE			0x00000020
-#define   NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_Y_SHIFT			0
-#define   NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_Y_MASK			0x0000ffff
-#define   NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_X_SHIFT			16
-#define   NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_X_MASK			0xffff0000
-#define  NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE(x)				(0x00000404+((x)*8))
-#define  NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE__SIZE				0x00000020
-#define   NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_H_SHIFT			0
-#define   NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_H_MASK			0x0000ffff
-#define   NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_W_SHIFT			16
-#define   NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_W_MASK			0xffff0000
-#define  NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT0						0x000005f4
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT0_L_SHIFT					0
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT0_L_MASK					0x0000ffff
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT0_T_SHIFT					16
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT0_T_MASK					0xffff0000
-#define  NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT1						0x000005f8
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT1_R_SHIFT					0
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT1_R_MASK					0x0000ffff
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT1_B_SHIFT					16
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT1_B_MASK					0xffff0000
-#define  NV04_GDI_RECTANGLE_TEXT_COLOR1_B						0x000005fc
-#define  NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0(x)				(0x00000600+((x)*8))
-#define  NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0__SIZE			0x00000020
-#define   NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_L_SHIFT			0
-#define   NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_L_MASK			0x0000ffff
-#define   NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_T_SHIFT			16
-#define   NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_T_MASK			0xffff0000
-#define  NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1(x)				(0x00000604+((x)*8))
-#define  NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1__SIZE			0x00000020
-#define   NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_R_SHIFT			0
-#define   NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_R_MASK			0x0000ffff
-#define   NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_B_SHIFT			16
-#define   NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_B_MASK			0xffff0000
-#define  NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT0						0x000007ec
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_L_SHIFT					0
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_L_MASK					0x0000ffff
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_T_SHIFT					16
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_T_MASK					0xffff0000
-#define  NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT1						0x000007f0
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_R_SHIFT					0
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_R_MASK					0x0000ffff
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_B_SHIFT					16
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_B_MASK					0xffff0000
-#define  NV04_GDI_RECTANGLE_TEXT_COLOR1_C						0x000007f4
-#define  NV04_GDI_RECTANGLE_TEXT_SIZE_C							0x000007f8
-#define   NV04_GDI_RECTANGLE_TEXT_SIZE_C_W_SHIFT					0
-#define   NV04_GDI_RECTANGLE_TEXT_SIZE_C_W_MASK						0x0000ffff
-#define   NV04_GDI_RECTANGLE_TEXT_SIZE_C_H_SHIFT					16
-#define   NV04_GDI_RECTANGLE_TEXT_SIZE_C_H_MASK						0xffff0000
-#define  NV04_GDI_RECTANGLE_TEXT_POINT_C						0x000007fc
-#define   NV04_GDI_RECTANGLE_TEXT_POINT_C_X_SHIFT					0
-#define   NV04_GDI_RECTANGLE_TEXT_POINT_C_X_MASK					0x0000ffff
-#define   NV04_GDI_RECTANGLE_TEXT_POINT_C_Y_SHIFT					16
-#define   NV04_GDI_RECTANGLE_TEXT_POINT_C_Y_MASK					0xffff0000
-#define  NV04_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR1_C(x)					(0x00000800+((x)*4))
-#define  NV04_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR1_C__SIZE				0x00000080
-#define  NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT0						0x00000be4
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_L_SHIFT					0
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_L_MASK					0x0000ffff
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_T_SHIFT					16
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_T_MASK					0xffff0000
-#define  NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT1						0x00000be8
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_R_SHIFT					0
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_R_MASK					0x0000ffff
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_B_SHIFT					16
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_B_MASK					0xffff0000
-#define  NV04_GDI_RECTANGLE_TEXT_COLOR0_E						0x00000bec
-#define  NV04_GDI_RECTANGLE_TEXT_COLOR1_E						0x00000bf0
-#define  NV04_GDI_RECTANGLE_TEXT_SIZE_IN_E						0x00000bf4
-#define   NV04_GDI_RECTANGLE_TEXT_SIZE_IN_E_W_SHIFT					0
-#define   NV04_GDI_RECTANGLE_TEXT_SIZE_IN_E_W_MASK					0x0000ffff
-#define   NV04_GDI_RECTANGLE_TEXT_SIZE_IN_E_H_SHIFT					16
-#define   NV04_GDI_RECTANGLE_TEXT_SIZE_IN_E_H_MASK					0xffff0000
-#define  NV04_GDI_RECTANGLE_TEXT_SIZE_OUT_E						0x00000bf8
-#define   NV04_GDI_RECTANGLE_TEXT_SIZE_OUT_E_W_SHIFT					0
-#define   NV04_GDI_RECTANGLE_TEXT_SIZE_OUT_E_W_MASK					0x0000ffff
-#define   NV04_GDI_RECTANGLE_TEXT_SIZE_OUT_E_H_SHIFT					16
-#define   NV04_GDI_RECTANGLE_TEXT_SIZE_OUT_E_H_MASK					0xffff0000
-#define  NV04_GDI_RECTANGLE_TEXT_POINT_E						0x00000bfc
-#define   NV04_GDI_RECTANGLE_TEXT_POINT_E_X_SHIFT					0
-#define   NV04_GDI_RECTANGLE_TEXT_POINT_E_X_MASK					0x0000ffff
-#define   NV04_GDI_RECTANGLE_TEXT_POINT_E_Y_SHIFT					16
-#define   NV04_GDI_RECTANGLE_TEXT_POINT_E_Y_MASK					0xffff0000
-#define  NV04_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR01_E(x)				(0x00000c00+((x)*4))
-#define  NV04_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR01_E__SIZE				0x00000080
-#define  NV04_GDI_RECTANGLE_TEXT_FONT_F							0x00000ff0
-#define   NV04_GDI_RECTANGLE_TEXT_FONT_F_OFFSET_SHIFT					0
-#define   NV04_GDI_RECTANGLE_TEXT_FONT_F_OFFSET_MASK					0x0fffffff
-#define   NV04_GDI_RECTANGLE_TEXT_FONT_F_PITCH_SHIFT					28
-#define   NV04_GDI_RECTANGLE_TEXT_FONT_F_PITCH_MASK					0xf0000000
-#define  NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT0						0x00000ff4
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT0_L_SHIFT					0
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT0_L_MASK					0x0000ffff
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT0_T_SHIFT					16
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT0_T_MASK					0xffff0000
-#define  NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT1						0x00000ff8
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT1_R_SHIFT					0
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT1_R_MASK					0x0000ffff
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT1_B_SHIFT					16
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT1_B_MASK					0xffff0000
-#define  NV04_GDI_RECTANGLE_TEXT_COLOR1_F						0x00000ffc
-#define  NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F(x)					(0x00001000+((x)*4))
-#define  NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F__SIZE				0x00000100
-#define   NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F_INDEX_SHIFT			0
-#define   NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F_INDEX_MASK				0x000000ff
-#define   NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F_X_SHIFT				8
-#define   NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F_X_MASK				0x000fff00
-#define   NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F_Y_SHIFT				20
-#define   NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F_Y_MASK				0xfff00000
-#define  NV04_GDI_RECTANGLE_TEXT_FONT_G							0x000017f0
-#define   NV04_GDI_RECTANGLE_TEXT_FONT_G_OFFSET_SHIFT					0
-#define   NV04_GDI_RECTANGLE_TEXT_FONT_G_OFFSET_MASK					0x0fffffff
-#define   NV04_GDI_RECTANGLE_TEXT_FONT_G_PITCH_SHIFT					28
-#define   NV04_GDI_RECTANGLE_TEXT_FONT_G_PITCH_MASK					0xf0000000
-#define  NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT0						0x000017f4
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT0_L_SHIFT					0
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT0_L_MASK					0x0000ffff
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT0_T_SHIFT					16
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT0_T_MASK					0xffff0000
-#define  NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT1						0x000017f8
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT1_R_SHIFT					0
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT1_R_MASK					0x0000ffff
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT1_B_SHIFT					16
-#define   NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT1_B_MASK					0xffff0000
-#define  NV04_GDI_RECTANGLE_TEXT_COLOR1_G						0x000017fc
-#define  NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_POINT(x)				(0x00001800+((x)*8))
-#define  NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_POINT__SIZE				0x00000100
-#define   NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_POINT_X_SHIFT			0
-#define   NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_POINT_X_MASK			0x0000ffff
-#define   NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_POINT_Y_SHIFT			16
-#define   NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_POINT_Y_MASK			0xffff0000
-#define  NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_INDEX(x)				(0x00001804+((x)*8))
-#define  NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_INDEX__SIZE				0x00000100
-
-
-#define NV03_GDI_RECTANGLE_TEXT								0x0000004b
-
-#define  NV03_GDI_RECTANGLE_TEXT_NOP							0x00000100
-#define  NV03_GDI_RECTANGLE_TEXT_NOTIFY							0x00000104
-#define  NV03_GDI_RECTANGLE_TEXT_DMA_NOTIFY						0x00000180
-#define  NV03_GDI_RECTANGLE_TEXT_PATTERN						0x00000184
-#define  NV03_GDI_RECTANGLE_TEXT_ROP							0x00000188
-#define  NV03_GDI_RECTANGLE_TEXT_BETA1							0x0000018c
-#define  NV03_GDI_RECTANGLE_TEXT_SURFACE						0x00000190
-#define  NV03_GDI_RECTANGLE_TEXT_OPERATION						0x000002fc
-#define  NV03_GDI_RECTANGLE_TEXT_COLOR_FORMAT						0x00000300
-#define  NV03_GDI_RECTANGLE_TEXT_MONOCHROME_FORMAT					0x00000304
-#define  NV03_GDI_RECTANGLE_TEXT_COLOR1_A						0x000003fc
-#define  NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT				0x00000400
-#define   NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_Y_SHIFT			0
-#define   NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_Y_MASK			0x0000ffff
-#define   NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_X_SHIFT			16
-#define   NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_X_MASK			0xffff0000
-#define  NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE				0x00000404
-#define   NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_H_SHIFT			0
-#define   NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_H_MASK			0x0000ffff
-#define   NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_W_SHIFT			16
-#define   NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_W_MASK			0xffff0000
-#define  NV03_GDI_RECTANGLE_TEXT_CLIP_POINT0_B						0x000007f4
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_POINT0_B_L_SHIFT					0
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_POINT0_B_L_MASK					0x0000ffff
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_POINT0_B_T_SHIFT					16
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_POINT0_B_T_MASK					0xffff0000
-#define  NV03_GDI_RECTANGLE_TEXT_CLIP_POINT1_B						0x000007f8
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_POINT1_B_R_SHIFT					0
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_POINT1_B_R_MASK					0x0000ffff
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_POINT1_B_B_SHIFT					16
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_POINT1_B_B_MASK					0xffff0000
-#define  NV03_GDI_RECTANGLE_TEXT_COLOR1_B						0x000007fc
-#define  NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0				0x00000800
-#define   NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_L_SHIFT			0
-#define   NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_L_MASK			0x0000ffff
-#define   NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_T_SHIFT			16
-#define   NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_T_MASK			0xffff0000
-#define  NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1				0x00000804
-#define   NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_R_SHIFT			0
-#define   NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_R_MASK			0x0000ffff
-#define   NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_B_SHIFT			16
-#define   NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_B_MASK			0xffff0000
-#define  NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT0						0x00000bec
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_L_SHIFT					0
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_L_MASK					0x0000ffff
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_T_SHIFT					16
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_T_MASK					0xffff0000
-#define  NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT1						0x00000bf0
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_R_SHIFT					0
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_R_MASK					0x0000ffff
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_B_SHIFT					16
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_B_MASK					0xffff0000
-#define  NV03_GDI_RECTANGLE_TEXT_COLOR1_C						0x00000bf4
-#define  NV03_GDI_RECTANGLE_TEXT_SIZE_C							0x00000bf8
-#define   NV03_GDI_RECTANGLE_TEXT_SIZE_C_W_SHIFT					0
-#define   NV03_GDI_RECTANGLE_TEXT_SIZE_C_W_MASK						0x0000ffff
-#define   NV03_GDI_RECTANGLE_TEXT_SIZE_C_H_SHIFT					16
-#define   NV03_GDI_RECTANGLE_TEXT_SIZE_C_H_MASK						0xffff0000
-#define  NV03_GDI_RECTANGLE_TEXT_POINT_C						0x00000bfc
-#define   NV03_GDI_RECTANGLE_TEXT_POINT_C_X_SHIFT					0
-#define   NV03_GDI_RECTANGLE_TEXT_POINT_C_X_MASK					0x0000ffff
-#define   NV03_GDI_RECTANGLE_TEXT_POINT_C_Y_SHIFT					16
-#define   NV03_GDI_RECTANGLE_TEXT_POINT_C_Y_MASK					0xffff0000
-#define  NV03_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR1_C(x)					(0x00000c00+((x)*4))
-#define  NV03_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR1_C__SIZE				0x00000020
-#define  NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT0						0x00000fe8
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT0_L_SHIFT					0
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT0_L_MASK					0x0000ffff
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT0_T_SHIFT					16
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT0_T_MASK					0xffff0000
-#define  NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT1						0x00000fec
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT1_R_SHIFT					0
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT1_R_MASK					0x0000ffff
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT1_B_SHIFT					16
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT1_B_MASK					0xffff0000
-#define  NV03_GDI_RECTANGLE_TEXT_COLOR1_D						0x00000ff0
-#define  NV03_GDI_RECTANGLE_TEXT_SIZE_IN_D						0x00000ff4
-#define   NV03_GDI_RECTANGLE_TEXT_SIZE_IN_D_W_SHIFT					0
-#define   NV03_GDI_RECTANGLE_TEXT_SIZE_IN_D_W_MASK					0x0000ffff
-#define   NV03_GDI_RECTANGLE_TEXT_SIZE_IN_D_H_SHIFT					16
-#define   NV03_GDI_RECTANGLE_TEXT_SIZE_IN_D_H_MASK					0xffff0000
-#define  NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_D						0x00000ff8
-#define   NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_D_W_SHIFT					0
-#define   NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_D_W_MASK					0x0000ffff
-#define   NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_D_H_SHIFT					16
-#define   NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_D_H_MASK					0xffff0000
-#define  NV03_GDI_RECTANGLE_TEXT_POINT_D						0x00000ffc
-#define   NV03_GDI_RECTANGLE_TEXT_POINT_D_X_SHIFT					0
-#define   NV03_GDI_RECTANGLE_TEXT_POINT_D_X_MASK					0x0000ffff
-#define   NV03_GDI_RECTANGLE_TEXT_POINT_D_Y_SHIFT					16
-#define   NV03_GDI_RECTANGLE_TEXT_POINT_D_Y_MASK					0xffff0000
-#define  NV03_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR1_D(x)					(0x00001000+((x)*4))
-#define  NV03_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR1_D__SIZE				0x00000020
-#define  NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT0						0x000013e4
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_L_SHIFT					0
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_L_MASK					0x0000ffff
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_T_SHIFT					16
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_T_MASK					0xffff0000
-#define  NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT1						0x000013e8
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_R_SHIFT					0
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_R_MASK					0x0000ffff
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_B_SHIFT					16
-#define   NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_B_MASK					0xffff0000
-#define  NV03_GDI_RECTANGLE_TEXT_COLOR0_E						0x000013ec
-#define  NV03_GDI_RECTANGLE_TEXT_COLOR1_E						0x000013f0
-#define  NV03_GDI_RECTANGLE_TEXT_SIZE_IN_E						0x000013f4
-#define   NV03_GDI_RECTANGLE_TEXT_SIZE_IN_E_W_SHIFT					0
-#define   NV03_GDI_RECTANGLE_TEXT_SIZE_IN_E_W_MASK					0x0000ffff
-#define   NV03_GDI_RECTANGLE_TEXT_SIZE_IN_E_H_SHIFT					16
-#define   NV03_GDI_RECTANGLE_TEXT_SIZE_IN_E_H_MASK					0xffff0000
-#define  NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_E						0x000013f8
-#define   NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_E_W_SHIFT					0
-#define   NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_E_W_MASK					0x0000ffff
-#define   NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_E_H_SHIFT					16
-#define   NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_E_H_MASK					0xffff0000
-#define  NV03_GDI_RECTANGLE_TEXT_POINT_E						0x000013fc
-#define   NV03_GDI_RECTANGLE_TEXT_POINT_E_X_SHIFT					0
-#define   NV03_GDI_RECTANGLE_TEXT_POINT_E_X_MASK					0x0000ffff
-#define   NV03_GDI_RECTANGLE_TEXT_POINT_E_Y_SHIFT					16
-#define   NV03_GDI_RECTANGLE_TEXT_POINT_E_Y_MASK					0xffff0000
-#define  NV03_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR01_E(x)				(0x00001400+((x)*4))
-#define  NV03_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR01_E__SIZE				0x00000020
-
-
-#define NV04_SWIZZLED_SURFACE								0x00000052
-
-#define  NV04_SWIZZLED_SURFACE_NOP							0x00000100
-#define  NV04_SWIZZLED_SURFACE_NOTIFY							0x00000104
-#define  NV04_SWIZZLED_SURFACE_DMA_NOTIFY						0x00000180
-#define  NV04_SWIZZLED_SURFACE_DMA_IMAGE						0x00000184
-#define  NV04_SWIZZLED_SURFACE_FORMAT							0x00000300
-#define   NV04_SWIZZLED_SURFACE_FORMAT_COLOR_SHIFT					0
-#define   NV04_SWIZZLED_SURFACE_FORMAT_COLOR_MASK					0x000000ff
-#define    NV04_SWIZZLED_SURFACE_FORMAT_COLOR_Y8					0x00000001
-#define    NV04_SWIZZLED_SURFACE_FORMAT_COLOR_X1R5G5B5_Z1R5G5B5				0x00000002
-#define    NV04_SWIZZLED_SURFACE_FORMAT_COLOR_X1R5G5B5_X1R5G5B5				0x00000003
-#define    NV04_SWIZZLED_SURFACE_FORMAT_COLOR_R5G6B5					0x00000004
-#define    NV04_SWIZZLED_SURFACE_FORMAT_COLOR_Y16					0x00000005
-#define    NV04_SWIZZLED_SURFACE_FORMAT_COLOR_X8R8G8B8_Z8R8G8B8				0x00000006
-#define    NV04_SWIZZLED_SURFACE_FORMAT_COLOR_X8R8G8B8_X8R8G8B8				0x00000007
-#define    NV04_SWIZZLED_SURFACE_FORMAT_COLOR_X1A7R8G8B8_Z1A7R8G8B8			0x00000008
-#define    NV04_SWIZZLED_SURFACE_FORMAT_COLOR_X1A7R8G8B8_X1A7R8G8B8			0x00000009
-#define    NV04_SWIZZLED_SURFACE_FORMAT_COLOR_A8R8G8B8					0x0000000a
-#define    NV04_SWIZZLED_SURFACE_FORMAT_COLOR_Y32					0x0000000b
-#define   NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_U_SHIFT				16
-#define   NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_U_MASK					0x00ff0000
-#define   NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_V_SHIFT				24
-#define   NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_V_MASK					0xff000000
-#define  NV04_SWIZZLED_SURFACE_OFFSET							0x00000304
-
-
-#define NV04_CONTEXT_SURFACES_3D							0x00000053
-
-#define  NV04_CONTEXT_SURFACES_3D_NOP							0x00000100
-#define  NV04_CONTEXT_SURFACES_3D_NOTIFY						0x00000104
-#define  NV04_CONTEXT_SURFACES_3D_DMA_NOTIFY						0x00000180
-#define  NV04_CONTEXT_SURFACES_3D_DMA_COLOR						0x00000184
-#define  NV04_CONTEXT_SURFACES_3D_DMA_ZETA						0x00000188
-#define  NV04_CONTEXT_SURFACES_3D_CLIP_HORIZONTAL					0x000002f8
-#define   NV04_CONTEXT_SURFACES_3D_CLIP_HORIZONTAL_X_SHIFT				0
-#define   NV04_CONTEXT_SURFACES_3D_CLIP_HORIZONTAL_X_MASK				0x0000ffff
-#define   NV04_CONTEXT_SURFACES_3D_CLIP_HORIZONTAL_W_SHIFT				16
-#define   NV04_CONTEXT_SURFACES_3D_CLIP_HORIZONTAL_W_MASK				0xffff0000
-#define  NV04_CONTEXT_SURFACES_3D_CLIP_VERTICAL						0x000002fc
-#define   NV04_CONTEXT_SURFACES_3D_CLIP_VERTICAL_Y_SHIFT				0
-#define   NV04_CONTEXT_SURFACES_3D_CLIP_VERTICAL_Y_MASK					0x0000ffff
-#define   NV04_CONTEXT_SURFACES_3D_CLIP_VERTICAL_H_SHIFT				16
-#define   NV04_CONTEXT_SURFACES_3D_CLIP_VERTICAL_H_MASK					0xffff0000
-#define  NV04_CONTEXT_SURFACES_3D_FORMAT						0x00000300
-#define   NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_SHIFT					0
-#define   NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_MASK					0x000000ff
-#define    NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_X1R5G5B5_Z1R5G5B5			0x00000001
-#define    NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_X1R5G5B5_X1R5G5B5			0x00000002
-#define    NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_R5G6B5					0x00000003
-#define    NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_X8R8G8B8_Z8R8G8B8			0x00000004
-#define    NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_X8R8G8B8_X8R8G8B8			0x00000005
-#define    NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_X1A7R8G8B8_Z1A7R8G8B8			0x00000006
-#define    NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_X1A7R8G8B8_X1A7R8G8B8			0x00000007
-#define    NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_A8R8G8B8				0x00000008
-#define   NV04_CONTEXT_SURFACES_3D_FORMAT_TYPE_SHIFT					8
-#define   NV04_CONTEXT_SURFACES_3D_FORMAT_TYPE_MASK					0x0000ff00
-#define    NV04_CONTEXT_SURFACES_3D_FORMAT_TYPE_PITCH					0x00000100
-#define    NV04_CONTEXT_SURFACES_3D_FORMAT_TYPE_SWIZZLE					0x00000200
-#define   NV04_CONTEXT_SURFACES_3D_FORMAT_BASE_SIZE_U_SHIFT				16
-#define   NV04_CONTEXT_SURFACES_3D_FORMAT_BASE_SIZE_U_MASK				0x00ff0000
-#define   NV04_CONTEXT_SURFACES_3D_FORMAT_BASE_SIZE_V_SHIFT				24
-#define   NV04_CONTEXT_SURFACES_3D_FORMAT_BASE_SIZE_V_MASK				0xff000000
-#define  NV04_CONTEXT_SURFACES_3D_CLIP_SIZE						0x00000304
-#define   NV04_CONTEXT_SURFACES_3D_CLIP_SIZE_W_SHIFT					0
-#define   NV04_CONTEXT_SURFACES_3D_CLIP_SIZE_W_MASK					0x0000ffff
-#define   NV04_CONTEXT_SURFACES_3D_CLIP_SIZE_H_SHIFT					16
-#define   NV04_CONTEXT_SURFACES_3D_CLIP_SIZE_H_MASK					0xffff0000
-#define  NV04_CONTEXT_SURFACES_3D_PITCH							0x00000308
-#define   NV04_CONTEXT_SURFACES_3D_PITCH_COLOR_SHIFT					0
-#define   NV04_CONTEXT_SURFACES_3D_PITCH_COLOR_MASK					0x0000ffff
-#define   NV04_CONTEXT_SURFACES_3D_PITCH_ZETA_SHIFT					16
-#define   NV04_CONTEXT_SURFACES_3D_PITCH_ZETA_MASK					0xffff0000
-#define  NV04_CONTEXT_SURFACES_3D_OFFSET_COLOR						0x0000030c
-#define  NV04_CONTEXT_SURFACES_3D_OFFSET_ZETA						0x00000310
-
-
-#define NV04_DX5_TEXTURED_TRIANGLE							0x00000054
-
-#define  NV04_DX5_TEXTURED_TRIANGLE_NOP							0x00000100
-#define  NV04_DX5_TEXTURED_TRIANGLE_NOTIFY						0x00000104
-#define  NV04_DX5_TEXTURED_TRIANGLE_DMA_NOTIFY						0x00000180
-#define  NV04_DX5_TEXTURED_TRIANGLE_DMA_A						0x00000184
-#define  NV04_DX5_TEXTURED_TRIANGLE_DMA_B						0x00000188
-#define  NV04_DX5_TEXTURED_TRIANGLE_SURFACE						0x0000018c
-#define  NV04_DX5_TEXTURED_TRIANGLE_COLORKEY						0x00000300
-#define  NV04_DX5_TEXTURED_TRIANGLE_OFFSET						0x00000304
-#define  NV04_DX5_TEXTURED_TRIANGLE_FORMAT						0x00000308
-#define   NV04_DX5_TEXTURED_TRIANGLE_FORMAT_DMA_SHIFT					0
-#define   NV04_DX5_TEXTURED_TRIANGLE_FORMAT_DMA_MASK					0x00000003
-#define   NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_KEY_MATCH_SHIFT			2
-#define   NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_KEY_MATCH_MASK			0x0000000c
-#define   NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ORIGIN_ZOH_SHIFT				4
-#define   NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ORIGIN_ZOH_MASK				0x00000030
-#define    NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ORIGIN_ZOH_CENTER				0x00000010
-#define    NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ORIGIN_ZOH_CORNER				0x00000020
-#define   NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ORIGIN_FOH_SHIFT				6
-#define   NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ORIGIN_FOH_MASK				0x000000c0
-#define    NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ORIGIN_FOH_CENTER				0x00000040
-#define    NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ORIGIN_FOH_CORNER				0x00000080
-#define   NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_SHIFT					8
-#define   NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_MASK					0x00000f00
-#define    NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_Y8					0x00000100
-#define    NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_A1R5G5B5				0x00000200
-#define    NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_X1R5G5B5				0x00000300
-#define    NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_A4R4G4B4				0x00000400
-#define    NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_R5G6B5				0x00000500
-#define    NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_A8R8G8B8				0x00000600
-#define    NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_X8R8G8B8				0x00000700
-#define   NV04_DX5_TEXTURED_TRIANGLE_FORMAT_MIPMAP_LEVELS_SHIFT				12
-#define   NV04_DX5_TEXTURED_TRIANGLE_FORMAT_MIPMAP_LEVELS_MASK				0x0000f000
-#define   NV04_DX5_TEXTURED_TRIANGLE_FORMAT_BASE_SIZE_U_SHIFT				16
-#define   NV04_DX5_TEXTURED_TRIANGLE_FORMAT_BASE_SIZE_U_MASK				0x000f0000
-#define   NV04_DX5_TEXTURED_TRIANGLE_FORMAT_BASE_SIZE_V_SHIFT				20
-#define   NV04_DX5_TEXTURED_TRIANGLE_FORMAT_BASE_SIZE_V_MASK				0x00f00000
-#define   NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_SHIFT				24
-#define   NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_MASK				0x07000000
-#define    NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_REPEAT				0x01000000
-#define    NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_MIRRORED_REPEAT			0x02000000
-#define    NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_CLAMP_TO_EDGE			0x03000000
-#define    NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_CLAMP_TO_BORDER			0x04000000
-#define    NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_CLAMP				0x05000000
-#define   NV04_DX5_TEXTURED_TRIANGLE_FORMAT_WRAPU					(1 << 27)
-#define   NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_SHIFT				28
-#define   NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_MASK				0x70000000
-#define    NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_REPEAT				0x10000000
-#define    NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_MIRRORED_REPEAT			0x20000000
-#define    NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_CLAMP_TO_EDGE			0x30000000
-#define    NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_CLAMP_TO_BORDER			0x40000000
-#define    NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_CLAMP				0x50000000
-#define   NV04_DX5_TEXTURED_TRIANGLE_FORMAT_WRAPV					(1 << 31)
-#define  NV04_DX5_TEXTURED_TRIANGLE_FILTER						0x0000030c
-#define   NV04_DX5_TEXTURED_TRIANGLE_FILTER_KERNEL_SIZE_X_SHIFT				0
-#define   NV04_DX5_TEXTURED_TRIANGLE_FILTER_KERNEL_SIZE_X_MASK				0x000000ff
-#define   NV04_DX5_TEXTURED_TRIANGLE_FILTER_KERNEL_SIZE_Y_SHIFT				8
-#define   NV04_DX5_TEXTURED_TRIANGLE_FILTER_KERNEL_SIZE_Y_MASK				0x00007f00
-#define   NV04_DX5_TEXTURED_TRIANGLE_FILTER_MIPMAP_DITHER_ENABLE			(1 << 15)
-#define   NV04_DX5_TEXTURED_TRIANGLE_FILTER_MIPMAP_LODBIAS_SHIFT			16
-#define   NV04_DX5_TEXTURED_TRIANGLE_FILTER_MIPMAP_LODBIAS_MASK				0x00ff0000
-#define   NV04_DX5_TEXTURED_TRIANGLE_FILTER_MINIFY_SHIFT				24
-#define   NV04_DX5_TEXTURED_TRIANGLE_FILTER_MINIFY_MASK					0x07000000
-#define    NV04_DX5_TEXTURED_TRIANGLE_FILTER_MINIFY_NEAREST				0x01000000
-#define    NV04_DX5_TEXTURED_TRIANGLE_FILTER_MINIFY_LINEAR				0x02000000
-#define    NV04_DX5_TEXTURED_TRIANGLE_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST		0x03000000
-#define    NV04_DX5_TEXTURED_TRIANGLE_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST		0x04000000
-#define    NV04_DX5_TEXTURED_TRIANGLE_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR		0x05000000
-#define    NV04_DX5_TEXTURED_TRIANGLE_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR		0x06000000
-#define   NV04_DX5_TEXTURED_TRIANGLE_FILTER_ANISOTROPIC_MINIFY_ENABLE			(1 << 27)
-#define   NV04_DX5_TEXTURED_TRIANGLE_FILTER_MAGNIFY_SHIFT				28
-#define   NV04_DX5_TEXTURED_TRIANGLE_FILTER_MAGNIFY_MASK				0x70000000
-#define    NV04_DX5_TEXTURED_TRIANGLE_FILTER_MAGNIFY_NEAREST				0x10000000
-#define    NV04_DX5_TEXTURED_TRIANGLE_FILTER_MAGNIFY_LINEAR				0x20000000
-#define   NV04_DX5_TEXTURED_TRIANGLE_FILTER_ANISOTROPIC_MAGNIFY_ENABLE			(1 << 31)
-#define  NV04_DX5_TEXTURED_TRIANGLE_BLEND						0x00000310
-#define   NV04_DX5_TEXTURED_TRIANGLE_BLEND_TEXTURE_MAP_SHIFT				0
-#define   NV04_DX5_TEXTURED_TRIANGLE_BLEND_TEXTURE_MAP_MASK				0x0000000f
-#define   NV04_DX5_TEXTURED_TRIANGLE_BLEND_MASK_BIT_SHIFT				4
-#define   NV04_DX5_TEXTURED_TRIANGLE_BLEND_MASK_BIT_MASK				0x00000030
-#define   NV04_DX5_TEXTURED_TRIANGLE_BLEND_SHADE_MODE_SHIFT				6
-#define   NV04_DX5_TEXTURED_TRIANGLE_BLEND_SHADE_MODE_MASK				0x000000c0
-#define    NV04_DX5_TEXTURED_TRIANGLE_BLEND_SHADE_MODE_FLAT				0x00000040
-#define    NV04_DX5_TEXTURED_TRIANGLE_BLEND_SHADE_MODE_GOURAUD				0x00000080
-#define    NV04_DX5_TEXTURED_TRIANGLE_BLEND_SHADE_MODE_PHONG				0x000000c0
-#define   NV04_DX5_TEXTURED_TRIANGLE_BLEND_TEXTURE_PERSPECTIVE_ENABLE_SHIFT		8
-#define   NV04_DX5_TEXTURED_TRIANGLE_BLEND_TEXTURE_PERSPECTIVE_ENABLE_MASK		0x00000f00
-#define   NV04_DX5_TEXTURED_TRIANGLE_BLEND_SPECULAR_ENABLE_SHIFT			12
-#define   NV04_DX5_TEXTURED_TRIANGLE_BLEND_SPECULAR_ENABLE_MASK				0x0000f000
-#define   NV04_DX5_TEXTURED_TRIANGLE_BLEND_FOG_ENABLE_SHIFT				16
-#define   NV04_DX5_TEXTURED_TRIANGLE_BLEND_FOG_ENABLE_MASK				0x000f0000
-#define   NV04_DX5_TEXTURED_TRIANGLE_BLEND_ALPHA_ENABLE_SHIFT				20
-#define   NV04_DX5_TEXTURED_TRIANGLE_BLEND_ALPHA_ENABLE_MASK				0x00f00000
-#define   NV04_DX5_TEXTURED_TRIANGLE_BLEND_SRC_SHIFT					24
-#define   NV04_DX5_TEXTURED_TRIANGLE_BLEND_SRC_MASK					0x0f000000
-#define   NV04_DX5_TEXTURED_TRIANGLE_BLEND_DST_SHIFT					28
-#define   NV04_DX5_TEXTURED_TRIANGLE_BLEND_DST_MASK					0xf0000000
-#define  NV04_DX5_TEXTURED_TRIANGLE_CONTROL						0x00000314
-#define   NV04_DX5_TEXTURED_TRIANGLE_CONTROL_ALPHA_REF_SHIFT				0
-#define   NV04_DX5_TEXTURED_TRIANGLE_CONTROL_ALPHA_REF_MASK				0x000000ff
-#define   NV04_DX5_TEXTURED_TRIANGLE_CONTROL_ALPHA_FUNC_SHIFT				8
-#define   NV04_DX5_TEXTURED_TRIANGLE_CONTROL_ALPHA_FUNC_MASK				0x00000f00
-#define   NV04_DX5_TEXTURED_TRIANGLE_CONTROL_ALPHA_TEST_ENABLE				(1 << 12)
-#define   NV04_DX5_TEXTURED_TRIANGLE_CONTROL_ORIGIN					(1 << 13)
-#define   NV04_DX5_TEXTURED_TRIANGLE_CONTROL_Z_ENABLE_SHIFT				14
-#define   NV04_DX5_TEXTURED_TRIANGLE_CONTROL_Z_ENABLE_MASK				0x0000c000
-#define   NV04_DX5_TEXTURED_TRIANGLE_CONTROL_Z_FUNC_SHIFT				16
-#define   NV04_DX5_TEXTURED_TRIANGLE_CONTROL_Z_FUNC_MASK				0x000f0000
-#define   NV04_DX5_TEXTURED_TRIANGLE_CONTROL_CULL_MODE_SHIFT				20
-#define   NV04_DX5_TEXTURED_TRIANGLE_CONTROL_CULL_MODE_MASK				0x00300000
-#define   NV04_DX5_TEXTURED_TRIANGLE_CONTROL_DITHER_ENABLE				(1 << 22)
-#define   NV04_DX5_TEXTURED_TRIANGLE_CONTROL_Z_PERSPECTIVE_ENABLE			(1 << 23)
-#define   NV04_DX5_TEXTURED_TRIANGLE_CONTROL_Z_WRITE_ENABLE_SHIFT			24
-#define   NV04_DX5_TEXTURED_TRIANGLE_CONTROL_Z_WRITE_ENABLE_MASK			0x3f000000
-#define   NV04_DX5_TEXTURED_TRIANGLE_CONTROL_Z_FORMAT_SHIFT				30
-#define   NV04_DX5_TEXTURED_TRIANGLE_CONTROL_Z_FORMAT_MASK				0xc0000000
-#define  NV04_DX5_TEXTURED_TRIANGLE_FOGCOLOR						0x00000318
-#define   NV04_DX5_TEXTURED_TRIANGLE_FOGCOLOR_B_SHIFT					0
-#define   NV04_DX5_TEXTURED_TRIANGLE_FOGCOLOR_B_MASK					0x000000ff
-#define   NV04_DX5_TEXTURED_TRIANGLE_FOGCOLOR_G_SHIFT					8
-#define   NV04_DX5_TEXTURED_TRIANGLE_FOGCOLOR_G_MASK					0x0000ff00
-#define   NV04_DX5_TEXTURED_TRIANGLE_FOGCOLOR_R_SHIFT					16
-#define   NV04_DX5_TEXTURED_TRIANGLE_FOGCOLOR_R_MASK					0x00ff0000
-#define   NV04_DX5_TEXTURED_TRIANGLE_FOGCOLOR_A_SHIFT					24
-#define   NV04_DX5_TEXTURED_TRIANGLE_FOGCOLOR_A_MASK					0xff000000
-#define  NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SX(x)					(0x00000400+((x)*32))
-#define  NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SX__SIZE					0x00000010
-#define  NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SY(x)					(0x00000404+((x)*32))
-#define  NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SY__SIZE					0x00000010
-#define  NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SZ(x)					(0x00000408+((x)*32))
-#define  NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SZ__SIZE					0x00000010
-#define  NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_RHW(x)					(0x0000040c+((x)*32))
-#define  NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_RHW__SIZE					0x00000010
-#define  NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR(x)					(0x00000410+((x)*32))
-#define  NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR__SIZE				0x00000010
-#define   NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR_B_SHIFT				0
-#define   NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR_B_MASK				0x000000ff
-#define   NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR_G_SHIFT				8
-#define   NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR_G_MASK				0x0000ff00
-#define   NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR_R_SHIFT				16
-#define   NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR_R_MASK				0x00ff0000
-#define   NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR_A_SHIFT				24
-#define   NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR_A_MASK				0xff000000
-#define  NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR(x)				(0x00000414+((x)*32))
-#define  NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR__SIZE				0x00000010
-#define   NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_B_SHIFT				0
-#define   NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_B_MASK				0x000000ff
-#define   NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_G_SHIFT				8
-#define   NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_G_MASK				0x0000ff00
-#define   NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_R_SHIFT				16
-#define   NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_R_MASK				0x00ff0000
-#define   NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_FOG_SHIFT			24
-#define   NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_FOG_MASK				0xff000000
-#define  NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_TU(x)					(0x00000418+((x)*32))
-#define  NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_TU__SIZE					0x00000010
-#define  NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_TV(x)					(0x0000041c+((x)*32))
-#define  NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_TV__SIZE					0x00000010
-#define  NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE(x)				(0x00000600+((x)*4))
-#define  NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE__SIZE			0x00000040
-#define   NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I0_SHIFT			0
-#define   NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I0_MASK			0x0000000f
-#define   NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I1_SHIFT			4
-#define   NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I1_MASK			0x000000f0
-#define   NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I2_SHIFT			8
-#define   NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I2_MASK			0x00000f00
-#define   NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I3_SHIFT			12
-#define   NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I3_MASK			0x0000f000
-#define   NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I4_SHIFT			16
-#define   NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I4_MASK			0x000f0000
-#define   NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I5_SHIFT			20
-#define   NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I5_MASK			0x00f00000
-
-
-#define NV04_DX6_MULTITEX_TRIANGLE							0x00000055
-
-#define  NV04_DX6_MULTITEX_TRIANGLE_NOP							0x00000100
-#define  NV04_DX6_MULTITEX_TRIANGLE_NOTIFY						0x00000104
-#define  NV04_DX6_MULTITEX_TRIANGLE_DMA_NOTIFY						0x00000180
-#define  NV04_DX6_MULTITEX_TRIANGLE_DMA_A						0x00000184
-#define  NV04_DX6_MULTITEX_TRIANGLE_DMA_B						0x00000188
-#define  NV04_DX6_MULTITEX_TRIANGLE_SURFACE						0x0000018c
-#define  NV04_DX6_MULTITEX_TRIANGLE_OFFSET(x)						(0x00000308+((x)*4))
-#define  NV04_DX6_MULTITEX_TRIANGLE_OFFSET__SIZE					0x00000002
-#define  NV04_DX6_MULTITEX_TRIANGLE_FORMAT(x)						(0x00000310+((x)*4))
-#define  NV04_DX6_MULTITEX_TRIANGLE_FORMAT__SIZE					0x00000002
-#define   NV04_DX6_MULTITEX_TRIANGLE_FORMAT_DMA_SHIFT					0
-#define   NV04_DX6_MULTITEX_TRIANGLE_FORMAT_DMA_MASK					0x0000000f
-#define   NV04_DX6_MULTITEX_TRIANGLE_FORMAT_ORIGIN_ZOH_SHIFT				4
-#define   NV04_DX6_MULTITEX_TRIANGLE_FORMAT_ORIGIN_ZOH_MASK				0x00000030
-#define   NV04_DX6_MULTITEX_TRIANGLE_FORMAT_ORIGIN_FOH_SHIFT				6
-#define   NV04_DX6_MULTITEX_TRIANGLE_FORMAT_ORIGIN_FOH_MASK				0x000000c0
-#define   NV04_DX6_MULTITEX_TRIANGLE_FORMAT_COLOR_SHIFT					8
-#define   NV04_DX6_MULTITEX_TRIANGLE_FORMAT_COLOR_MASK					0x00000f00
-#define   NV04_DX6_MULTITEX_TRIANGLE_FORMAT_MIPMAP_LEVELS_SHIFT				12
-#define   NV04_DX6_MULTITEX_TRIANGLE_FORMAT_MIPMAP_LEVELS_MASK				0x0000f000
-#define   NV04_DX6_MULTITEX_TRIANGLE_FORMAT_BASE_SIZE_U_SHIFT				16
-#define   NV04_DX6_MULTITEX_TRIANGLE_FORMAT_BASE_SIZE_U_MASK				0x000f0000
-#define   NV04_DX6_MULTITEX_TRIANGLE_FORMAT_BASE_SIZE_V_SHIFT				20
-#define   NV04_DX6_MULTITEX_TRIANGLE_FORMAT_BASE_SIZE_V_MASK				0x00f00000
-#define   NV04_DX6_MULTITEX_TRIANGLE_FORMAT_ADDRESSU_SHIFT				24
-#define   NV04_DX6_MULTITEX_TRIANGLE_FORMAT_ADDRESSU_MASK				0x07000000
-#define   NV04_DX6_MULTITEX_TRIANGLE_FORMAT_WRAPU					(1 << 27)
-#define   NV04_DX6_MULTITEX_TRIANGLE_FORMAT_ADDRESSV_SHIFT				28
-#define   NV04_DX6_MULTITEX_TRIANGLE_FORMAT_ADDRESSV_MASK				0x70000000
-#define   NV04_DX6_MULTITEX_TRIANGLE_FORMAT_WRAPV					(1 << 31)
-#define  NV04_DX6_MULTITEX_TRIANGLE_FILTER(x)						(0x00000318+((x)*4))
-#define  NV04_DX6_MULTITEX_TRIANGLE_FILTER__SIZE					0x00000002
-#define   NV04_DX6_MULTITEX_TRIANGLE_FILTER_KERNEL_SIZE_X_SHIFT				0
-#define   NV04_DX6_MULTITEX_TRIANGLE_FILTER_KERNEL_SIZE_X_MASK				0x000000ff
-#define   NV04_DX6_MULTITEX_TRIANGLE_FILTER_KERNEL_SIZE_Y_SHIFT				8
-#define   NV04_DX6_MULTITEX_TRIANGLE_FILTER_KERNEL_SIZE_Y_MASK				0x00007f00
-#define   NV04_DX6_MULTITEX_TRIANGLE_FILTER_MIPMAP_DITHER_ENABLE			(1 << 15)
-#define   NV04_DX6_MULTITEX_TRIANGLE_FILTER_MIPMAP_LODBIAS_SHIFT			16
-#define   NV04_DX6_MULTITEX_TRIANGLE_FILTER_MIPMAP_LODBIAS_MASK				0x00ff0000
-#define   NV04_DX6_MULTITEX_TRIANGLE_FILTER_MINIFY_SHIFT				24
-#define   NV04_DX6_MULTITEX_TRIANGLE_FILTER_MINIFY_MASK					0x07000000
-#define   NV04_DX6_MULTITEX_TRIANGLE_FILTER_ANISOTROPIC_MINIFY_ENABLE			(1 << 27)
-#define   NV04_DX6_MULTITEX_TRIANGLE_FILTER_MAGNIFY_SHIFT				28
-#define   NV04_DX6_MULTITEX_TRIANGLE_FILTER_MAGNIFY_MASK				0x70000000
-#define   NV04_DX6_MULTITEX_TRIANGLE_FILTER_ANISOTROPIC_MAGNIFY_ENABLE			(1 << 31)
-#define  NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA					0x00000320
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_INVERSE0				(1 <<  0)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ALPHA0				(1 <<  1)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ARGUMENT0_SHIFT			2
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ARGUMENT0_MASK			0x000000fc
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_INVERSE1				(1 <<  8)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ALPHA1				(1 <<  9)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ARGUMENT1_SHIFT			10
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ARGUMENT1_MASK			0x0000fc00
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_INVERSE2				(1 << 16)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ALPHA2				(1 << 17)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ARGUMENT2_SHIFT			18
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ARGUMENT2_MASK			0x00fc0000
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_INVERSE3				(1 << 24)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ALPHA3				(1 << 25)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ARGUMENT3_SHIFT			26
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ARGUMENT3_MASK			0x1c000000
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_OPERATION_SHIFT			29
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_OPERATION_MASK			0xe0000000
-#define  NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR					0x00000324
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_INVERSE0				(1 <<  0)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ALPHA0				(1 <<  1)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ARGUMENT0_SHIFT			2
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ARGUMENT0_MASK			0x000000fc
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_INVERSE1				(1 <<  8)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ALPHA1				(1 <<  9)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ARGUMENT1_SHIFT			10
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ARGUMENT1_MASK			0x0000fc00
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_INVERSE2				(1 << 16)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ALPHA2				(1 << 17)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ARGUMENT2_SHIFT			18
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ARGUMENT2_MASK			0x00fc0000
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_INVERSE3				(1 << 24)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ALPHA3				(1 << 25)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ARGUMENT3_SHIFT			26
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ARGUMENT3_MASK			0x1c000000
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_OPERATION_SHIFT			29
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_OPERATION_MASK			0xe0000000
-#define  NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA					0x0000032c
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_INVERSE0				(1 <<  0)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ALPHA0				(1 <<  1)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ARGUMENT0_SHIFT			2
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ARGUMENT0_MASK			0x000000fc
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_INVERSE1				(1 <<  8)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ALPHA1				(1 <<  9)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ARGUMENT1_SHIFT			10
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ARGUMENT1_MASK			0x0000fc00
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_INVERSE2				(1 << 16)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ALPHA2				(1 << 17)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ARGUMENT2_SHIFT			18
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ARGUMENT2_MASK			0x00fc0000
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_INVERSE3				(1 << 24)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ALPHA3				(1 << 25)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ARGUMENT3_SHIFT			26
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ARGUMENT3_MASK			0x1c000000
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_OPERATION_SHIFT			29
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_OPERATION_MASK			0xe0000000
-#define  NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR					0x00000330
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_INVERSE0				(1 <<  0)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ALPHA0				(1 <<  1)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ARGUMENT0_SHIFT			2
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ARGUMENT0_MASK			0x000000fc
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_INVERSE1				(1 <<  8)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ALPHA1				(1 <<  9)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ARGUMENT1_SHIFT			10
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ARGUMENT1_MASK			0x0000fc00
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_INVERSE2				(1 << 16)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ALPHA2				(1 << 17)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ARGUMENT2_SHIFT			18
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ARGUMENT2_MASK			0x00fc0000
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_INVERSE3				(1 << 24)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ALPHA3				(1 << 25)
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ARGUMENT3_SHIFT			26
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ARGUMENT3_MASK			0x1c000000
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_OPERATION_SHIFT			29
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_OPERATION_MASK			0xe0000000
-#define  NV04_DX6_MULTITEX_TRIANGLE_COMBINE_FACTOR					0x00000334
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_FACTOR_B_SHIFT				0
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_FACTOR_B_MASK				0x000000ff
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_FACTOR_G_SHIFT				8
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_FACTOR_G_MASK				0x0000ff00
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_FACTOR_R_SHIFT				16
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_FACTOR_R_MASK				0x00ff0000
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_FACTOR_A_SHIFT				24
-#define   NV04_DX6_MULTITEX_TRIANGLE_COMBINE_FACTOR_A_MASK				0xff000000
-#define  NV04_DX6_MULTITEX_TRIANGLE_BLEND						0x00000338
-#define   NV04_DX6_MULTITEX_TRIANGLE_BLEND_MASK_BIT_SHIFT				4
-#define   NV04_DX6_MULTITEX_TRIANGLE_BLEND_MASK_BIT_MASK				0x00000030
-#define   NV04_DX6_MULTITEX_TRIANGLE_BLEND_SHADE_MODE_SHIFT				6
-#define   NV04_DX6_MULTITEX_TRIANGLE_BLEND_SHADE_MODE_MASK				0x000000c0
-#define   NV04_DX6_MULTITEX_TRIANGLE_BLEND_TEXTURE_PERSPECTIVE_ENABLE_SHIFT		8
-#define   NV04_DX6_MULTITEX_TRIANGLE_BLEND_TEXTURE_PERSPECTIVE_ENABLE_MASK		0x00000f00
-#define   NV04_DX6_MULTITEX_TRIANGLE_BLEND_SPECULAR_ENABLE_SHIFT			12
-#define   NV04_DX6_MULTITEX_TRIANGLE_BLEND_SPECULAR_ENABLE_MASK				0x0000f000
-#define   NV04_DX6_MULTITEX_TRIANGLE_BLEND_FOG_ENABLE_SHIFT				16
-#define   NV04_DX6_MULTITEX_TRIANGLE_BLEND_FOG_ENABLE_MASK				0x000f0000
-#define   NV04_DX6_MULTITEX_TRIANGLE_BLEND_ALPHA_ENABLE_SHIFT				20
-#define   NV04_DX6_MULTITEX_TRIANGLE_BLEND_ALPHA_ENABLE_MASK				0x00f00000
-#define   NV04_DX6_MULTITEX_TRIANGLE_BLEND_SRC_SHIFT					24
-#define   NV04_DX6_MULTITEX_TRIANGLE_BLEND_SRC_MASK					0x0f000000
-#define   NV04_DX6_MULTITEX_TRIANGLE_BLEND_DST_SHIFT					28
-#define   NV04_DX6_MULTITEX_TRIANGLE_BLEND_DST_MASK					0xf0000000
-#define  NV04_DX6_MULTITEX_TRIANGLE_CONTROL0						0x0000033c
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_ALPHA_REF_SHIFT				0
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_ALPHA_REF_MASK				0x000000ff
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_ALPHA_FUNC_SHIFT				8
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_ALPHA_FUNC_MASK				0x00000f00
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_ALPHA_TEST_ENABLE				(1 << 12)
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_ORIGIN					(1 << 13)
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_Z_ENABLE_SHIFT				14
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_Z_ENABLE_MASK				0x0000c000
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_Z_FUNC_SHIFT				16
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_Z_FUNC_MASK				0x000f0000
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_CULL_MODE_SHIFT				20
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_CULL_MODE_MASK				0x00300000
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_DITHER_ENABLE				(1 << 22)
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_Z_PERSPECTIVE_ENABLE			(1 << 23)
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_Z_WRITE_ENABLE				(1 << 24)
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_STENCIL_WRITE_ENABLE			(1 << 25)
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_ALPHA_WRITE_ENABLE			(1 << 26)
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_RED_WRITE_ENABLE				(1 << 27)
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_GREEN_WRITE_ENABLE			(1 << 28)
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_BLUE_WRITE_ENABLE				(1 << 29)
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_Z_FORMAT_SHIFT				30
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_Z_FORMAT_MASK				0xc0000000
-#define  NV04_DX6_MULTITEX_TRIANGLE_CONTROL1						0x00000340
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_TEST_ENABLE_SHIFT			0
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_TEST_ENABLE_MASK			0x0000000f
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_FUNC_SHIFT			4
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_FUNC_MASK				0x000000f0
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_REF_SHIFT				8
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_REF_MASK				0x0000ff00
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_MASK_READ_SHIFT			16
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_MASK_READ_MASK			0x00ff0000
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_MASK_WRITE_SHIFT			24
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_MASK_WRITE_MASK			0xff000000
-#define  NV04_DX6_MULTITEX_TRIANGLE_CONTROL2						0x00000344
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL2_STENCIL_OP_FAIL_SHIFT			0
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL2_STENCIL_OP_FAIL_MASK			0x0000000f
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL2_STENCIL_OP_ZFAIL_SHIFT			4
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL2_STENCIL_OP_ZFAIL_MASK			0x000000f0
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL2_STENCIL_OP_ZPASS_SHIFT			8
-#define   NV04_DX6_MULTITEX_TRIANGLE_CONTROL2_STENCIL_OP_ZPASS_MASK			0x00000f00
-#define  NV04_DX6_MULTITEX_TRIANGLE_FOGCOLOR						0x00000348
-#define   NV04_DX6_MULTITEX_TRIANGLE_FOGCOLOR_B_SHIFT					0
-#define   NV04_DX6_MULTITEX_TRIANGLE_FOGCOLOR_B_MASK					0x000000ff
-#define   NV04_DX6_MULTITEX_TRIANGLE_FOGCOLOR_G_SHIFT					8
-#define   NV04_DX6_MULTITEX_TRIANGLE_FOGCOLOR_G_MASK					0x0000ff00
-#define   NV04_DX6_MULTITEX_TRIANGLE_FOGCOLOR_R_SHIFT					16
-#define   NV04_DX6_MULTITEX_TRIANGLE_FOGCOLOR_R_MASK					0x00ff0000
-#define   NV04_DX6_MULTITEX_TRIANGLE_FOGCOLOR_A_SHIFT					24
-#define   NV04_DX6_MULTITEX_TRIANGLE_FOGCOLOR_A_MASK					0xff000000
-#define  NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SX(x)					(0x00000400+((x)*40))
-#define  NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SX__SIZE					0x00000008
-#define  NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SY(x)					(0x00000404+((x)*40))
-#define  NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SY__SIZE					0x00000008
-#define  NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SZ(x)					(0x00000408+((x)*40))
-#define  NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SZ__SIZE					0x00000008
-#define  NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_RHW(x)					(0x0000040c+((x)*40))
-#define  NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_RHW__SIZE				0x00000008
-#define  NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR(x)					(0x00000410+((x)*40))
-#define  NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR__SIZE				0x00000008
-#define   NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_B_SHIFT				0
-#define   NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_B_MASK				0x000000ff
-#define   NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_G_SHIFT				8
-#define   NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_G_MASK				0x0000ff00
-#define   NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_R_SHIFT				16
-#define   NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_R_MASK				0x00ff0000
-#define   NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_A_SHIFT				24
-#define   NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_A_MASK				0xff000000
-#define  NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR(x)				(0x00000414+((x)*40))
-#define  NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR__SIZE				0x00000008
-#define   NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_B_SHIFT			0
-#define   NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_B_MASK				0x000000ff
-#define   NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_G_SHIFT			8
-#define   NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_G_MASK				0x0000ff00
-#define   NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_R_SHIFT			16
-#define   NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_R_MASK				0x00ff0000
-#define   NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_FOG_SHIFT			24
-#define   NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_FOG_MASK			0xff000000
-#define  NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_TU0(x)					(0x00000418+((x)*40))
-#define  NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_TU0__SIZE				0x00000008
-#define  NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_TV0(x)					(0x0000041c+((x)*40))
-#define  NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_TV0__SIZE				0x00000008
-#define  NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_TU1(x)					(0x00000420+((x)*40))
-#define  NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_TU1__SIZE				0x00000008
-#define  NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_TV1(x)					(0x00000424+((x)*40))
-#define  NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_TV1__SIZE				0x00000008
-#define  NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE(x)				(0x00000540+((x)*4))
-#define  NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE__SIZE			0x00000030
-#define   NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I0_SHIFT			0
-#define   NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I0_MASK			0x0000000f
-#define   NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I1_SHIFT			4
-#define   NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I1_MASK			0x000000f0
-#define   NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I2_SHIFT			8
-#define   NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I2_MASK			0x00000f00
-#define   NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I3_SHIFT			12
-#define   NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I3_MASK			0x0000f000
-#define   NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I4_SHIFT			16
-#define   NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I4_MASK			0x000f0000
-#define   NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I5_SHIFT			20
-#define   NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I5_MASK			0x00f00000
-
-
-#define NV10_DX5_TEXTURED_TRIANGLE							0x00000094
-
-
-
-#define NV10TCL										0x00000056
-
-#define  NV10TCL_NOP									0x00000100
-#define  NV10TCL_NOTIFY									0x00000104
-#define  NV10TCL_DMA_NOTIFY								0x00000180
-#define  NV10TCL_DMA_IN_MEMORY0								0x00000184
-#define  NV10TCL_DMA_IN_MEMORY1								0x00000188
-#define  NV10TCL_DMA_VTXBUF0								0x0000018c
-#define  NV10TCL_DMA_IN_MEMORY2								0x00000194
-#define  NV10TCL_DMA_IN_MEMORY3								0x00000198
-#define  NV10TCL_RT_HORIZ								0x00000200
-#define   NV10TCL_RT_HORIZ_X_SHIFT							0
-#define   NV10TCL_RT_HORIZ_X_MASK							0x0000ffff
-#define   NV10TCL_RT_HORIZ_W_SHIFT							16
-#define   NV10TCL_RT_HORIZ_W_MASK							0xffff0000
-#define  NV10TCL_RT_VERT								0x00000204
-#define   NV10TCL_RT_VERT_Y_SHIFT							0
-#define   NV10TCL_RT_VERT_Y_MASK							0x0000ffff
-#define   NV10TCL_RT_VERT_H_SHIFT							16
-#define   NV10TCL_RT_VERT_H_MASK							0xffff0000
-#define  NV10TCL_RT_FORMAT								0x00000208
-#define   NV10TCL_RT_FORMAT_TYPE_SHIFT							8
-#define   NV10TCL_RT_FORMAT_TYPE_MASK							0x00000f00
-#define    NV10TCL_RT_FORMAT_TYPE_LINEAR						0x00000100
-#define    NV10TCL_RT_FORMAT_TYPE_SWIZZLED						0x00000200
-#define   NV10TCL_RT_FORMAT_COLOR_SHIFT							0
-#define   NV10TCL_RT_FORMAT_COLOR_MASK							0x0000001f
-#define    NV10TCL_RT_FORMAT_COLOR_R5G6B5						0x00000003
-#define    NV10TCL_RT_FORMAT_COLOR_X8R8G8B8						0x00000005
-#define    NV10TCL_RT_FORMAT_COLOR_A8R8G8B8						0x00000008
-#define    NV10TCL_RT_FORMAT_COLOR_B8							0x00000009
-#define    NV10TCL_RT_FORMAT_COLOR_UNKNOWN						0x0000000d
-#define    NV10TCL_RT_FORMAT_COLOR_X8B8G8R8						0x0000000f
-#define    NV10TCL_RT_FORMAT_COLOR_A8B8G8R8						0x00000010
-#define  NV10TCL_RT_PITCH								0x0000020c
-#define   NV10TCL_RT_PITCH_COLOR_PITCH_SHIFT						0
-#define   NV10TCL_RT_PITCH_COLOR_PITCH_MASK						0x0000ffff
-#define   NV10TCL_RT_PITCH_ZETA_PITCH_SHIFT						16
-#define   NV10TCL_RT_PITCH_ZETA_PITCH_MASK						0xffff0000
-#define  NV10TCL_COLOR_OFFSET								0x00000210
-#define  NV10TCL_ZETA_OFFSET								0x00000214
-#define  NV10TCL_TX_OFFSET(x)								(0x00000218+((x)*4))
-#define  NV10TCL_TX_OFFSET__SIZE							0x00000002
-#define  NV10TCL_TX_FORMAT(x)								(0x00000220+((x)*4))
-#define  NV10TCL_TX_FORMAT__SIZE							0x00000002
-#define   NV10TCL_TX_FORMAT_DMA0							(1 <<  0)
-#define   NV10TCL_TX_FORMAT_DMA1							(1 <<  1)
-#define   NV10TCL_TX_FORMAT_CUBE_MAP							(1 <<  2)
-#define   NV10TCL_TX_FORMAT_FORMAT_SHIFT						7
-#define   NV10TCL_TX_FORMAT_FORMAT_MASK							0x00000780
-#define    NV10TCL_TX_FORMAT_FORMAT_L8							0x00000000
-#define    NV10TCL_TX_FORMAT_FORMAT_A8							0x00000080
-#define    NV10TCL_TX_FORMAT_FORMAT_A1R5G5B5						0x00000100
-#define    NV10TCL_TX_FORMAT_FORMAT_A8_RECT						0x00000180
-#define    NV10TCL_TX_FORMAT_FORMAT_A4R4G4B4						0x00000200
-#define    NV10TCL_TX_FORMAT_FORMAT_R5G6B5						0x00000280
-#define    NV10TCL_TX_FORMAT_FORMAT_A8R8G8B8						0x00000300
-#define    NV10TCL_TX_FORMAT_FORMAT_X8R8G8B8						0x00000380
-#define    NV10TCL_TX_FORMAT_FORMAT_INDEX8						0x00000580
-#define    NV10TCL_TX_FORMAT_FORMAT_DXT1						0x00000600
-#define    NV10TCL_TX_FORMAT_FORMAT_DXT3						0x00000700
-#define    NV10TCL_TX_FORMAT_FORMAT_DXT5						0x00000780
-#define    NV10TCL_TX_FORMAT_FORMAT_A1R5G5B5_RECT					0x00000800
-#define    NV10TCL_TX_FORMAT_FORMAT_R5G6B5_RECT						0x00000880
-#define    NV10TCL_TX_FORMAT_FORMAT_A8R8G8B8_RECT					0x00000900
-#define    NV10TCL_TX_FORMAT_FORMAT_L8_RECT						0x00000980
-#define    NV10TCL_TX_FORMAT_FORMAT_A8L8						0x00000d00
-#define    NV10TCL_TX_FORMAT_FORMAT_A8_RECT2						0x00000d80
-#define    NV10TCL_TX_FORMAT_FORMAT_A4R4G4B4_RECT					0x00000e80
-#define    NV10TCL_TX_FORMAT_FORMAT_R8G8B8_RECT						0x00000f00
-#define    NV10TCL_TX_FORMAT_FORMAT_L8A8_RECT						0x00001000
-#define    NV10TCL_TX_FORMAT_FORMAT_DSDT						0x00001400
-#define    NV10TCL_TX_FORMAT_FORMAT_A16							0x00001900
-#define    NV10TCL_TX_FORMAT_FORMAT_HILO16						0x00001980
-#define    NV10TCL_TX_FORMAT_FORMAT_A16_RECT						0x00001a80
-#define    NV10TCL_TX_FORMAT_FORMAT_HILO16_RECT						0x00001b00
-#define    NV10TCL_TX_FORMAT_FORMAT_HILO8						0x00002200
-#define    NV10TCL_TX_FORMAT_FORMAT_SIGNED_HILO8					0x00002280
-#define    NV10TCL_TX_FORMAT_FORMAT_HILO8_RECT						0x00002300
-#define    NV10TCL_TX_FORMAT_FORMAT_SIGNED_HILO8_RECT					0x00002380
-#define    NV10TCL_TX_FORMAT_FORMAT_FLOAT_RGBA16_NV					0x00002500
-#define    NV10TCL_TX_FORMAT_FORMAT_FLOAT_RGBA32_NV					0x00002580
-#define    NV10TCL_TX_FORMAT_FORMAT_FLOAT_R32_NV					0x00002600
-#define   NV10TCL_TX_FORMAT_NPOT							(1 << 11)
-#define   NV10TCL_TX_FORMAT_MIPMAP							(1 << 15)
-#define   NV10TCL_TX_FORMAT_BASE_SIZE_U_SHIFT						16
-#define   NV10TCL_TX_FORMAT_BASE_SIZE_U_MASK						0x000f0000
-#define   NV10TCL_TX_FORMAT_BASE_SIZE_V_SHIFT						20
-#define   NV10TCL_TX_FORMAT_BASE_SIZE_V_MASK						0x00f00000
-#define   NV10TCL_TX_FORMAT_WRAP_S_SHIFT						24
-#define   NV10TCL_TX_FORMAT_WRAP_S_MASK							0x0f000000
-#define    NV10TCL_TX_FORMAT_WRAP_S_REPEAT						0x01000000
-#define    NV10TCL_TX_FORMAT_WRAP_S_MIRRORED_REPEAT					0x02000000
-#define    NV10TCL_TX_FORMAT_WRAP_S_CLAMP_TO_EDGE					0x03000000
-#define    NV10TCL_TX_FORMAT_WRAP_S_CLAMP_TO_BORDER					0x04000000
-#define    NV10TCL_TX_FORMAT_WRAP_S_CLAMP						0x05000000
-#define   NV10TCL_TX_FORMAT_WRAP_T_SHIFT						28
-#define   NV10TCL_TX_FORMAT_WRAP_T_MASK							0xf0000000
-#define    NV10TCL_TX_FORMAT_WRAP_T_REPEAT						0x10000000
-#define    NV10TCL_TX_FORMAT_WRAP_T_MIRRORED_REPEAT					0x20000000
-#define    NV10TCL_TX_FORMAT_WRAP_T_CLAMP_TO_EDGE					0x30000000
-#define    NV10TCL_TX_FORMAT_WRAP_T_CLAMP_TO_BORDER					0x40000000
-#define    NV10TCL_TX_FORMAT_WRAP_T_CLAMP						0x50000000
-#define  NV10TCL_TX_ENABLE(x)								(0x00000228+((x)*4))
-#define  NV10TCL_TX_ENABLE__SIZE							0x00000002
-#define   NV10TCL_TX_ENABLE_ANISOTROPY_SHIFT						4
-#define   NV10TCL_TX_ENABLE_ANISOTROPY_MASK						0x00000030
-#define   NV10TCL_TX_ENABLE_MIPMAP_MAX_LOD_SHIFT					14
-#define   NV10TCL_TX_ENABLE_MIPMAP_MAX_LOD_MASK						0x0003c000
-#define   NV10TCL_TX_ENABLE_MIPMAP_MIN_LOD_SHIFT					26
-#define   NV10TCL_TX_ENABLE_MIPMAP_MIN_LOD_MASK						0x3c000000
-#define   NV10TCL_TX_ENABLE_ENABLE							(1 << 30)
-#define  NV10TCL_TX_NPOT_PITCH(x)							(0x00000230+((x)*4))
-#define  NV10TCL_TX_NPOT_PITCH__SIZE							0x00000002
-#define   NV10TCL_TX_NPOT_PITCH_PITCH_SHIFT						16
-#define   NV10TCL_TX_NPOT_PITCH_PITCH_MASK						0xffff0000
-#define  NV10TCL_TX_NPOT_SIZE(x)							(0x00000240+((x)*4))
-#define  NV10TCL_TX_NPOT_SIZE__SIZE							0x00000002
-#define   NV10TCL_TX_NPOT_SIZE_H_SHIFT							0
-#define   NV10TCL_TX_NPOT_SIZE_H_MASK							0x0000ffff
-#define   NV10TCL_TX_NPOT_SIZE_W_SHIFT							16
-#define   NV10TCL_TX_NPOT_SIZE_W_MASK							0xffff0000
-#define  NV10TCL_TX_FILTER(x)								(0x00000248+((x)*4))
-#define  NV10TCL_TX_FILTER__SIZE							0x00000002
-#define   NV10TCL_TX_FILTER_LOD_BIAS_SHIFT						8
-#define   NV10TCL_TX_FILTER_LOD_BIAS_MASK						0x00000f00
-#define   NV10TCL_TX_FILTER_MINIFY_SHIFT						24
-#define   NV10TCL_TX_FILTER_MINIFY_MASK							0x0f000000
-#define    NV10TCL_TX_FILTER_MINIFY_NEAREST						0x01000000
-#define    NV10TCL_TX_FILTER_MINIFY_LINEAR						0x02000000
-#define    NV10TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST				0x03000000
-#define    NV10TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST				0x04000000
-#define    NV10TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR				0x05000000
-#define    NV10TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR				0x06000000
-#define   NV10TCL_TX_FILTER_MAGNIFY_SHIFT						28
-#define   NV10TCL_TX_FILTER_MAGNIFY_MASK						0xf0000000
-#define    NV10TCL_TX_FILTER_MAGNIFY_NEAREST						0x10000000
-#define    NV10TCL_TX_FILTER_MAGNIFY_LINEAR						0x20000000
-#define  NV10TCL_TX_PALETTE_OFFSET(x)							(0x00000250+((x)*4))
-#define  NV10TCL_TX_PALETTE_OFFSET__SIZE						0x00000002
-#define  NV10TCL_RC_IN_ALPHA(x)								(0x00000260+((x)*4))
-#define  NV10TCL_RC_IN_ALPHA__SIZE							0x00000002
-#define   NV10TCL_RC_IN_ALPHA_D_INPUT_SHIFT						0
-#define   NV10TCL_RC_IN_ALPHA_D_INPUT_MASK						0x0000000f
-#define    NV10TCL_RC_IN_ALPHA_D_INPUT_ZERO						0x00000000
-#define    NV10TCL_RC_IN_ALPHA_D_INPUT_CONSTANT_COLOR0_NV				0x00000001
-#define    NV10TCL_RC_IN_ALPHA_D_INPUT_CONSTANT_COLOR1_NV				0x00000002
-#define    NV10TCL_RC_IN_ALPHA_D_INPUT_FOG						0x00000003
-#define    NV10TCL_RC_IN_ALPHA_D_INPUT_PRIMARY_COLOR_NV					0x00000004
-#define    NV10TCL_RC_IN_ALPHA_D_INPUT_SECONDARY_COLOR_NV				0x00000005
-#define    NV10TCL_RC_IN_ALPHA_D_INPUT_TEXTURE0_ARB					0x00000008
-#define    NV10TCL_RC_IN_ALPHA_D_INPUT_TEXTURE1_ARB					0x00000009
-#define    NV10TCL_RC_IN_ALPHA_D_INPUT_SPARE0_NV					0x0000000c
-#define    NV10TCL_RC_IN_ALPHA_D_INPUT_SPARE1_NV					0x0000000d
-#define    NV10TCL_RC_IN_ALPHA_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x0000000e
-#define    NV10TCL_RC_IN_ALPHA_D_INPUT_E_TIMES_F_NV					0x0000000f
-#define   NV10TCL_RC_IN_ALPHA_D_COMPONENT_USAGE						(1 <<  4)
-#define    NV10TCL_RC_IN_ALPHA_D_COMPONENT_USAGE_BLUE					0x00000000
-#define    NV10TCL_RC_IN_ALPHA_D_COMPONENT_USAGE_ALPHA					0x00000010
-#define   NV10TCL_RC_IN_ALPHA_D_MAPPING_SHIFT						5
-#define   NV10TCL_RC_IN_ALPHA_D_MAPPING_MASK						0x000000e0
-#define    NV10TCL_RC_IN_ALPHA_D_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV10TCL_RC_IN_ALPHA_D_MAPPING_UNSIGNED_INVERT_NV				0x00000020
-#define    NV10TCL_RC_IN_ALPHA_D_MAPPING_EXPAND_NORMAL_NV				0x00000040
-#define    NV10TCL_RC_IN_ALPHA_D_MAPPING_EXPAND_NEGATE_NV				0x00000060
-#define    NV10TCL_RC_IN_ALPHA_D_MAPPING_HALF_BIAS_NORMAL_NV				0x00000080
-#define    NV10TCL_RC_IN_ALPHA_D_MAPPING_HALF_BIAS_NEGATE_NV				0x000000a0
-#define    NV10TCL_RC_IN_ALPHA_D_MAPPING_SIGNED_IDENTITY_NV				0x000000c0
-#define    NV10TCL_RC_IN_ALPHA_D_MAPPING_SIGNED_NEGATE_NV				0x000000e0
-#define   NV10TCL_RC_IN_ALPHA_C_INPUT_SHIFT						8
-#define   NV10TCL_RC_IN_ALPHA_C_INPUT_MASK						0x00000f00
-#define    NV10TCL_RC_IN_ALPHA_C_INPUT_ZERO						0x00000000
-#define    NV10TCL_RC_IN_ALPHA_C_INPUT_CONSTANT_COLOR0_NV				0x00000100
-#define    NV10TCL_RC_IN_ALPHA_C_INPUT_CONSTANT_COLOR1_NV				0x00000200
-#define    NV10TCL_RC_IN_ALPHA_C_INPUT_FOG						0x00000300
-#define    NV10TCL_RC_IN_ALPHA_C_INPUT_PRIMARY_COLOR_NV					0x00000400
-#define    NV10TCL_RC_IN_ALPHA_C_INPUT_SECONDARY_COLOR_NV				0x00000500
-#define    NV10TCL_RC_IN_ALPHA_C_INPUT_TEXTURE0_ARB					0x00000800
-#define    NV10TCL_RC_IN_ALPHA_C_INPUT_TEXTURE1_ARB					0x00000900
-#define    NV10TCL_RC_IN_ALPHA_C_INPUT_SPARE0_NV					0x00000c00
-#define    NV10TCL_RC_IN_ALPHA_C_INPUT_SPARE1_NV					0x00000d00
-#define    NV10TCL_RC_IN_ALPHA_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x00000e00
-#define    NV10TCL_RC_IN_ALPHA_C_INPUT_E_TIMES_F_NV					0x00000f00
-#define   NV10TCL_RC_IN_ALPHA_C_COMPONENT_USAGE						(1 << 12)
-#define    NV10TCL_RC_IN_ALPHA_C_COMPONENT_USAGE_BLUE					0x00000000
-#define    NV10TCL_RC_IN_ALPHA_C_COMPONENT_USAGE_ALPHA					0x00001000
-#define   NV10TCL_RC_IN_ALPHA_C_MAPPING_SHIFT						13
-#define   NV10TCL_RC_IN_ALPHA_C_MAPPING_MASK						0x0000e000
-#define    NV10TCL_RC_IN_ALPHA_C_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV10TCL_RC_IN_ALPHA_C_MAPPING_UNSIGNED_INVERT_NV				0x00002000
-#define    NV10TCL_RC_IN_ALPHA_C_MAPPING_EXPAND_NORMAL_NV				0x00004000
-#define    NV10TCL_RC_IN_ALPHA_C_MAPPING_EXPAND_NEGATE_NV				0x00006000
-#define    NV10TCL_RC_IN_ALPHA_C_MAPPING_HALF_BIAS_NORMAL_NV				0x00008000
-#define    NV10TCL_RC_IN_ALPHA_C_MAPPING_HALF_BIAS_NEGATE_NV				0x0000a000
-#define    NV10TCL_RC_IN_ALPHA_C_MAPPING_SIGNED_IDENTITY_NV				0x0000c000
-#define    NV10TCL_RC_IN_ALPHA_C_MAPPING_SIGNED_NEGATE_NV				0x0000e000
-#define   NV10TCL_RC_IN_ALPHA_B_INPUT_SHIFT						16
-#define   NV10TCL_RC_IN_ALPHA_B_INPUT_MASK						0x000f0000
-#define    NV10TCL_RC_IN_ALPHA_B_INPUT_ZERO						0x00000000
-#define    NV10TCL_RC_IN_ALPHA_B_INPUT_CONSTANT_COLOR0_NV				0x00010000
-#define    NV10TCL_RC_IN_ALPHA_B_INPUT_CONSTANT_COLOR1_NV				0x00020000
-#define    NV10TCL_RC_IN_ALPHA_B_INPUT_FOG						0x00030000
-#define    NV10TCL_RC_IN_ALPHA_B_INPUT_PRIMARY_COLOR_NV					0x00040000
-#define    NV10TCL_RC_IN_ALPHA_B_INPUT_SECONDARY_COLOR_NV				0x00050000
-#define    NV10TCL_RC_IN_ALPHA_B_INPUT_TEXTURE0_ARB					0x00080000
-#define    NV10TCL_RC_IN_ALPHA_B_INPUT_TEXTURE1_ARB					0x00090000
-#define    NV10TCL_RC_IN_ALPHA_B_INPUT_SPARE0_NV					0x000c0000
-#define    NV10TCL_RC_IN_ALPHA_B_INPUT_SPARE1_NV					0x000d0000
-#define    NV10TCL_RC_IN_ALPHA_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x000e0000
-#define    NV10TCL_RC_IN_ALPHA_B_INPUT_E_TIMES_F_NV					0x000f0000
-#define   NV10TCL_RC_IN_ALPHA_B_COMPONENT_USAGE						(1 << 20)
-#define    NV10TCL_RC_IN_ALPHA_B_COMPONENT_USAGE_BLUE					0x00000000
-#define    NV10TCL_RC_IN_ALPHA_B_COMPONENT_USAGE_ALPHA					0x00100000
-#define   NV10TCL_RC_IN_ALPHA_B_MAPPING_SHIFT						21
-#define   NV10TCL_RC_IN_ALPHA_B_MAPPING_MASK						0x00e00000
-#define    NV10TCL_RC_IN_ALPHA_B_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV10TCL_RC_IN_ALPHA_B_MAPPING_UNSIGNED_INVERT_NV				0x00200000
-#define    NV10TCL_RC_IN_ALPHA_B_MAPPING_EXPAND_NORMAL_NV				0x00400000
-#define    NV10TCL_RC_IN_ALPHA_B_MAPPING_EXPAND_NEGATE_NV				0x00600000
-#define    NV10TCL_RC_IN_ALPHA_B_MAPPING_HALF_BIAS_NORMAL_NV				0x00800000
-#define    NV10TCL_RC_IN_ALPHA_B_MAPPING_HALF_BIAS_NEGATE_NV				0x00a00000
-#define    NV10TCL_RC_IN_ALPHA_B_MAPPING_SIGNED_IDENTITY_NV				0x00c00000
-#define    NV10TCL_RC_IN_ALPHA_B_MAPPING_SIGNED_NEGATE_NV				0x00e00000
-#define   NV10TCL_RC_IN_ALPHA_A_INPUT_SHIFT						24
-#define   NV10TCL_RC_IN_ALPHA_A_INPUT_MASK						0x0f000000
-#define    NV10TCL_RC_IN_ALPHA_A_INPUT_ZERO						0x00000000
-#define    NV10TCL_RC_IN_ALPHA_A_INPUT_CONSTANT_COLOR0_NV				0x01000000
-#define    NV10TCL_RC_IN_ALPHA_A_INPUT_CONSTANT_COLOR1_NV				0x02000000
-#define    NV10TCL_RC_IN_ALPHA_A_INPUT_FOG						0x03000000
-#define    NV10TCL_RC_IN_ALPHA_A_INPUT_PRIMARY_COLOR_NV					0x04000000
-#define    NV10TCL_RC_IN_ALPHA_A_INPUT_SECONDARY_COLOR_NV				0x05000000
-#define    NV10TCL_RC_IN_ALPHA_A_INPUT_TEXTURE0_ARB					0x08000000
-#define    NV10TCL_RC_IN_ALPHA_A_INPUT_TEXTURE1_ARB					0x09000000
-#define    NV10TCL_RC_IN_ALPHA_A_INPUT_SPARE0_NV					0x0c000000
-#define    NV10TCL_RC_IN_ALPHA_A_INPUT_SPARE1_NV					0x0d000000
-#define    NV10TCL_RC_IN_ALPHA_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x0e000000
-#define    NV10TCL_RC_IN_ALPHA_A_INPUT_E_TIMES_F_NV					0x0f000000
-#define   NV10TCL_RC_IN_ALPHA_A_COMPONENT_USAGE						(1 << 28)
-#define    NV10TCL_RC_IN_ALPHA_A_COMPONENT_USAGE_BLUE					0x00000000
-#define    NV10TCL_RC_IN_ALPHA_A_COMPONENT_USAGE_ALPHA					0x10000000
-#define   NV10TCL_RC_IN_ALPHA_A_MAPPING_SHIFT						29
-#define   NV10TCL_RC_IN_ALPHA_A_MAPPING_MASK						0xe0000000
-#define    NV10TCL_RC_IN_ALPHA_A_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV10TCL_RC_IN_ALPHA_A_MAPPING_UNSIGNED_INVERT_NV				0x20000000
-#define    NV10TCL_RC_IN_ALPHA_A_MAPPING_EXPAND_NORMAL_NV				0x40000000
-#define    NV10TCL_RC_IN_ALPHA_A_MAPPING_EXPAND_NEGATE_NV				0x60000000
-#define    NV10TCL_RC_IN_ALPHA_A_MAPPING_HALF_BIAS_NORMAL_NV				0x80000000
-#define    NV10TCL_RC_IN_ALPHA_A_MAPPING_HALF_BIAS_NEGATE_NV				0xa0000000
-#define    NV10TCL_RC_IN_ALPHA_A_MAPPING_SIGNED_IDENTITY_NV				0xc0000000
-#define    NV10TCL_RC_IN_ALPHA_A_MAPPING_SIGNED_NEGATE_NV				0xe0000000
-#define  NV10TCL_RC_IN_RGB(x)								(0x00000268+((x)*4))
-#define  NV10TCL_RC_IN_RGB__SIZE							0x00000002
-#define   NV10TCL_RC_IN_RGB_D_INPUT_SHIFT						0
-#define   NV10TCL_RC_IN_RGB_D_INPUT_MASK						0x0000000f
-#define    NV10TCL_RC_IN_RGB_D_INPUT_ZERO						0x00000000
-#define    NV10TCL_RC_IN_RGB_D_INPUT_CONSTANT_COLOR0_NV					0x00000001
-#define    NV10TCL_RC_IN_RGB_D_INPUT_CONSTANT_COLOR1_NV					0x00000002
-#define    NV10TCL_RC_IN_RGB_D_INPUT_FOG						0x00000003
-#define    NV10TCL_RC_IN_RGB_D_INPUT_PRIMARY_COLOR_NV					0x00000004
-#define    NV10TCL_RC_IN_RGB_D_INPUT_SECONDARY_COLOR_NV					0x00000005
-#define    NV10TCL_RC_IN_RGB_D_INPUT_TEXTURE0_ARB					0x00000008
-#define    NV10TCL_RC_IN_RGB_D_INPUT_TEXTURE1_ARB					0x00000009
-#define    NV10TCL_RC_IN_RGB_D_INPUT_SPARE0_NV						0x0000000c
-#define    NV10TCL_RC_IN_RGB_D_INPUT_SPARE1_NV						0x0000000d
-#define    NV10TCL_RC_IN_RGB_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x0000000e
-#define    NV10TCL_RC_IN_RGB_D_INPUT_E_TIMES_F_NV					0x0000000f
-#define   NV10TCL_RC_IN_RGB_D_COMPONENT_USAGE						(1 <<  4)
-#define    NV10TCL_RC_IN_RGB_D_COMPONENT_USAGE_RGB					0x00000000
-#define    NV10TCL_RC_IN_RGB_D_COMPONENT_USAGE_ALPHA					0x00000010
-#define   NV10TCL_RC_IN_RGB_D_MAPPING_SHIFT						5
-#define   NV10TCL_RC_IN_RGB_D_MAPPING_MASK						0x000000e0
-#define    NV10TCL_RC_IN_RGB_D_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV10TCL_RC_IN_RGB_D_MAPPING_UNSIGNED_INVERT_NV				0x00000020
-#define    NV10TCL_RC_IN_RGB_D_MAPPING_EXPAND_NORMAL_NV					0x00000040
-#define    NV10TCL_RC_IN_RGB_D_MAPPING_EXPAND_NEGATE_NV					0x00000060
-#define    NV10TCL_RC_IN_RGB_D_MAPPING_HALF_BIAS_NORMAL_NV				0x00000080
-#define    NV10TCL_RC_IN_RGB_D_MAPPING_HALF_BIAS_NEGATE_NV				0x000000a0
-#define    NV10TCL_RC_IN_RGB_D_MAPPING_SIGNED_IDENTITY_NV				0x000000c0
-#define    NV10TCL_RC_IN_RGB_D_MAPPING_SIGNED_NEGATE_NV					0x000000e0
-#define   NV10TCL_RC_IN_RGB_C_INPUT_SHIFT						8
-#define   NV10TCL_RC_IN_RGB_C_INPUT_MASK						0x00000f00
-#define    NV10TCL_RC_IN_RGB_C_INPUT_ZERO						0x00000000
-#define    NV10TCL_RC_IN_RGB_C_INPUT_CONSTANT_COLOR0_NV					0x00000100
-#define    NV10TCL_RC_IN_RGB_C_INPUT_CONSTANT_COLOR1_NV					0x00000200
-#define    NV10TCL_RC_IN_RGB_C_INPUT_FOG						0x00000300
-#define    NV10TCL_RC_IN_RGB_C_INPUT_PRIMARY_COLOR_NV					0x00000400
-#define    NV10TCL_RC_IN_RGB_C_INPUT_SECONDARY_COLOR_NV					0x00000500
-#define    NV10TCL_RC_IN_RGB_C_INPUT_TEXTURE0_ARB					0x00000800
-#define    NV10TCL_RC_IN_RGB_C_INPUT_TEXTURE1_ARB					0x00000900
-#define    NV10TCL_RC_IN_RGB_C_INPUT_SPARE0_NV						0x00000c00
-#define    NV10TCL_RC_IN_RGB_C_INPUT_SPARE1_NV						0x00000d00
-#define    NV10TCL_RC_IN_RGB_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x00000e00
-#define    NV10TCL_RC_IN_RGB_C_INPUT_E_TIMES_F_NV					0x00000f00
-#define   NV10TCL_RC_IN_RGB_C_COMPONENT_USAGE						(1 << 12)
-#define    NV10TCL_RC_IN_RGB_C_COMPONENT_USAGE_RGB					0x00000000
-#define    NV10TCL_RC_IN_RGB_C_COMPONENT_USAGE_ALPHA					0x00001000
-#define   NV10TCL_RC_IN_RGB_C_MAPPING_SHIFT						13
-#define   NV10TCL_RC_IN_RGB_C_MAPPING_MASK						0x0000e000
-#define    NV10TCL_RC_IN_RGB_C_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV10TCL_RC_IN_RGB_C_MAPPING_UNSIGNED_INVERT_NV				0x00002000
-#define    NV10TCL_RC_IN_RGB_C_MAPPING_EXPAND_NORMAL_NV					0x00004000
-#define    NV10TCL_RC_IN_RGB_C_MAPPING_EXPAND_NEGATE_NV					0x00006000
-#define    NV10TCL_RC_IN_RGB_C_MAPPING_HALF_BIAS_NORMAL_NV				0x00008000
-#define    NV10TCL_RC_IN_RGB_C_MAPPING_HALF_BIAS_NEGATE_NV				0x0000a000
-#define    NV10TCL_RC_IN_RGB_C_MAPPING_SIGNED_IDENTITY_NV				0x0000c000
-#define    NV10TCL_RC_IN_RGB_C_MAPPING_SIGNED_NEGATE_NV					0x0000e000
-#define   NV10TCL_RC_IN_RGB_B_INPUT_SHIFT						16
-#define   NV10TCL_RC_IN_RGB_B_INPUT_MASK						0x000f0000
-#define    NV10TCL_RC_IN_RGB_B_INPUT_ZERO						0x00000000
-#define    NV10TCL_RC_IN_RGB_B_INPUT_CONSTANT_COLOR0_NV					0x00010000
-#define    NV10TCL_RC_IN_RGB_B_INPUT_CONSTANT_COLOR1_NV					0x00020000
-#define    NV10TCL_RC_IN_RGB_B_INPUT_FOG						0x00030000
-#define    NV10TCL_RC_IN_RGB_B_INPUT_PRIMARY_COLOR_NV					0x00040000
-#define    NV10TCL_RC_IN_RGB_B_INPUT_SECONDARY_COLOR_NV					0x00050000
-#define    NV10TCL_RC_IN_RGB_B_INPUT_TEXTURE0_ARB					0x00080000
-#define    NV10TCL_RC_IN_RGB_B_INPUT_TEXTURE1_ARB					0x00090000
-#define    NV10TCL_RC_IN_RGB_B_INPUT_SPARE0_NV						0x000c0000
-#define    NV10TCL_RC_IN_RGB_B_INPUT_SPARE1_NV						0x000d0000
-#define    NV10TCL_RC_IN_RGB_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x000e0000
-#define    NV10TCL_RC_IN_RGB_B_INPUT_E_TIMES_F_NV					0x000f0000
-#define   NV10TCL_RC_IN_RGB_B_COMPONENT_USAGE						(1 << 20)
-#define    NV10TCL_RC_IN_RGB_B_COMPONENT_USAGE_RGB					0x00000000
-#define    NV10TCL_RC_IN_RGB_B_COMPONENT_USAGE_ALPHA					0x00100000
-#define   NV10TCL_RC_IN_RGB_B_MAPPING_SHIFT						21
-#define   NV10TCL_RC_IN_RGB_B_MAPPING_MASK						0x00e00000
-#define    NV10TCL_RC_IN_RGB_B_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV10TCL_RC_IN_RGB_B_MAPPING_UNSIGNED_INVERT_NV				0x00200000
-#define    NV10TCL_RC_IN_RGB_B_MAPPING_EXPAND_NORMAL_NV					0x00400000
-#define    NV10TCL_RC_IN_RGB_B_MAPPING_EXPAND_NEGATE_NV					0x00600000
-#define    NV10TCL_RC_IN_RGB_B_MAPPING_HALF_BIAS_NORMAL_NV				0x00800000
-#define    NV10TCL_RC_IN_RGB_B_MAPPING_HALF_BIAS_NEGATE_NV				0x00a00000
-#define    NV10TCL_RC_IN_RGB_B_MAPPING_SIGNED_IDENTITY_NV				0x00c00000
-#define    NV10TCL_RC_IN_RGB_B_MAPPING_SIGNED_NEGATE_NV					0x00e00000
-#define   NV10TCL_RC_IN_RGB_A_INPUT_SHIFT						24
-#define   NV10TCL_RC_IN_RGB_A_INPUT_MASK						0x0f000000
-#define    NV10TCL_RC_IN_RGB_A_INPUT_ZERO						0x00000000
-#define    NV10TCL_RC_IN_RGB_A_INPUT_CONSTANT_COLOR0_NV					0x01000000
-#define    NV10TCL_RC_IN_RGB_A_INPUT_CONSTANT_COLOR1_NV					0x02000000
-#define    NV10TCL_RC_IN_RGB_A_INPUT_FOG						0x03000000
-#define    NV10TCL_RC_IN_RGB_A_INPUT_PRIMARY_COLOR_NV					0x04000000
-#define    NV10TCL_RC_IN_RGB_A_INPUT_SECONDARY_COLOR_NV					0x05000000
-#define    NV10TCL_RC_IN_RGB_A_INPUT_TEXTURE0_ARB					0x08000000
-#define    NV10TCL_RC_IN_RGB_A_INPUT_TEXTURE1_ARB					0x09000000
-#define    NV10TCL_RC_IN_RGB_A_INPUT_SPARE0_NV						0x0c000000
-#define    NV10TCL_RC_IN_RGB_A_INPUT_SPARE1_NV						0x0d000000
-#define    NV10TCL_RC_IN_RGB_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x0e000000
-#define    NV10TCL_RC_IN_RGB_A_INPUT_E_TIMES_F_NV					0x0f000000
-#define   NV10TCL_RC_IN_RGB_A_COMPONENT_USAGE						(1 << 28)
-#define    NV10TCL_RC_IN_RGB_A_COMPONENT_USAGE_RGB					0x00000000
-#define    NV10TCL_RC_IN_RGB_A_COMPONENT_USAGE_ALPHA					0x10000000
-#define   NV10TCL_RC_IN_RGB_A_MAPPING_SHIFT						29
-#define   NV10TCL_RC_IN_RGB_A_MAPPING_MASK						0xe0000000
-#define    NV10TCL_RC_IN_RGB_A_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV10TCL_RC_IN_RGB_A_MAPPING_UNSIGNED_INVERT_NV				0x20000000
-#define    NV10TCL_RC_IN_RGB_A_MAPPING_EXPAND_NORMAL_NV					0x40000000
-#define    NV10TCL_RC_IN_RGB_A_MAPPING_EXPAND_NEGATE_NV					0x60000000
-#define    NV10TCL_RC_IN_RGB_A_MAPPING_HALF_BIAS_NORMAL_NV				0x80000000
-#define    NV10TCL_RC_IN_RGB_A_MAPPING_HALF_BIAS_NEGATE_NV				0xa0000000
-#define    NV10TCL_RC_IN_RGB_A_MAPPING_SIGNED_IDENTITY_NV				0xc0000000
-#define    NV10TCL_RC_IN_RGB_A_MAPPING_SIGNED_NEGATE_NV					0xe0000000
-#define  NV10TCL_RC_COLOR(x)								(0x00000270+((x)*4))
-#define  NV10TCL_RC_COLOR__SIZE								0x00000002
-#define   NV10TCL_RC_COLOR_B_SHIFT							0
-#define   NV10TCL_RC_COLOR_B_MASK							0x000000ff
-#define   NV10TCL_RC_COLOR_G_SHIFT							8
-#define   NV10TCL_RC_COLOR_G_MASK							0x0000ff00
-#define   NV10TCL_RC_COLOR_R_SHIFT							16
-#define   NV10TCL_RC_COLOR_R_MASK							0x00ff0000
-#define   NV10TCL_RC_COLOR_A_SHIFT							24
-#define   NV10TCL_RC_COLOR_A_MASK							0xff000000
-#define  NV10TCL_RC_OUT_ALPHA(x)							(0x00000278+((x)*4))
-#define  NV10TCL_RC_OUT_ALPHA__SIZE							0x00000002
-#define   NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_SHIFT						0
-#define   NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_MASK						0x0000000f
-#define    NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_ZERO						0x00000000
-#define    NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_CONSTANT_COLOR0_NV				0x00000001
-#define    NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_CONSTANT_COLOR1_NV				0x00000002
-#define    NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_FOG						0x00000003
-#define    NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_PRIMARY_COLOR_NV				0x00000004
-#define    NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_SECONDARY_COLOR_NV				0x00000005
-#define    NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE0_ARB					0x00000008
-#define    NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE1_ARB					0x00000009
-#define    NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE0_NV					0x0000000c
-#define    NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE1_NV					0x0000000d
-#define    NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV		0x0000000e
-#define    NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_E_TIMES_F_NV					0x0000000f
-#define   NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_SHIFT						4
-#define   NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_MASK						0x000000f0
-#define    NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_ZERO						0x00000000
-#define    NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_CONSTANT_COLOR0_NV				0x00000010
-#define    NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_CONSTANT_COLOR1_NV				0x00000020
-#define    NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_FOG						0x00000030
-#define    NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_PRIMARY_COLOR_NV				0x00000040
-#define    NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_SECONDARY_COLOR_NV				0x00000050
-#define    NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE0_ARB					0x00000080
-#define    NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE1_ARB					0x00000090
-#define    NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE0_NV					0x000000c0
-#define    NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE1_NV					0x000000d0
-#define    NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV		0x000000e0
-#define    NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_E_TIMES_F_NV					0x000000f0
-#define   NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_SHIFT						8
-#define   NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_MASK						0x00000f00
-#define    NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_ZERO						0x00000000
-#define    NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_CONSTANT_COLOR0_NV				0x00000100
-#define    NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_CONSTANT_COLOR1_NV				0x00000200
-#define    NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_FOG						0x00000300
-#define    NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_PRIMARY_COLOR_NV				0x00000400
-#define    NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_SECONDARY_COLOR_NV				0x00000500
-#define    NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE0_ARB					0x00000800
-#define    NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE1_ARB					0x00000900
-#define    NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE0_NV					0x00000c00
-#define    NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE1_NV					0x00000d00
-#define    NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV		0x00000e00
-#define    NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_E_TIMES_F_NV					0x00000f00
-#define   NV10TCL_RC_OUT_ALPHA_CD_DOT_PRODUCT						(1 << 12)
-#define   NV10TCL_RC_OUT_ALPHA_AB_DOT_PRODUCT						(1 << 13)
-#define   NV10TCL_RC_OUT_ALPHA_MUX_SUM							(1 << 14)
-#define   NV10TCL_RC_OUT_ALPHA_BIAS							(1 << 15)
-#define    NV10TCL_RC_OUT_ALPHA_BIAS_NONE						0x00000000
-#define    NV10TCL_RC_OUT_ALPHA_BIAS_BIAS_BY_NEGATIVE_ONE_HALF_NV			0x00008000
-#define   NV10TCL_RC_OUT_ALPHA_SCALE_SHIFT						17
-#define   NV10TCL_RC_OUT_ALPHA_SCALE_MASK						0x00000000
-#define    NV10TCL_RC_OUT_ALPHA_SCALE_NONE						0x00000000
-#define    NV10TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_TWO_NV					0x00020000
-#define    NV10TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_FOUR_NV					0x00040000
-#define    NV10TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_ONE_HALF_NV				0x00060000
-#define  NV10TCL_RC_OUT_RGB(x)								(0x00000280+((x)*4))
-#define  NV10TCL_RC_OUT_RGB__SIZE							0x00000002
-#define   NV10TCL_RC_OUT_RGB_CD_OUTPUT_SHIFT						0
-#define   NV10TCL_RC_OUT_RGB_CD_OUTPUT_MASK						0x0000000f
-#define    NV10TCL_RC_OUT_RGB_CD_OUTPUT_ZERO						0x00000000
-#define    NV10TCL_RC_OUT_RGB_CD_OUTPUT_CONSTANT_COLOR0_NV				0x00000001
-#define    NV10TCL_RC_OUT_RGB_CD_OUTPUT_CONSTANT_COLOR1_NV				0x00000002
-#define    NV10TCL_RC_OUT_RGB_CD_OUTPUT_FOG						0x00000003
-#define    NV10TCL_RC_OUT_RGB_CD_OUTPUT_PRIMARY_COLOR_NV				0x00000004
-#define    NV10TCL_RC_OUT_RGB_CD_OUTPUT_SECONDARY_COLOR_NV				0x00000005
-#define    NV10TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE0_ARB					0x00000008
-#define    NV10TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE1_ARB					0x00000009
-#define    NV10TCL_RC_OUT_RGB_CD_OUTPUT_SPARE0_NV					0x0000000c
-#define    NV10TCL_RC_OUT_RGB_CD_OUTPUT_SPARE1_NV					0x0000000d
-#define    NV10TCL_RC_OUT_RGB_CD_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x0000000e
-#define    NV10TCL_RC_OUT_RGB_CD_OUTPUT_E_TIMES_F_NV					0x0000000f
-#define   NV10TCL_RC_OUT_RGB_AB_OUTPUT_SHIFT						4
-#define   NV10TCL_RC_OUT_RGB_AB_OUTPUT_MASK						0x000000f0
-#define    NV10TCL_RC_OUT_RGB_AB_OUTPUT_ZERO						0x00000000
-#define    NV10TCL_RC_OUT_RGB_AB_OUTPUT_CONSTANT_COLOR0_NV				0x00000010
-#define    NV10TCL_RC_OUT_RGB_AB_OUTPUT_CONSTANT_COLOR1_NV				0x00000020
-#define    NV10TCL_RC_OUT_RGB_AB_OUTPUT_FOG						0x00000030
-#define    NV10TCL_RC_OUT_RGB_AB_OUTPUT_PRIMARY_COLOR_NV				0x00000040
-#define    NV10TCL_RC_OUT_RGB_AB_OUTPUT_SECONDARY_COLOR_NV				0x00000050
-#define    NV10TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE0_ARB					0x00000080
-#define    NV10TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE1_ARB					0x00000090
-#define    NV10TCL_RC_OUT_RGB_AB_OUTPUT_SPARE0_NV					0x000000c0
-#define    NV10TCL_RC_OUT_RGB_AB_OUTPUT_SPARE1_NV					0x000000d0
-#define    NV10TCL_RC_OUT_RGB_AB_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x000000e0
-#define    NV10TCL_RC_OUT_RGB_AB_OUTPUT_E_TIMES_F_NV					0x000000f0
-#define   NV10TCL_RC_OUT_RGB_SUM_OUTPUT_SHIFT						8
-#define   NV10TCL_RC_OUT_RGB_SUM_OUTPUT_MASK						0x00000f00
-#define    NV10TCL_RC_OUT_RGB_SUM_OUTPUT_ZERO						0x00000000
-#define    NV10TCL_RC_OUT_RGB_SUM_OUTPUT_CONSTANT_COLOR0_NV				0x00000100
-#define    NV10TCL_RC_OUT_RGB_SUM_OUTPUT_CONSTANT_COLOR1_NV				0x00000200
-#define    NV10TCL_RC_OUT_RGB_SUM_OUTPUT_FOG						0x00000300
-#define    NV10TCL_RC_OUT_RGB_SUM_OUTPUT_PRIMARY_COLOR_NV				0x00000400
-#define    NV10TCL_RC_OUT_RGB_SUM_OUTPUT_SECONDARY_COLOR_NV				0x00000500
-#define    NV10TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE0_ARB					0x00000800
-#define    NV10TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE1_ARB					0x00000900
-#define    NV10TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE0_NV					0x00000c00
-#define    NV10TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE1_NV					0x00000d00
-#define    NV10TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x00000e00
-#define    NV10TCL_RC_OUT_RGB_SUM_OUTPUT_E_TIMES_F_NV					0x00000f00
-#define   NV10TCL_RC_OUT_RGB_CD_DOT_PRODUCT						(1 << 12)
-#define   NV10TCL_RC_OUT_RGB_AB_DOT_PRODUCT						(1 << 13)
-#define   NV10TCL_RC_OUT_RGB_MUX_SUM							(1 << 14)
-#define   NV10TCL_RC_OUT_RGB_BIAS							(1 << 15)
-#define    NV10TCL_RC_OUT_RGB_BIAS_NONE							0x00000000
-#define    NV10TCL_RC_OUT_RGB_BIAS_BIAS_BY_NEGATIVE_ONE_HALF_NV				0x00008000
-#define   NV10TCL_RC_OUT_RGB_SCALE_SHIFT						17
-#define   NV10TCL_RC_OUT_RGB_SCALE_MASK							0x00000000
-#define    NV10TCL_RC_OUT_RGB_SCALE_NONE						0x00000000
-#define    NV10TCL_RC_OUT_RGB_SCALE_SCALE_BY_TWO_NV					0x00020000
-#define    NV10TCL_RC_OUT_RGB_SCALE_SCALE_BY_FOUR_NV					0x00040000
-#define    NV10TCL_RC_OUT_RGB_SCALE_SCALE_BY_ONE_HALF_NV				0x00060000
-#define   NV10TCL_RC_OUT_RGB_OPERATION_SHIFT						27
-#define   NV10TCL_RC_OUT_RGB_OPERATION_MASK						0x38000000
-#define  NV10TCL_RC_FINAL0								0x00000288
-#define   NV10TCL_RC_FINAL0_D_INPUT_SHIFT						0
-#define   NV10TCL_RC_FINAL0_D_INPUT_MASK						0x0000000f
-#define    NV10TCL_RC_FINAL0_D_INPUT_ZERO						0x00000000
-#define    NV10TCL_RC_FINAL0_D_INPUT_CONSTANT_COLOR0_NV					0x00000001
-#define    NV10TCL_RC_FINAL0_D_INPUT_CONSTANT_COLOR1_NV					0x00000002
-#define    NV10TCL_RC_FINAL0_D_INPUT_FOG						0x00000003
-#define    NV10TCL_RC_FINAL0_D_INPUT_PRIMARY_COLOR_NV					0x00000004
-#define    NV10TCL_RC_FINAL0_D_INPUT_SECONDARY_COLOR_NV					0x00000005
-#define    NV10TCL_RC_FINAL0_D_INPUT_TEXTURE0_ARB					0x00000008
-#define    NV10TCL_RC_FINAL0_D_INPUT_TEXTURE1_ARB					0x00000009
-#define    NV10TCL_RC_FINAL0_D_INPUT_SPARE0_NV						0x0000000c
-#define    NV10TCL_RC_FINAL0_D_INPUT_SPARE1_NV						0x0000000d
-#define    NV10TCL_RC_FINAL0_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x0000000e
-#define    NV10TCL_RC_FINAL0_D_INPUT_E_TIMES_F_NV					0x0000000f
-#define   NV10TCL_RC_FINAL0_D_COMPONENT_USAGE						(1 <<  4)
-#define    NV10TCL_RC_FINAL0_D_COMPONENT_USAGE_RGB					0x00000000
-#define    NV10TCL_RC_FINAL0_D_COMPONENT_USAGE_ALPHA					0x00000010
-#define   NV10TCL_RC_FINAL0_D_MAPPING_SHIFT						5
-#define   NV10TCL_RC_FINAL0_D_MAPPING_MASK						0x000000e0
-#define    NV10TCL_RC_FINAL0_D_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV10TCL_RC_FINAL0_D_MAPPING_UNSIGNED_INVERT_NV				0x00000020
-#define    NV10TCL_RC_FINAL0_D_MAPPING_EXPAND_NORMAL_NV					0x00000040
-#define    NV10TCL_RC_FINAL0_D_MAPPING_EXPAND_NEGATE_NV					0x00000060
-#define    NV10TCL_RC_FINAL0_D_MAPPING_HALF_BIAS_NORMAL_NV				0x00000080
-#define    NV10TCL_RC_FINAL0_D_MAPPING_HALF_BIAS_NEGATE_NV				0x000000a0
-#define    NV10TCL_RC_FINAL0_D_MAPPING_SIGNED_IDENTITY_NV				0x000000c0
-#define    NV10TCL_RC_FINAL0_D_MAPPING_SIGNED_NEGATE_NV					0x000000e0
-#define   NV10TCL_RC_FINAL0_C_INPUT_SHIFT						8
-#define   NV10TCL_RC_FINAL0_C_INPUT_MASK						0x00000f00
-#define    NV10TCL_RC_FINAL0_C_INPUT_ZERO						0x00000000
-#define    NV10TCL_RC_FINAL0_C_INPUT_CONSTANT_COLOR0_NV					0x00000100
-#define    NV10TCL_RC_FINAL0_C_INPUT_CONSTANT_COLOR1_NV					0x00000200
-#define    NV10TCL_RC_FINAL0_C_INPUT_FOG						0x00000300
-#define    NV10TCL_RC_FINAL0_C_INPUT_PRIMARY_COLOR_NV					0x00000400
-#define    NV10TCL_RC_FINAL0_C_INPUT_SECONDARY_COLOR_NV					0x00000500
-#define    NV10TCL_RC_FINAL0_C_INPUT_TEXTURE0_ARB					0x00000800
-#define    NV10TCL_RC_FINAL0_C_INPUT_TEXTURE1_ARB					0x00000900
-#define    NV10TCL_RC_FINAL0_C_INPUT_SPARE0_NV						0x00000c00
-#define    NV10TCL_RC_FINAL0_C_INPUT_SPARE1_NV						0x00000d00
-#define    NV10TCL_RC_FINAL0_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x00000e00
-#define    NV10TCL_RC_FINAL0_C_INPUT_E_TIMES_F_NV					0x00000f00
-#define   NV10TCL_RC_FINAL0_C_COMPONENT_USAGE						(1 << 12)
-#define    NV10TCL_RC_FINAL0_C_COMPONENT_USAGE_RGB					0x00000000
-#define    NV10TCL_RC_FINAL0_C_COMPONENT_USAGE_ALPHA					0x00001000
-#define   NV10TCL_RC_FINAL0_C_MAPPING_SHIFT						13
-#define   NV10TCL_RC_FINAL0_C_MAPPING_MASK						0x0000e000
-#define    NV10TCL_RC_FINAL0_C_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV10TCL_RC_FINAL0_C_MAPPING_UNSIGNED_INVERT_NV				0x00002000
-#define    NV10TCL_RC_FINAL0_C_MAPPING_EXPAND_NORMAL_NV					0x00004000
-#define    NV10TCL_RC_FINAL0_C_MAPPING_EXPAND_NEGATE_NV					0x00006000
-#define    NV10TCL_RC_FINAL0_C_MAPPING_HALF_BIAS_NORMAL_NV				0x00008000
-#define    NV10TCL_RC_FINAL0_C_MAPPING_HALF_BIAS_NEGATE_NV				0x0000a000
-#define    NV10TCL_RC_FINAL0_C_MAPPING_SIGNED_IDENTITY_NV				0x0000c000
-#define    NV10TCL_RC_FINAL0_C_MAPPING_SIGNED_NEGATE_NV					0x0000e000
-#define   NV10TCL_RC_FINAL0_B_INPUT_SHIFT						16
-#define   NV10TCL_RC_FINAL0_B_INPUT_MASK						0x000f0000
-#define    NV10TCL_RC_FINAL0_B_INPUT_ZERO						0x00000000
-#define    NV10TCL_RC_FINAL0_B_INPUT_CONSTANT_COLOR0_NV					0x00010000
-#define    NV10TCL_RC_FINAL0_B_INPUT_CONSTANT_COLOR1_NV					0x00020000
-#define    NV10TCL_RC_FINAL0_B_INPUT_FOG						0x00030000
-#define    NV10TCL_RC_FINAL0_B_INPUT_PRIMARY_COLOR_NV					0x00040000
-#define    NV10TCL_RC_FINAL0_B_INPUT_SECONDARY_COLOR_NV					0x00050000
-#define    NV10TCL_RC_FINAL0_B_INPUT_TEXTURE0_ARB					0x00080000
-#define    NV10TCL_RC_FINAL0_B_INPUT_TEXTURE1_ARB					0x00090000
-#define    NV10TCL_RC_FINAL0_B_INPUT_SPARE0_NV						0x000c0000
-#define    NV10TCL_RC_FINAL0_B_INPUT_SPARE1_NV						0x000d0000
-#define    NV10TCL_RC_FINAL0_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x000e0000
-#define    NV10TCL_RC_FINAL0_B_INPUT_E_TIMES_F_NV					0x000f0000
-#define   NV10TCL_RC_FINAL0_B_COMPONENT_USAGE						(1 << 20)
-#define    NV10TCL_RC_FINAL0_B_COMPONENT_USAGE_RGB					0x00000000
-#define    NV10TCL_RC_FINAL0_B_COMPONENT_USAGE_ALPHA					0x00100000
-#define   NV10TCL_RC_FINAL0_B_MAPPING_SHIFT						21
-#define   NV10TCL_RC_FINAL0_B_MAPPING_MASK						0x00e00000
-#define    NV10TCL_RC_FINAL0_B_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV10TCL_RC_FINAL0_B_MAPPING_UNSIGNED_INVERT_NV				0x00200000
-#define    NV10TCL_RC_FINAL0_B_MAPPING_EXPAND_NORMAL_NV					0x00400000
-#define    NV10TCL_RC_FINAL0_B_MAPPING_EXPAND_NEGATE_NV					0x00600000
-#define    NV10TCL_RC_FINAL0_B_MAPPING_HALF_BIAS_NORMAL_NV				0x00800000
-#define    NV10TCL_RC_FINAL0_B_MAPPING_HALF_BIAS_NEGATE_NV				0x00a00000
-#define    NV10TCL_RC_FINAL0_B_MAPPING_SIGNED_IDENTITY_NV				0x00c00000
-#define    NV10TCL_RC_FINAL0_B_MAPPING_SIGNED_NEGATE_NV					0x00e00000
-#define   NV10TCL_RC_FINAL0_A_INPUT_SHIFT						24
-#define   NV10TCL_RC_FINAL0_A_INPUT_MASK						0x0f000000
-#define    NV10TCL_RC_FINAL0_A_INPUT_ZERO						0x00000000
-#define    NV10TCL_RC_FINAL0_A_INPUT_CONSTANT_COLOR0_NV					0x01000000
-#define    NV10TCL_RC_FINAL0_A_INPUT_CONSTANT_COLOR1_NV					0x02000000
-#define    NV10TCL_RC_FINAL0_A_INPUT_FOG						0x03000000
-#define    NV10TCL_RC_FINAL0_A_INPUT_PRIMARY_COLOR_NV					0x04000000
-#define    NV10TCL_RC_FINAL0_A_INPUT_SECONDARY_COLOR_NV					0x05000000
-#define    NV10TCL_RC_FINAL0_A_INPUT_TEXTURE0_ARB					0x08000000
-#define    NV10TCL_RC_FINAL0_A_INPUT_TEXTURE1_ARB					0x09000000
-#define    NV10TCL_RC_FINAL0_A_INPUT_SPARE0_NV						0x0c000000
-#define    NV10TCL_RC_FINAL0_A_INPUT_SPARE1_NV						0x0d000000
-#define    NV10TCL_RC_FINAL0_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x0e000000
-#define    NV10TCL_RC_FINAL0_A_INPUT_E_TIMES_F_NV					0x0f000000
-#define   NV10TCL_RC_FINAL0_A_COMPONENT_USAGE						(1 << 28)
-#define    NV10TCL_RC_FINAL0_A_COMPONENT_USAGE_RGB					0x00000000
-#define    NV10TCL_RC_FINAL0_A_COMPONENT_USAGE_ALPHA					0x10000000
-#define   NV10TCL_RC_FINAL0_A_MAPPING_SHIFT						29
-#define   NV10TCL_RC_FINAL0_A_MAPPING_MASK						0xe0000000
-#define    NV10TCL_RC_FINAL0_A_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV10TCL_RC_FINAL0_A_MAPPING_UNSIGNED_INVERT_NV				0x20000000
-#define    NV10TCL_RC_FINAL0_A_MAPPING_EXPAND_NORMAL_NV					0x40000000
-#define    NV10TCL_RC_FINAL0_A_MAPPING_EXPAND_NEGATE_NV					0x60000000
-#define    NV10TCL_RC_FINAL0_A_MAPPING_HALF_BIAS_NORMAL_NV				0x80000000
-#define    NV10TCL_RC_FINAL0_A_MAPPING_HALF_BIAS_NEGATE_NV				0xa0000000
-#define    NV10TCL_RC_FINAL0_A_MAPPING_SIGNED_IDENTITY_NV				0xc0000000
-#define    NV10TCL_RC_FINAL0_A_MAPPING_SIGNED_NEGATE_NV					0xe0000000
-#define  NV10TCL_RC_FINAL1								0x0000028c
-#define   NV10TCL_RC_FINAL1_COLOR_SUM_CLAMP						(1 <<  7)
-#define   NV10TCL_RC_FINAL1_G_INPUT_SHIFT						8
-#define   NV10TCL_RC_FINAL1_G_INPUT_MASK						0x00000f00
-#define    NV10TCL_RC_FINAL1_G_INPUT_ZERO						0x00000000
-#define    NV10TCL_RC_FINAL1_G_INPUT_CONSTANT_COLOR0_NV					0x00000100
-#define    NV10TCL_RC_FINAL1_G_INPUT_CONSTANT_COLOR1_NV					0x00000200
-#define    NV10TCL_RC_FINAL1_G_INPUT_FOG						0x00000300
-#define    NV10TCL_RC_FINAL1_G_INPUT_PRIMARY_COLOR_NV					0x00000400
-#define    NV10TCL_RC_FINAL1_G_INPUT_SECONDARY_COLOR_NV					0x00000500
-#define    NV10TCL_RC_FINAL1_G_INPUT_TEXTURE0_ARB					0x00000800
-#define    NV10TCL_RC_FINAL1_G_INPUT_TEXTURE1_ARB					0x00000900
-#define    NV10TCL_RC_FINAL1_G_INPUT_SPARE0_NV						0x00000c00
-#define    NV10TCL_RC_FINAL1_G_INPUT_SPARE1_NV						0x00000d00
-#define    NV10TCL_RC_FINAL1_G_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x00000e00
-#define    NV10TCL_RC_FINAL1_G_INPUT_E_TIMES_F_NV					0x00000f00
-#define   NV10TCL_RC_FINAL1_G_COMPONENT_USAGE						(1 << 12)
-#define    NV10TCL_RC_FINAL1_G_COMPONENT_USAGE_RGB					0x00000000
-#define    NV10TCL_RC_FINAL1_G_COMPONENT_USAGE_ALPHA					0x00001000
-#define   NV10TCL_RC_FINAL1_G_MAPPING_SHIFT						13
-#define   NV10TCL_RC_FINAL1_G_MAPPING_MASK						0x0000e000
-#define    NV10TCL_RC_FINAL1_G_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV10TCL_RC_FINAL1_G_MAPPING_UNSIGNED_INVERT_NV				0x00002000
-#define    NV10TCL_RC_FINAL1_G_MAPPING_EXPAND_NORMAL_NV					0x00004000
-#define    NV10TCL_RC_FINAL1_G_MAPPING_EXPAND_NEGATE_NV					0x00006000
-#define    NV10TCL_RC_FINAL1_G_MAPPING_HALF_BIAS_NORMAL_NV				0x00008000
-#define    NV10TCL_RC_FINAL1_G_MAPPING_HALF_BIAS_NEGATE_NV				0x0000a000
-#define    NV10TCL_RC_FINAL1_G_MAPPING_SIGNED_IDENTITY_NV				0x0000c000
-#define    NV10TCL_RC_FINAL1_G_MAPPING_SIGNED_NEGATE_NV					0x0000e000
-#define   NV10TCL_RC_FINAL1_F_INPUT_SHIFT						16
-#define   NV10TCL_RC_FINAL1_F_INPUT_MASK						0x000f0000
-#define    NV10TCL_RC_FINAL1_F_INPUT_ZERO						0x00000000
-#define    NV10TCL_RC_FINAL1_F_INPUT_CONSTANT_COLOR0_NV					0x00010000
-#define    NV10TCL_RC_FINAL1_F_INPUT_CONSTANT_COLOR1_NV					0x00020000
-#define    NV10TCL_RC_FINAL1_F_INPUT_FOG						0x00030000
-#define    NV10TCL_RC_FINAL1_F_INPUT_PRIMARY_COLOR_NV					0x00040000
-#define    NV10TCL_RC_FINAL1_F_INPUT_SECONDARY_COLOR_NV					0x00050000
-#define    NV10TCL_RC_FINAL1_F_INPUT_TEXTURE0_ARB					0x00080000
-#define    NV10TCL_RC_FINAL1_F_INPUT_TEXTURE1_ARB					0x00090000
-#define    NV10TCL_RC_FINAL1_F_INPUT_SPARE0_NV						0x000c0000
-#define    NV10TCL_RC_FINAL1_F_INPUT_SPARE1_NV						0x000d0000
-#define    NV10TCL_RC_FINAL1_F_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x000e0000
-#define    NV10TCL_RC_FINAL1_F_INPUT_E_TIMES_F_NV					0x000f0000
-#define   NV10TCL_RC_FINAL1_F_COMPONENT_USAGE						(1 << 20)
-#define    NV10TCL_RC_FINAL1_F_COMPONENT_USAGE_RGB					0x00000000
-#define    NV10TCL_RC_FINAL1_F_COMPONENT_USAGE_ALPHA					0x00100000
-#define   NV10TCL_RC_FINAL1_F_MAPPING_SHIFT						21
-#define   NV10TCL_RC_FINAL1_F_MAPPING_MASK						0x00e00000
-#define    NV10TCL_RC_FINAL1_F_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV10TCL_RC_FINAL1_F_MAPPING_UNSIGNED_INVERT_NV				0x00200000
-#define    NV10TCL_RC_FINAL1_F_MAPPING_EXPAND_NORMAL_NV					0x00400000
-#define    NV10TCL_RC_FINAL1_F_MAPPING_EXPAND_NEGATE_NV					0x00600000
-#define    NV10TCL_RC_FINAL1_F_MAPPING_HALF_BIAS_NORMAL_NV				0x00800000
-#define    NV10TCL_RC_FINAL1_F_MAPPING_HALF_BIAS_NEGATE_NV				0x00a00000
-#define    NV10TCL_RC_FINAL1_F_MAPPING_SIGNED_IDENTITY_NV				0x00c00000
-#define    NV10TCL_RC_FINAL1_F_MAPPING_SIGNED_NEGATE_NV					0x00e00000
-#define   NV10TCL_RC_FINAL1_E_INPUT_SHIFT						24
-#define   NV10TCL_RC_FINAL1_E_INPUT_MASK						0x0f000000
-#define    NV10TCL_RC_FINAL1_E_INPUT_ZERO						0x00000000
-#define    NV10TCL_RC_FINAL1_E_INPUT_CONSTANT_COLOR0_NV					0x01000000
-#define    NV10TCL_RC_FINAL1_E_INPUT_CONSTANT_COLOR1_NV					0x02000000
-#define    NV10TCL_RC_FINAL1_E_INPUT_FOG						0x03000000
-#define    NV10TCL_RC_FINAL1_E_INPUT_PRIMARY_COLOR_NV					0x04000000
-#define    NV10TCL_RC_FINAL1_E_INPUT_SECONDARY_COLOR_NV					0x05000000
-#define    NV10TCL_RC_FINAL1_E_INPUT_TEXTURE0_ARB					0x08000000
-#define    NV10TCL_RC_FINAL1_E_INPUT_TEXTURE1_ARB					0x09000000
-#define    NV10TCL_RC_FINAL1_E_INPUT_SPARE0_NV						0x0c000000
-#define    NV10TCL_RC_FINAL1_E_INPUT_SPARE1_NV						0x0d000000
-#define    NV10TCL_RC_FINAL1_E_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x0e000000
-#define    NV10TCL_RC_FINAL1_E_INPUT_E_TIMES_F_NV					0x0f000000
-#define   NV10TCL_RC_FINAL1_E_COMPONENT_USAGE						(1 << 28)
-#define    NV10TCL_RC_FINAL1_E_COMPONENT_USAGE_RGB					0x00000000
-#define    NV10TCL_RC_FINAL1_E_COMPONENT_USAGE_ALPHA					0x10000000
-#define   NV10TCL_RC_FINAL1_E_MAPPING_SHIFT						29
-#define   NV10TCL_RC_FINAL1_E_MAPPING_MASK						0xe0000000
-#define    NV10TCL_RC_FINAL1_E_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV10TCL_RC_FINAL1_E_MAPPING_UNSIGNED_INVERT_NV				0x20000000
-#define    NV10TCL_RC_FINAL1_E_MAPPING_EXPAND_NORMAL_NV					0x40000000
-#define    NV10TCL_RC_FINAL1_E_MAPPING_EXPAND_NEGATE_NV					0x60000000
-#define    NV10TCL_RC_FINAL1_E_MAPPING_HALF_BIAS_NORMAL_NV				0x80000000
-#define    NV10TCL_RC_FINAL1_E_MAPPING_HALF_BIAS_NEGATE_NV				0xa0000000
-#define    NV10TCL_RC_FINAL1_E_MAPPING_SIGNED_IDENTITY_NV				0xc0000000
-#define    NV10TCL_RC_FINAL1_E_MAPPING_SIGNED_NEGATE_NV					0xe0000000
-#define  NV10TCL_LIGHT_MODEL								0x00000294
-#define   NV10TCL_LIGHT_MODEL_COLOR_CONTROL						(1 <<  1)
-#define   NV10TCL_LIGHT_MODEL_LOCAL_VIEWER						(1 << 16)
-#define  NV10TCL_COLOR_MATERIAL_ENABLE							0x00000298
-#define   NV10TCL_COLOR_MATERIAL_ENABLE_SPECULAR					(1 <<  0)
-#define   NV10TCL_COLOR_MATERIAL_ENABLE_DIFFUSE						(1 <<  1)
-#define   NV10TCL_COLOR_MATERIAL_ENABLE_AMBIENT						(1 <<  2)
-#define   NV10TCL_COLOR_MATERIAL_ENABLE_EMISSION					(1 <<  3)
-#define  NV10TCL_FOG_MODE								0x0000029c
-#define   NV10TCL_FOG_MODE_EXP								0x00000800
-#define   NV10TCL_FOG_MODE_EXP_2							0x00000802
-#define   NV10TCL_FOG_MODE_EXP2								0x00000803
-#define   NV10TCL_FOG_MODE_LINEAR							0x00000804
-#define   NV10TCL_FOG_MODE_LINEAR_2							0x00002601
-#define  NV10TCL_FOG_COORD_DIST								0x000002a0
-#define   NV10TCL_FOG_COORD_DIST_COORD_FALSE						0x00000000
-#define   NV10TCL_FOG_COORD_DIST_COORD_FRAGMENT_DEPTH_DISTANCE_EYE_RADIAL_NV		0x00000001
-#define   NV10TCL_FOG_COORD_DIST_COORD_FRAGMENT_DEPTH_DISTANCE_EYE_PLANE_ABSOLUTE_NV	0x00000002
-#define   NV10TCL_FOG_COORD_DIST_COORD_FOG						0x00000003
-#define  NV10TCL_FOG_ENABLE								0x000002a4
-#define  NV10TCL_FOG_COLOR								0x000002a8
-#define   NV10TCL_FOG_COLOR_R_SHIFT							0
-#define   NV10TCL_FOG_COLOR_R_MASK							0x000000ff
-#define   NV10TCL_FOG_COLOR_G_SHIFT							8
-#define   NV10TCL_FOG_COLOR_G_MASK							0x0000ff00
-#define   NV10TCL_FOG_COLOR_B_SHIFT							16
-#define   NV10TCL_FOG_COLOR_B_MASK							0x00ff0000
-#define   NV10TCL_FOG_COLOR_A_SHIFT							24
-#define   NV10TCL_FOG_COLOR_A_MASK							0xff000000
-#define  NV10TCL_VIEWPORT_CLIP_MODE							0x000002b4
-#define  NV10TCL_VIEWPORT_CLIP_HORIZ(x)							(0x000002c0+((x)*4))
-#define  NV10TCL_VIEWPORT_CLIP_HORIZ__SIZE						0x00000008
-#define   NV10TCL_VIEWPORT_CLIP_HORIZ_CLIP_L_SHIFT					0
-#define   NV10TCL_VIEWPORT_CLIP_HORIZ_CLIP_L_MASK					0x000007ff
-#define   NV10TCL_VIEWPORT_CLIP_HORIZ_CLIP_LEFT_ENABLE					(1 << 11)
-#define   NV10TCL_VIEWPORT_CLIP_HORIZ_CLIP_R_SHIFT					16
-#define   NV10TCL_VIEWPORT_CLIP_HORIZ_CLIP_R_MASK					0x07ff0000
-#define   NV10TCL_VIEWPORT_CLIP_HORIZ_CLIP_RIGHT_ENABLE					(1 << 27)
-#define  NV10TCL_VIEWPORT_CLIP_VERT(x)							(0x000002e0+((x)*4))
-#define  NV10TCL_VIEWPORT_CLIP_VERT__SIZE						0x00000008
-#define   NV10TCL_VIEWPORT_CLIP_VERT_CLIP_T_SHIFT					0
-#define   NV10TCL_VIEWPORT_CLIP_VERT_CLIP_T_MASK					0x000007ff
-#define   NV10TCL_VIEWPORT_CLIP_VERT_CLIP_TOP_ENABLE					(1 << 11)
-#define   NV10TCL_VIEWPORT_CLIP_VERT_CLIP_B_SHIFT					16
-#define   NV10TCL_VIEWPORT_CLIP_VERT_CLIP_B_MASK					0x07ff0000
-#define   NV10TCL_VIEWPORT_CLIP_VERT_CLIP_BOTTOM_ENABLE					(1 << 27)
-#define  NV10TCL_ALPHA_FUNC_ENABLE							0x00000300
-#define  NV10TCL_BLEND_FUNC_ENABLE							0x00000304
-#define  NV10TCL_CULL_FACE_ENABLE							0x00000308
-#define  NV10TCL_DEPTH_TEST_ENABLE							0x0000030c
-#define  NV10TCL_DITHER_ENABLE								0x00000310
-#define  NV10TCL_LIGHTING_ENABLE							0x00000314
-#define  NV10TCL_POINT_PARAMETERS_ENABLE						0x00000318
-#define  NV10TCL_POINT_SMOOTH_ENABLE							0x0000031c
-#define  NV10TCL_LINE_SMOOTH_ENABLE							0x00000320
-#define  NV10TCL_POLYGON_SMOOTH_ENABLE							0x00000324
-#define  NV10TCL_VERTEX_WEIGHT_ENABLE							0x00000328
-#define  NV10TCL_STENCIL_ENABLE								0x0000032c
-#define  NV10TCL_POLYGON_OFFSET_POINT_ENABLE						0x00000330
-#define  NV10TCL_POLYGON_OFFSET_LINE_ENABLE						0x00000334
-#define  NV10TCL_POLYGON_OFFSET_FILL_ENABLE						0x00000338
-#define  NV10TCL_ALPHA_FUNC_FUNC							0x0000033c
-#define   NV10TCL_ALPHA_FUNC_FUNC_NEVER							0x00000200
-#define   NV10TCL_ALPHA_FUNC_FUNC_LESS							0x00000201
-#define   NV10TCL_ALPHA_FUNC_FUNC_EQUAL							0x00000202
-#define   NV10TCL_ALPHA_FUNC_FUNC_LEQUAL						0x00000203
-#define   NV10TCL_ALPHA_FUNC_FUNC_GREATER						0x00000204
-#define   NV10TCL_ALPHA_FUNC_FUNC_GREATER						0x00000204
-#define   NV10TCL_ALPHA_FUNC_FUNC_NOTEQUAL						0x00000205
-#define   NV10TCL_ALPHA_FUNC_FUNC_GEQUAL						0x00000206
-#define   NV10TCL_ALPHA_FUNC_FUNC_ALWAYS						0x00000207
-#define  NV10TCL_ALPHA_FUNC_REF								0x00000340
-#define  NV10TCL_BLEND_FUNC_SRC								0x00000344
-#define   NV10TCL_BLEND_FUNC_SRC_ZERO							0x00000000
-#define   NV10TCL_BLEND_FUNC_SRC_ONE							0x00000001
-#define   NV10TCL_BLEND_FUNC_SRC_SRC_COLOR						0x00000300
-#define   NV10TCL_BLEND_FUNC_SRC_ONE_MINUS_SRC_COLOR					0x00000301
-#define   NV10TCL_BLEND_FUNC_SRC_SRC_ALPHA						0x00000302
-#define   NV10TCL_BLEND_FUNC_SRC_ONE_MINUS_SRC_ALPHA					0x00000303
-#define   NV10TCL_BLEND_FUNC_SRC_DST_ALPHA						0x00000304
-#define   NV10TCL_BLEND_FUNC_SRC_ONE_MINUS_DST_ALPHA					0x00000305
-#define   NV10TCL_BLEND_FUNC_SRC_DST_COLOR						0x00000306
-#define   NV10TCL_BLEND_FUNC_SRC_ONE_MINUS_DST_COLOR					0x00000307
-#define   NV10TCL_BLEND_FUNC_SRC_SRC_ALPHA_SATURATE					0x00000308
-#define   NV10TCL_BLEND_FUNC_SRC_CONSTANT_COLOR						0x00008001
-#define   NV10TCL_BLEND_FUNC_SRC_ONE_MINUS_CONSTANT_COLOR				0x00008002
-#define   NV10TCL_BLEND_FUNC_SRC_CONSTANT_ALPHA						0x00008003
-#define   NV10TCL_BLEND_FUNC_SRC_ONE_MINUS_CONSTANT_ALPHA				0x00008004
-#define  NV10TCL_BLEND_FUNC_DST								0x00000348
-#define   NV10TCL_BLEND_FUNC_DST_ZERO							0x00000000
-#define   NV10TCL_BLEND_FUNC_DST_ONE							0x00000001
-#define   NV10TCL_BLEND_FUNC_DST_SRC_COLOR						0x00000300
-#define   NV10TCL_BLEND_FUNC_DST_ONE_MINUS_SRC_COLOR					0x00000301
-#define   NV10TCL_BLEND_FUNC_DST_SRC_ALPHA						0x00000302
-#define   NV10TCL_BLEND_FUNC_DST_ONE_MINUS_SRC_ALPHA					0x00000303
-#define   NV10TCL_BLEND_FUNC_DST_DST_ALPHA						0x00000304
-#define   NV10TCL_BLEND_FUNC_DST_ONE_MINUS_DST_ALPHA					0x00000305
-#define   NV10TCL_BLEND_FUNC_DST_DST_COLOR						0x00000306
-#define   NV10TCL_BLEND_FUNC_DST_ONE_MINUS_DST_COLOR					0x00000307
-#define   NV10TCL_BLEND_FUNC_DST_SRC_ALPHA_SATURATE					0x00000308
-#define   NV10TCL_BLEND_FUNC_DST_CONSTANT_COLOR						0x00008001
-#define   NV10TCL_BLEND_FUNC_DST_ONE_MINUS_CONSTANT_COLOR				0x00008002
-#define   NV10TCL_BLEND_FUNC_DST_CONSTANT_ALPHA						0x00008003
-#define   NV10TCL_BLEND_FUNC_DST_ONE_MINUS_CONSTANT_ALPHA				0x00008004
-#define  NV10TCL_BLEND_COLOR								0x0000034c
-#define   NV10TCL_BLEND_COLOR_B_SHIFT							0
-#define   NV10TCL_BLEND_COLOR_B_MASK							0x000000ff
-#define   NV10TCL_BLEND_COLOR_G_SHIFT							8
-#define   NV10TCL_BLEND_COLOR_G_MASK							0x0000ff00
-#define   NV10TCL_BLEND_COLOR_R_SHIFT							16
-#define   NV10TCL_BLEND_COLOR_R_MASK							0x00ff0000
-#define   NV10TCL_BLEND_COLOR_A_SHIFT							24
-#define   NV10TCL_BLEND_COLOR_A_MASK							0xff000000
-#define  NV10TCL_BLEND_EQUATION								0x00000350
-#define   NV10TCL_BLEND_EQUATION_FUNC_ADD						0x00008006
-#define   NV10TCL_BLEND_EQUATION_MIN							0x00008007
-#define   NV10TCL_BLEND_EQUATION_MAX							0x00008008
-#define   NV10TCL_BLEND_EQUATION_FUNC_SUBTRACT						0x0000800a
-#define   NV10TCL_BLEND_EQUATION_FUNC_REVERSE_SUBTRACT					0x0000800b
-#define  NV10TCL_DEPTH_FUNC								0x00000354
-#define   NV10TCL_DEPTH_FUNC_NEVER							0x00000200
-#define   NV10TCL_DEPTH_FUNC_LESS							0x00000201
-#define   NV10TCL_DEPTH_FUNC_EQUAL							0x00000202
-#define   NV10TCL_DEPTH_FUNC_LEQUAL							0x00000203
-#define   NV10TCL_DEPTH_FUNC_GREATER							0x00000204
-#define   NV10TCL_DEPTH_FUNC_GREATER							0x00000204
-#define   NV10TCL_DEPTH_FUNC_NOTEQUAL							0x00000205
-#define   NV10TCL_DEPTH_FUNC_GEQUAL							0x00000206
-#define   NV10TCL_DEPTH_FUNC_ALWAYS							0x00000207
-#define  NV10TCL_COLOR_MASK								0x00000358
-#define   NV10TCL_COLOR_MASK_B								(1 <<  0)
-#define   NV10TCL_COLOR_MASK_G								(1 <<  8)
-#define   NV10TCL_COLOR_MASK_R								(1 << 16)
-#define   NV10TCL_COLOR_MASK_A								(1 << 24)
-#define  NV10TCL_DEPTH_WRITE_ENABLE							0x0000035c
-#define  NV10TCL_STENCIL_MASK								0x00000360
-#define  NV10TCL_STENCIL_FUNC_FUNC							0x00000364
-#define   NV10TCL_STENCIL_FUNC_FUNC_NEVER						0x00000200
-#define   NV10TCL_STENCIL_FUNC_FUNC_LESS						0x00000201
-#define   NV10TCL_STENCIL_FUNC_FUNC_EQUAL						0x00000202
-#define   NV10TCL_STENCIL_FUNC_FUNC_LEQUAL						0x00000203
-#define   NV10TCL_STENCIL_FUNC_FUNC_GREATER						0x00000204
-#define   NV10TCL_STENCIL_FUNC_FUNC_GREATER						0x00000204
-#define   NV10TCL_STENCIL_FUNC_FUNC_NOTEQUAL						0x00000205
-#define   NV10TCL_STENCIL_FUNC_FUNC_GEQUAL						0x00000206
-#define   NV10TCL_STENCIL_FUNC_FUNC_ALWAYS						0x00000207
-#define  NV10TCL_STENCIL_FUNC_REF							0x00000368
-#define  NV10TCL_STENCIL_FUNC_MASK							0x0000036c
-#define  NV10TCL_STENCIL_OP_FAIL							0x00000370
-#define   NV10TCL_STENCIL_OP_FAIL_ZERO							0x00000000
-#define   NV10TCL_STENCIL_OP_FAIL_INVERT						0x0000150a
-#define   NV10TCL_STENCIL_OP_FAIL_KEEP							0x00001e00
-#define   NV10TCL_STENCIL_OP_FAIL_REPLACE						0x00001e01
-#define   NV10TCL_STENCIL_OP_FAIL_INCR							0x00001e02
-#define   NV10TCL_STENCIL_OP_FAIL_DECR							0x00001e03
-#define   NV10TCL_STENCIL_OP_FAIL_INCR_WRAP						0x00008507
-#define   NV10TCL_STENCIL_OP_FAIL_DECR_WRAP						0x00008508
-#define  NV10TCL_STENCIL_OP_ZFAIL							0x00000374
-#define   NV10TCL_STENCIL_OP_ZFAIL_ZERO							0x00000000
-#define   NV10TCL_STENCIL_OP_ZFAIL_INVERT						0x0000150a
-#define   NV10TCL_STENCIL_OP_ZFAIL_KEEP							0x00001e00
-#define   NV10TCL_STENCIL_OP_ZFAIL_REPLACE						0x00001e01
-#define   NV10TCL_STENCIL_OP_ZFAIL_INCR							0x00001e02
-#define   NV10TCL_STENCIL_OP_ZFAIL_DECR							0x00001e03
-#define   NV10TCL_STENCIL_OP_ZFAIL_INCR_WRAP						0x00008507
-#define   NV10TCL_STENCIL_OP_ZFAIL_DECR_WRAP						0x00008508
-#define  NV10TCL_STENCIL_OP_ZPASS							0x00000378
-#define   NV10TCL_STENCIL_OP_ZPASS_ZERO							0x00000000
-#define   NV10TCL_STENCIL_OP_ZPASS_INVERT						0x0000150a
-#define   NV10TCL_STENCIL_OP_ZPASS_KEEP							0x00001e00
-#define   NV10TCL_STENCIL_OP_ZPASS_REPLACE						0x00001e01
-#define   NV10TCL_STENCIL_OP_ZPASS_INCR							0x00001e02
-#define   NV10TCL_STENCIL_OP_ZPASS_DECR							0x00001e03
-#define   NV10TCL_STENCIL_OP_ZPASS_INCR_WRAP						0x00008507
-#define   NV10TCL_STENCIL_OP_ZPASS_DECR_WRAP						0x00008508
-#define  NV10TCL_SHADE_MODEL								0x0000037c
-#define   NV10TCL_SHADE_MODEL_FLAT							0x00001d00
-#define   NV10TCL_SHADE_MODEL_SMOOTH							0x00001d01
-#define  NV10TCL_LINE_WIDTH								0x00000380
-#define  NV10TCL_POLYGON_OFFSET_FACTOR							0x00000384
-#define  NV10TCL_POLYGON_OFFSET_UNITS							0x00000388
-#define  NV10TCL_POLYGON_MODE_FRONT							0x0000038c
-#define   NV10TCL_POLYGON_MODE_FRONT_POINT						0x00001b00
-#define   NV10TCL_POLYGON_MODE_FRONT_LINE						0x00001b01
-#define   NV10TCL_POLYGON_MODE_FRONT_FILL						0x00001b02
-#define  NV10TCL_POLYGON_MODE_BACK							0x00000390
-#define   NV10TCL_POLYGON_MODE_BACK_POINT						0x00001b00
-#define   NV10TCL_POLYGON_MODE_BACK_LINE						0x00001b01
-#define   NV10TCL_POLYGON_MODE_BACK_FILL						0x00001b02
-#define  NV10TCL_DEPTH_RANGE_NEAR							0x00000394
-#define  NV10TCL_DEPTH_RANGE_FAR							0x00000398
-#define  NV10TCL_CULL_FACE								0x0000039c
-#define   NV10TCL_CULL_FACE_FRONT							0x00000404
-#define   NV10TCL_CULL_FACE_BACK							0x00000405
-#define   NV10TCL_CULL_FACE_FRONT_AND_BACK						0x00000408
-#define  NV10TCL_FRONT_FACE								0x000003a0
-#define   NV10TCL_FRONT_FACE_CW								0x00000900
-#define   NV10TCL_FRONT_FACE_CCW							0x00000901
-#define  NV10TCL_NORMALIZE_ENABLE							0x000003a4
-#define  NV10TCL_COLOR_MATERIAL_R							0x000003a8
-#define  NV10TCL_COLOR_MATERIAL_G							0x000003ac
-#define  NV10TCL_COLOR_MATERIAL_B							0x000003b0
-#define  NV10TCL_COLOR_MATERIAL_A							0x000003b4
-#define  NV10TCL_COLOR_CONTROL								0x000003b8
-#define  NV10TCL_ENABLED_LIGHTS								0x000003bc
-#define   NV10TCL_ENABLED_LIGHTS_LIGHT0							(1 <<  0)
-#define   NV10TCL_ENABLED_LIGHTS_LIGHT1							(1 <<  2)
-#define   NV10TCL_ENABLED_LIGHTS_LIGHT2							(1 <<  4)
-#define   NV10TCL_ENABLED_LIGHTS_LIGHT3							(1 <<  6)
-#define   NV10TCL_ENABLED_LIGHTS_LIGHT4							(1 <<  8)
-#define   NV10TCL_ENABLED_LIGHTS_LIGHT5							(1 << 10)
-#define   NV10TCL_ENABLED_LIGHTS_LIGHT6							(1 << 12)
-#define   NV10TCL_ENABLED_LIGHTS_LIGHT7							(1 << 14)
-#define  NV10TCL_TX_GEN_S(x)								(0x000003c0+((x)*16))
-#define  NV10TCL_TX_GEN_S__SIZE								0x00000002
-#define   NV10TCL_TX_GEN_S_FALSE							0x00000000
-#define   NV10TCL_TX_GEN_S_EYE_LINEAR							0x00002400
-#define   NV10TCL_TX_GEN_S_OBJECT_LINEAR						0x00002401
-#define   NV10TCL_TX_GEN_S_SPHERE_MAP							0x00002402
-#define   NV10TCL_TX_GEN_S_NORMAL_MAP							0x00008511
-#define   NV10TCL_TX_GEN_S_REFLECTION_MAP						0x00008512
-#define  NV10TCL_TX_GEN_T(x)								(0x000003c4+((x)*16))
-#define  NV10TCL_TX_GEN_T__SIZE								0x00000002
-#define   NV10TCL_TX_GEN_T_FALSE							0x00000000
-#define   NV10TCL_TX_GEN_T_EYE_LINEAR							0x00002400
-#define   NV10TCL_TX_GEN_T_OBJECT_LINEAR						0x00002401
-#define   NV10TCL_TX_GEN_T_SPHERE_MAP							0x00002402
-#define   NV10TCL_TX_GEN_T_NORMAL_MAP							0x00008511
-#define   NV10TCL_TX_GEN_T_REFLECTION_MAP						0x00008512
-#define  NV10TCL_TX_GEN_R(x)								(0x000003c8+((x)*16))
-#define  NV10TCL_TX_GEN_R__SIZE								0x00000002
-#define   NV10TCL_TX_GEN_R_FALSE							0x00000000
-#define   NV10TCL_TX_GEN_R_EYE_LINEAR							0x00002400
-#define   NV10TCL_TX_GEN_R_OBJECT_LINEAR						0x00002401
-#define   NV10TCL_TX_GEN_R_SPHERE_MAP							0x00002402
-#define   NV10TCL_TX_GEN_R_NORMAL_MAP							0x00008511
-#define   NV10TCL_TX_GEN_R_REFLECTION_MAP						0x00008512
-#define  NV10TCL_TX_GEN_Q(x)								(0x000003cc+((x)*16))
-#define  NV10TCL_TX_GEN_Q__SIZE								0x00000002
-#define   NV10TCL_TX_GEN_Q_FALSE							0x00000000
-#define   NV10TCL_TX_GEN_Q_EYE_LINEAR							0x00002400
-#define   NV10TCL_TX_GEN_Q_OBJECT_LINEAR						0x00002401
-#define   NV10TCL_TX_GEN_Q_SPHERE_MAP							0x00002402
-#define   NV10TCL_TX_GEN_Q_NORMAL_MAP							0x00008511
-#define   NV10TCL_TX_GEN_Q_REFLECTION_MAP						0x00008512
-#define  NV10TCL_TX_MATRIX_ENABLE(x)							(0x000003e0+((x)*4))
-#define  NV10TCL_TX_MATRIX_ENABLE__SIZE							0x00000002
-#define  NV10TCL_VIEW_MATRIX_ENABLE							0x000003e8
-#define   NV10TCL_VIEW_MATRIX_ENABLE_MODELVIEW1						(1 <<  0)
-#define   NV10TCL_VIEW_MATRIX_ENABLE_MODELVIEW0						(1 <<  1)
-#define   NV10TCL_VIEW_MATRIX_ENABLE_PROJECTION						(1 <<  2)
-#define  NV10TCL_POINT_SIZE								0x000003ec
-#define  NV10TCL_MODELVIEW0_MATRIX(x)							(0x00000400+((x)*4))
-#define  NV10TCL_MODELVIEW0_MATRIX__SIZE						0x00000010
-#define  NV10TCL_MODELVIEW1_MATRIX(x)							(0x00000440+((x)*4))
-#define  NV10TCL_MODELVIEW1_MATRIX__SIZE						0x00000010
-#define  NV10TCL_INVERSE_MODELVIEW0_MATRIX(x)						(0x00000480+((x)*4))
-#define  NV10TCL_INVERSE_MODELVIEW0_MATRIX__SIZE					0x00000010
-#define  NV10TCL_INVERSE_MODELVIEW1_MATRIX(x)						(0x000004c0+((x)*4))
-#define  NV10TCL_INVERSE_MODELVIEW1_MATRIX__SIZE					0x00000010
-#define  NV10TCL_PROJECTION_MATRIX(x)							(0x00000500+((x)*4))
-#define  NV10TCL_PROJECTION_MATRIX__SIZE						0x00000010
-#define  NV10TCL_TX0_MATRIX(x)								(0x00000540+((x)*4))
-#define  NV10TCL_TX0_MATRIX__SIZE							0x00000010
-#define  NV10TCL_TX1_MATRIX(x)								(0x00000580+((x)*4))
-#define  NV10TCL_TX1_MATRIX__SIZE							0x00000010
-#define  NV10TCL_CLIP_PLANE_A(x)							(0x00000600+((x)*16))
-#define  NV10TCL_CLIP_PLANE_A__SIZE							0x00000008
-#define  NV10TCL_CLIP_PLANE_B(x)							(0x00000604+((x)*16))
-#define  NV10TCL_CLIP_PLANE_B__SIZE							0x00000008
-#define  NV10TCL_CLIP_PLANE_C(x)							(0x00000608+((x)*16))
-#define  NV10TCL_CLIP_PLANE_C__SIZE							0x00000008
-#define  NV10TCL_CLIP_PLANE_D(x)							(0x0000060c+((x)*16))
-#define  NV10TCL_CLIP_PLANE_D__SIZE							0x00000008
-#define  NV10TCL_FOG_EQUATION_CONSTANT							0x00000680
-#define  NV10TCL_FOG_EQUATION_LINEAR							0x00000684
-#define  NV10TCL_FOG_EQUATION_QUADRATIC							0x00000688
-#define  NV10TCL_FRONT_MATERIAL_SHININESS(x)						(0x000006a0+((x)*4))
-#define  NV10TCL_FRONT_MATERIAL_SHININESS__SIZE						0x00000006
-#define  NV10TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_R			0x000006c4
-#define  NV10TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_G			0x000006c8
-#define  NV10TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_B			0x000006cc
-#define  NV10TCL_VIEWPORT_SCALE_X							0x000006e8
-#define  NV10TCL_VIEWPORT_SCALE_Y							0x000006ec
-#define  NV10TCL_VIEWPORT_SCALE_Z							0x000006f0
-#define  NV10TCL_VIEWPORT_SCALE_W							0x000006f4
-#define  NV10TCL_POINT_PARAMETER(x)							(0x000006f8+((x)*4))
-#define  NV10TCL_POINT_PARAMETER__SIZE							0x00000008
-#define  NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_R(x)					(0x00000800+((x)*128))
-#define  NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_R__SIZE				0x00000008
-#define  NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_G(x)					(0x00000804+((x)*128))
-#define  NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_G__SIZE				0x00000008
-#define  NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_B(x)					(0x00000808+((x)*128))
-#define  NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_B__SIZE				0x00000008
-#define  NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_R(x)					(0x0000080c+((x)*128))
-#define  NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_R__SIZE				0x00000008
-#define  NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_G(x)					(0x00000810+((x)*128))
-#define  NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_G__SIZE				0x00000008
-#define  NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_B(x)					(0x00000814+((x)*128))
-#define  NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_B__SIZE				0x00000008
-#define  NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_R(x)					(0x00000818+((x)*128))
-#define  NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_R__SIZE				0x00000008
-#define  NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_G(x)					(0x0000081c+((x)*128))
-#define  NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_G__SIZE				0x00000008
-#define  NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_B(x)					(0x00000820+((x)*128))
-#define  NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_B__SIZE				0x00000008
-#define  NV10TCL_LIGHT_HALF_VECTOR_X(x)							(0x00000828+((x)*128))
-#define  NV10TCL_LIGHT_HALF_VECTOR_X__SIZE						0x00000008
-#define  NV10TCL_LIGHT_HALF_VECTOR_Y(x)							(0x0000082c+((x)*128))
-#define  NV10TCL_LIGHT_HALF_VECTOR_Y__SIZE						0x00000008
-#define  NV10TCL_LIGHT_HALF_VECTOR_Z(x)							(0x00000830+((x)*128))
-#define  NV10TCL_LIGHT_HALF_VECTOR_Z__SIZE						0x00000008
-#define  NV10TCL_LIGHT_DIRECTION_X(x)							(0x00000834+((x)*128))
-#define  NV10TCL_LIGHT_DIRECTION_X__SIZE						0x00000008
-#define  NV10TCL_LIGHT_DIRECTION_Y(x)							(0x00000838+((x)*128))
-#define  NV10TCL_LIGHT_DIRECTION_Y__SIZE						0x00000008
-#define  NV10TCL_LIGHT_DIRECTION_Z(x)							(0x0000083c+((x)*128))
-#define  NV10TCL_LIGHT_DIRECTION_Z__SIZE						0x00000008
-#define  NV10TCL_LIGHT_SPOT_CUTOFF_A(x)							(0x00000840+((x)*128))
-#define  NV10TCL_LIGHT_SPOT_CUTOFF_A__SIZE						0x00000008
-#define  NV10TCL_LIGHT_SPOT_CUTOFF_B(x)							(0x00000844+((x)*128))
-#define  NV10TCL_LIGHT_SPOT_CUTOFF_B__SIZE						0x00000008
-#define  NV10TCL_LIGHT_SPOT_CUTOFF_C(x)							(0x00000848+((x)*128))
-#define  NV10TCL_LIGHT_SPOT_CUTOFF_C__SIZE						0x00000008
-#define  NV10TCL_LIGHT_SPOT_DIR_X(x)							(0x0000084c+((x)*128))
-#define  NV10TCL_LIGHT_SPOT_DIR_X__SIZE							0x00000008
-#define  NV10TCL_LIGHT_SPOT_DIR_Y(x)							(0x00000850+((x)*128))
-#define  NV10TCL_LIGHT_SPOT_DIR_Y__SIZE							0x00000008
-#define  NV10TCL_LIGHT_SPOT_DIR_Z(x)							(0x00000854+((x)*128))
-#define  NV10TCL_LIGHT_SPOT_DIR_Z__SIZE							0x00000008
-#define  NV10TCL_LIGHT_SPOT_CUTOFF_D(x)							(0x00000858+((x)*128))
-#define  NV10TCL_LIGHT_SPOT_CUTOFF_D__SIZE						0x00000008
-#define  NV10TCL_LIGHT_POSITION_X(x)							(0x0000085c+((x)*128))
-#define  NV10TCL_LIGHT_POSITION_X__SIZE							0x00000008
-#define  NV10TCL_LIGHT_POSITION_Y(x)							(0x00000860+((x)*128))
-#define  NV10TCL_LIGHT_POSITION_Y__SIZE							0x00000008
-#define  NV10TCL_LIGHT_POSITION_Z(x)							(0x00000864+((x)*128))
-#define  NV10TCL_LIGHT_POSITION_Z__SIZE							0x00000008
-#define  NV10TCL_LIGHT_ATTENUATION_CONSTANT(x)						(0x00000868+((x)*128))
-#define  NV10TCL_LIGHT_ATTENUATION_CONSTANT__SIZE					0x00000008
-#define  NV10TCL_LIGHT_ATTENUATION_LINEAR(x)						(0x0000086c+((x)*128))
-#define  NV10TCL_LIGHT_ATTENUATION_LINEAR__SIZE						0x00000008
-#define  NV10TCL_LIGHT_ATTENUATION_QUADRATIC(x)						(0x00000870+((x)*128))
-#define  NV10TCL_LIGHT_ATTENUATION_QUADRATIC__SIZE					0x00000008
-#define  NV10TCL_VERTEX_POS_3F_X							0x00000c00
-#define  NV10TCL_VERTEX_POS_3F_Y							0x00000c04
-#define  NV10TCL_VERTEX_POS_3F_Z							0x00000c08
-#define  NV10TCL_VERTEX_POS_4F_X							0x00000c18
-#define  NV10TCL_VERTEX_POS_4F_Y							0x00000c1c
-#define  NV10TCL_VERTEX_POS_4F_Z							0x00000c20
-#define  NV10TCL_VERTEX_POS_4F_W							0x00000c24
-#define  NV10TCL_VERTEX_NOR_3F_X							0x00000c30
-#define  NV10TCL_VERTEX_NOR_3F_Y							0x00000c34
-#define  NV10TCL_VERTEX_NOR_3F_Z							0x00000c38
-#define  NV10TCL_VERTEX_NOR_3I_XY							0x00000c40
-#define   NV10TCL_VERTEX_NOR_3I_XY_X_SHIFT						0
-#define   NV10TCL_VERTEX_NOR_3I_XY_X_MASK						0x0000ffff
-#define   NV10TCL_VERTEX_NOR_3I_XY_Y_SHIFT						16
-#define   NV10TCL_VERTEX_NOR_3I_XY_Y_MASK						0xffff0000
-#define  NV10TCL_VERTEX_NOR_3I_Z							0x00000c44
-#define   NV10TCL_VERTEX_NOR_3I_Z_Z_SHIFT						0
-#define   NV10TCL_VERTEX_NOR_3I_Z_Z_MASK						0x0000ffff
-#define  NV10TCL_VERTEX_COL_4F_R							0x00000c50
-#define  NV10TCL_VERTEX_COL_4F_G							0x00000c54
-#define  NV10TCL_VERTEX_COL_4F_B							0x00000c58
-#define  NV10TCL_VERTEX_COL_4F_A							0x00000c5c
-#define  NV10TCL_VERTEX_COL_3F_R							0x00000c60
-#define  NV10TCL_VERTEX_COL_3F_G							0x00000c64
-#define  NV10TCL_VERTEX_COL_3F_B							0x00000c68
-#define  NV10TCL_VERTEX_COL_4I								0x00000c6c
-#define   NV10TCL_VERTEX_COL_4I_R_SHIFT							0
-#define   NV10TCL_VERTEX_COL_4I_R_MASK							0x000000ff
-#define   NV10TCL_VERTEX_COL_4I_G_SHIFT							8
-#define   NV10TCL_VERTEX_COL_4I_G_MASK							0x0000ff00
-#define   NV10TCL_VERTEX_COL_4I_B_SHIFT							16
-#define   NV10TCL_VERTEX_COL_4I_B_MASK							0x00ff0000
-#define   NV10TCL_VERTEX_COL_4I_A_SHIFT							24
-#define   NV10TCL_VERTEX_COL_4I_A_MASK							0xff000000
-#define  NV10TCL_VERTEX_COL2_3F_R							0x00000c80
-#define  NV10TCL_VERTEX_COL2_3F_G							0x00000c84
-#define  NV10TCL_VERTEX_COL2_3F_B							0x00000c88
-#define  NV10TCL_VERTEX_COL2_3I								0x00000c8c
-#define   NV10TCL_VERTEX_COL2_3I_R_SHIFT						0
-#define   NV10TCL_VERTEX_COL2_3I_R_MASK							0x000000ff
-#define   NV10TCL_VERTEX_COL2_3I_G_SHIFT						8
-#define   NV10TCL_VERTEX_COL2_3I_G_MASK							0x0000ff00
-#define   NV10TCL_VERTEX_COL2_3I_B_SHIFT						16
-#define   NV10TCL_VERTEX_COL2_3I_B_MASK							0x00ff0000
-#define  NV10TCL_VERTEX_TX0_2F_S							0x00000c90
-#define  NV10TCL_VERTEX_TX0_2F_T							0x00000c94
-#define  NV10TCL_VERTEX_TX0_2I								0x00000c98
-#define   NV10TCL_VERTEX_TX0_2I_S_SHIFT							0
-#define   NV10TCL_VERTEX_TX0_2I_S_MASK							0x0000ffff
-#define   NV10TCL_VERTEX_TX0_2I_T_SHIFT							16
-#define   NV10TCL_VERTEX_TX0_2I_T_MASK							0xffff0000
-#define  NV10TCL_VERTEX_TX0_4F_S							0x00000ca0
-#define  NV10TCL_VERTEX_TX0_4F_T							0x00000ca4
-#define  NV10TCL_VERTEX_TX0_4F_R							0x00000ca8
-#define  NV10TCL_VERTEX_TX0_4F_Q							0x00000cac
-#define  NV10TCL_VERTEX_TX0_4I_ST							0x00000cb0
-#define   NV10TCL_VERTEX_TX0_4I_ST_S_SHIFT						0
-#define   NV10TCL_VERTEX_TX0_4I_ST_S_MASK						0x0000ffff
-#define   NV10TCL_VERTEX_TX0_4I_ST_T_SHIFT						16
-#define   NV10TCL_VERTEX_TX0_4I_ST_T_MASK						0xffff0000
-#define  NV10TCL_VERTEX_TX0_4I_RQ							0x00000cb4
-#define   NV10TCL_VERTEX_TX0_4I_RQ_R_SHIFT						0
-#define   NV10TCL_VERTEX_TX0_4I_RQ_R_MASK						0x0000ffff
-#define   NV10TCL_VERTEX_TX0_4I_RQ_Q_SHIFT						16
-#define   NV10TCL_VERTEX_TX0_4I_RQ_Q_MASK						0xffff0000
-#define  NV10TCL_VERTEX_TX1_2F_S							0x00000cb8
-#define  NV10TCL_VERTEX_TX1_2F_T							0x00000cbc
-#define  NV10TCL_VERTEX_TX1_2I								0x00000cc0
-#define   NV10TCL_VERTEX_TX1_2I_S_SHIFT							0
-#define   NV10TCL_VERTEX_TX1_2I_S_MASK							0x0000ffff
-#define   NV10TCL_VERTEX_TX1_2I_T_SHIFT							16
-#define   NV10TCL_VERTEX_TX1_2I_T_MASK							0xffff0000
-#define  NV10TCL_VERTEX_TX1_4F_S							0x00000cc8
-#define  NV10TCL_VERTEX_TX1_4F_T							0x00000ccc
-#define  NV10TCL_VERTEX_TX1_4F_R							0x00000cd0
-#define  NV10TCL_VERTEX_TX1_4F_Q							0x00000cd4
-#define  NV10TCL_VERTEX_TX1_4I_ST							0x00000cd8
-#define   NV10TCL_VERTEX_TX1_4I_ST_S_SHIFT						0
-#define   NV10TCL_VERTEX_TX1_4I_ST_S_MASK						0x0000ffff
-#define   NV10TCL_VERTEX_TX1_4I_ST_T_SHIFT						16
-#define   NV10TCL_VERTEX_TX1_4I_ST_T_MASK						0xffff0000
-#define  NV10TCL_VERTEX_TX1_4I_RQ							0x00000cdc
-#define   NV10TCL_VERTEX_TX1_4I_RQ_R_SHIFT						0
-#define   NV10TCL_VERTEX_TX1_4I_RQ_R_MASK						0x0000ffff
-#define   NV10TCL_VERTEX_TX1_4I_RQ_Q_SHIFT						16
-#define   NV10TCL_VERTEX_TX1_4I_RQ_Q_MASK						0xffff0000
-#define  NV10TCL_VERTEX_FOG_1F								0x00000ce0
-#define  NV10TCL_VERTEX_WGH_1F								0x00000ce4
-#define  NV10TCL_EDGEFLAG_ENABLE							0x00000cec
-#define  NV10TCL_VERTEX_ARRAY_VALIDATE							0x00000cf0
-#define  NV10TCL_VERTEX_ARRAY_ATTRIB_OFFSET(x)						(0x00000d00+((x)*8))
-#define  NV10TCL_VERTEX_ARRAY_ATTRIB_OFFSET__SIZE					0x00000008
-#define  NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT(x)						(0x00000d04+((x)*8))
-#define  NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT__SIZE					0x00000008
-#define   NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT_TYPE_SHIFT					0
-#define   NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT_TYPE_MASK					0x0000000f
-#define   NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT_FIELDS_SHIFT				4
-#define   NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT_FIELDS_MASK				0x000000f0
-#define   NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT_STRIDE_SHIFT				8
-#define   NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT_STRIDE_MASK				0x0000ff00
-#define  NV10TCL_VERTEX_ARRAY_OFFSET_POS						0x00000d00
-#define  NV10TCL_VERTEX_ARRAY_FORMAT_POS						0x00000d04
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_POS_TYPE_SHIFT					0
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_POS_TYPE_MASK					0x0000000f
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_POS_FIELDS_SHIFT					4
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_POS_FIELDS_MASK					0x000000f0
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_POS_STRIDE_SHIFT					8
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_POS_STRIDE_MASK					0x0000ff00
-#define  NV10TCL_VERTEX_ARRAY_OFFSET_COL						0x00000d08
-#define  NV10TCL_VERTEX_ARRAY_FORMAT_COL						0x00000d0c
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_COL_TYPE_SHIFT					0
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_COL_TYPE_MASK					0x0000000f
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_COL_FIELDS_SHIFT					4
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_COL_FIELDS_MASK					0x000000f0
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_COL_STRIDE_SHIFT					8
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_COL_STRIDE_MASK					0x0000ff00
-#define  NV10TCL_VERTEX_ARRAY_OFFSET_COL2						0x00000d10
-#define  NV10TCL_VERTEX_ARRAY_FORMAT_COL2						0x00000d14
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_COL2_TYPE_SHIFT					0
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_COL2_TYPE_MASK					0x0000000f
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_COL2_FIELDS_SHIFT					4
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_COL2_FIELDS_MASK					0x000000f0
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_COL2_STRIDE_SHIFT					8
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_COL2_STRIDE_MASK					0x0000ff00
-#define  NV10TCL_VERTEX_ARRAY_OFFSET_TX0						0x00000d18
-#define  NV10TCL_VERTEX_ARRAY_FORMAT_TX0						0x00000d1c
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_TX0_TYPE_SHIFT					0
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_TX0_TYPE_MASK					0x0000000f
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_TX0_FIELDS_SHIFT					4
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_TX0_FIELDS_MASK					0x000000f0
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_TX0_STRIDE_SHIFT					8
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_TX0_STRIDE_MASK					0x0000ff00
-#define  NV10TCL_VERTEX_ARRAY_OFFSET_TX1						0x00000d20
-#define  NV10TCL_VERTEX_ARRAY_FORMAT_TX1						0x00000d24
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_TX1_TYPE_SHIFT					0
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_TX1_TYPE_MASK					0x0000000f
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_TX1_FIELDS_SHIFT					4
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_TX1_FIELDS_MASK					0x000000f0
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_TX1_STRIDE_SHIFT					8
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_TX1_STRIDE_MASK					0x0000ff00
-#define  NV10TCL_VERTEX_ARRAY_OFFSET_NOR						0x00000d28
-#define  NV10TCL_VERTEX_ARRAY_FORMAT_NOR						0x00000d2c
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_NOR_TYPE_SHIFT					0
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_NOR_TYPE_MASK					0x0000000f
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_NOR_FIELDS_SHIFT					4
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_NOR_FIELDS_MASK					0x000000f0
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_NOR_STRIDE_SHIFT					8
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_NOR_STRIDE_MASK					0x0000ff00
-#define  NV10TCL_VERTEX_ARRAY_OFFSET_WGH						0x00000d30
-#define  NV10TCL_VERTEX_ARRAY_FORMAT_WGH						0x00000d34
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_WGH_TYPE_SHIFT					0
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_WGH_TYPE_MASK					0x0000000f
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_WGH_FIELDS_SHIFT					4
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_WGH_FIELDS_MASK					0x000000f0
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_WGH_STRIDE_SHIFT					8
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_WGH_STRIDE_MASK					0x0000ff00
-#define  NV10TCL_VERTEX_ARRAY_OFFSET_FOG						0x00000d38
-#define  NV10TCL_VERTEX_ARRAY_FORMAT_FOG						0x00000d3c
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_FOG_TYPE_SHIFT					0
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_FOG_TYPE_MASK					0x0000000f
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_FOG_FIELDS_SHIFT					4
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_FOG_FIELDS_MASK					0x000000f0
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_FOG_STRIDE_SHIFT					8
-#define   NV10TCL_VERTEX_ARRAY_FORMAT_FOG_STRIDE_MASK					0x0000ff00
-#define  NV10TCL_VERTEX_BEGIN_END							0x00000dfc
-#define   NV10TCL_VERTEX_BEGIN_END_STOP							0x00000000
-#define   NV10TCL_VERTEX_BEGIN_END_POINTS						0x00000001
-#define   NV10TCL_VERTEX_BEGIN_END_LINES						0x00000002
-#define   NV10TCL_VERTEX_BEGIN_END_LINE_LOOP						0x00000003
-#define   NV10TCL_VERTEX_BEGIN_END_LINE_STRIP						0x00000004
-#define   NV10TCL_VERTEX_BEGIN_END_TRIANGLES						0x00000005
-#define   NV10TCL_VERTEX_BEGIN_END_TRIANGLE_STRIP					0x00000006
-#define   NV10TCL_VERTEX_BEGIN_END_TRIANGLE_FAN						0x00000007
-#define   NV10TCL_VERTEX_BEGIN_END_QUADS						0x00000008
-#define   NV10TCL_VERTEX_BEGIN_END_QUAD_STRIP						0x00000009
-#define   NV10TCL_VERTEX_BEGIN_END_POLYGON						0x0000000a
-#define  NV10TCL_VB_ELEMENT_U16								0x00000e00
-#define   NV10TCL_VB_ELEMENT_U16_I0_SHIFT						0
-#define   NV10TCL_VB_ELEMENT_U16_I0_MASK						0x0000ffff
-#define   NV10TCL_VB_ELEMENT_U16_I1_SHIFT						16
-#define   NV10TCL_VB_ELEMENT_U16_I1_MASK						0xffff0000
-#define  NV10TCL_VB_ELEMENT_U32								0x00001100
-#define  NV10TCL_VERTEX_BUFFER_BEGIN_END						0x000013fc
-#define   NV10TCL_VERTEX_BUFFER_BEGIN_END_STOP						0x00000000
-#define   NV10TCL_VERTEX_BUFFER_BEGIN_END_POINTS					0x00000001
-#define   NV10TCL_VERTEX_BUFFER_BEGIN_END_LINES						0x00000002
-#define   NV10TCL_VERTEX_BUFFER_BEGIN_END_LINE_LOOP					0x00000003
-#define   NV10TCL_VERTEX_BUFFER_BEGIN_END_LINE_STRIP					0x00000004
-#define   NV10TCL_VERTEX_BUFFER_BEGIN_END_TRIANGLES					0x00000005
-#define   NV10TCL_VERTEX_BUFFER_BEGIN_END_TRIANGLE_STRIP				0x00000006
-#define   NV10TCL_VERTEX_BUFFER_BEGIN_END_TRIANGLE_FAN					0x00000007
-#define   NV10TCL_VERTEX_BUFFER_BEGIN_END_QUADS						0x00000008
-#define   NV10TCL_VERTEX_BUFFER_BEGIN_END_QUAD_STRIP					0x00000009
-#define   NV10TCL_VERTEX_BUFFER_BEGIN_END_POLYGON					0x0000000a
-#define  NV10TCL_VERTEX_BUFFER_DRAW_ARRAYS						0x00001400
-#define   NV10TCL_VERTEX_BUFFER_DRAW_ARRAYS_FIRST_SHIFT					0
-#define   NV10TCL_VERTEX_BUFFER_DRAW_ARRAYS_FIRST_MASK					0x0000ffff
-#define   NV10TCL_VERTEX_BUFFER_DRAW_ARRAYS_LAST_SHIFT					24
-#define   NV10TCL_VERTEX_BUFFER_DRAW_ARRAYS_LAST_MASK					0xff000000
-#define  NV10TCL_VERTEX_ARRAY_DATA							0x00001800
-
-
-#define NV04_CONTEXT_COLOR_KEY								0x00000057
-
-
-
-#define NV03_CONTEXT_SURFACES_2D							0x00000058
-
-#define  NV03_CONTEXT_SURFACES_2D_SYNCHRONIZE						0x00000100
-#define  NV03_CONTEXT_SURFACES_2D_DMA_NOTIFY						0x00000180
-#define  NV03_CONTEXT_SURFACES_2D_DMA_SOURCE						0x00000184
-#define  NV03_CONTEXT_SURFACES_2D_DMA_DESTIN						0x00000188
-#define  NV03_CONTEXT_SURFACES_2D_COLOR_FORMAT						0x00000300
-#define  NV03_CONTEXT_SURFACES_2D_PITCH							0x00000304
-#define   NV03_CONTEXT_SURFACES_2D_PITCH_SOURCE_SHIFT					0
-#define   NV03_CONTEXT_SURFACES_2D_PITCH_SOURCE_MASK					0x0000ffff
-#define   NV03_CONTEXT_SURFACES_2D_PITCH_DESTIN_SHIFT					16
-#define   NV03_CONTEXT_SURFACES_2D_PITCH_DESTIN_MASK					0xffff0000
-#define  NV03_CONTEXT_SURFACES_2D_OFFSET_SOURCE						0x00000308
-#define  NV03_CONTEXT_SURFACES_2D_OFFSET_DESTIN						0x0000030c
-
-
-#define NV03_CONTEXT_SURFACES_3D							0x0000005a
-
-#define  NV03_CONTEXT_SURFACES_3D_SYNCHRONIZE						0x00000100
-#define  NV03_CONTEXT_SURFACES_3D_DMA_NOTIFY						0x00000180
-#define  NV03_CONTEXT_SURFACES_3D_DMA_SURFACE						0x00000184
-#define  NV03_CONTEXT_SURFACES_3D_PITCH							0x00000300
-#define  NV03_CONTEXT_SURFACES_3D_OFFSET_COLOR						0x00000304
-#define  NV03_CONTEXT_SURFACES_3D_OFFSET_ZETA						0x00000308
-
-
-#define NV04_RENDER_SOLID_LINE								0x0000005c
-
-#define  NV04_RENDER_SOLID_LINE_SURFACE							0x00000198
-
-
-#define NV04_RENDER_SOLID_TRIANGLE							0x0000005d
-
-
-
-#define NV04_RENDER_SOLID_RECTANGLE							0x0000005e
-
-#define  NV04_RENDER_SOLID_RECTANGLE_SURFACE						0x00000198
-
-
-#define NV04_IMAGE_BLIT									0x0000005f
-
-#define  NV04_IMAGE_BLIT_NOP								0x00000100
-#define  NV04_IMAGE_BLIT_NOTIFY								0x00000104
-#define  NV04_IMAGE_BLIT_DMA_NOTIFY							0x00000180
-#define  NV04_IMAGE_BLIT_COLOR_KEY							0x00000184
-#define  NV04_IMAGE_BLIT_CLIP_RECTANGLE							0x00000188
-#define  NV04_IMAGE_BLIT_PATTERN							0x0000018c
-#define  NV04_IMAGE_BLIT_ROP								0x00000190
-#define  NV04_IMAGE_BLIT_BETA4								0x00000198
-#define  NV04_IMAGE_BLIT_SURFACE							0x0000019c
-#define  NV04_IMAGE_BLIT_OPERATION							0x000002fc
-#define   NV04_IMAGE_BLIT_OPERATION_SRCCOPY_AND						0x00000000
-#define   NV04_IMAGE_BLIT_OPERATION_ROP_AND						0x00000001
-#define   NV04_IMAGE_BLIT_OPERATION_BLEND_AND						0x00000002
-#define   NV04_IMAGE_BLIT_OPERATION_SRCCOPY						0x00000003
-#define   NV04_IMAGE_BLIT_OPERATION_SRCCOPY_PREMULT					0x00000004
-#define   NV04_IMAGE_BLIT_OPERATION_BLEND_PREMULT					0x00000005
-
-
-#define NV04_INDEXED_IMAGE_FROM_CPU							0x00000060
-
-#define  NV04_INDEXED_IMAGE_FROM_CPU_NOP						0x00000100
-#define  NV04_INDEXED_IMAGE_FROM_CPU_NOTIFY						0x00000104
-#define  NV04_INDEXED_IMAGE_FROM_CPU_PATCH						0x0000010c
-#define  NV04_INDEXED_IMAGE_FROM_CPU_DMA_NOTIFY						0x00000180
-#define  NV04_INDEXED_IMAGE_FROM_CPU_DMA_LUT						0x00000184
-#define  NV04_INDEXED_IMAGE_FROM_CPU_COLOR_FORMAT					0x000003e8
-#define  NV04_INDEXED_IMAGE_FROM_CPU_INDEX_FORMAT					0x000003ec
-#define  NV04_INDEXED_IMAGE_FROM_CPU_LUT_OFFSET						0x000003f0
-#define  NV04_INDEXED_IMAGE_FROM_CPU_POINT						0x000003f4
-#define  NV04_INDEXED_IMAGE_FROM_CPU_SIZE_OUT						0x000003f8
-#define  NV04_INDEXED_IMAGE_FROM_CPU_SIZE_IN						0x000003fc
-#define  NV04_INDEXED_IMAGE_FROM_CPU_COLOR						0x00000400
-
-
-#define NV04_IMAGE_FROM_CPU								0x00000061
-
-#define  NV04_IMAGE_FROM_CPU_BETA4							0x00000198
-#define  NV04_IMAGE_FROM_CPU_SURFACE							0x0000019c
-
-
-#define NV10_CONTEXT_SURFACES_2D							0x00000062
-
-
-
-#define NV05_SCALED_IMAGE_FROM_MEMORY							0x00000063
-
-#define  NV05_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION					0x000002fc
-#define   NV05_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_DITHER				0x00000000
-#define   NV05_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_TRUNCATE			0x00000001
-#define   NV05_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_SUBTR_TRUNCATE			0x00000002
-
-
-#define NV01_IMAGE_SRCCOPY_AND								0x00000064
-
-#define  NV01_IMAGE_SRCCOPY_AND_NOTIFY							0x00000104
-#define  NV01_IMAGE_SRCCOPY_AND_DMA_NOTIFY						0x00000180
-#define  NV01_IMAGE_SRCCOPY_AND_IMAGE_OUTPUT						0x00000200
-#define  NV01_IMAGE_SRCCOPY_AND_IMAGE_INPUT						0x00000204
-
-
-#define NV05_INDEXED_IMAGE_FROM_CPU							0x00000064
-
-#define  NV05_INDEXED_IMAGE_FROM_CPU_COLOR_KEY						0x00000188
-#define  NV05_INDEXED_IMAGE_FROM_CPU_CLIP_RECTANGLE					0x0000018c
-#define  NV05_INDEXED_IMAGE_FROM_CPU_PATTERN						0x00000190
-#define  NV05_INDEXED_IMAGE_FROM_CPU_ROP						0x00000194
-#define  NV05_INDEXED_IMAGE_FROM_CPU_BETA1						0x00000198
-#define  NV05_INDEXED_IMAGE_FROM_CPU_BETA4						0x0000019c
-#define  NV05_INDEXED_IMAGE_FROM_CPU_SURFACE						0x000001a0
-#define  NV05_INDEXED_IMAGE_FROM_CPU_COLOR_CONVERSION					0x000003e0
-#define  NV05_INDEXED_IMAGE_FROM_CPU_OPERATION						0x000003e4
-#define  NV05_INDEXED_IMAGE_FROM_CPU_INDICES						0x00000400
-
-
-#define NV05_IMAGE_FROM_CPU								0x00000065
-
-#define  NV05_IMAGE_FROM_CPU_BETA4							0x00000198
-#define  NV05_IMAGE_FROM_CPU_SURFACE							0x0000019c
-
-
-#define NV05_STRETCHED_IMAGE_FROM_CPU							0x00000066
-
-#define  NV05_STRETCHED_IMAGE_FROM_CPU_BETA4						0x00000194
-#define  NV05_STRETCHED_IMAGE_FROM_CPU_SURFACE						0x00000198
-#define  NV05_STRETCHED_IMAGE_FROM_CPU_COLOR_CONVERSION					0x000002f8
-
-
-#define NV04_IMAGE_BLEND_PREMULT							0x00000067
-
-#define  NV04_IMAGE_BLEND_PREMULT_NOP							0x00000100
-#define  NV04_IMAGE_BLEND_PREMULT_NOTIFY						0x00000104
-#define  NV04_IMAGE_BLEND_PREMULT_DMA_NOTIFY						0x00000180
-#define  NV04_IMAGE_BLEND_PREMULT_IMAGE_OUTPUT						0x00000200
-#define  NV04_IMAGE_BLEND_PREMULT_BETA_INPUT						0x00000204
-#define  NV04_IMAGE_BLEND_PREMULT_IMAGE_INPUT						0x00000208
-
-
-#define NV03_CHANNEL_PIO								0x0000006a
-
-
-
-#define NV03_CHANNEL_DMA								0x0000006b
-
-
-
-#define NV04_BETA_SOLID									0x00000072
-
-#define  NV04_BETA_SOLID_NOP								0x00000100
-#define  NV04_BETA_SOLID_NOTIFY								0x00000104
-#define  NV04_BETA_SOLID_DMA_NOTIFY							0x00000180
-#define  NV04_BETA_SOLID_BETA_OUTPUT							0x00000200
-#define  NV04_BETA_SOLID_BETA_FACTOR							0x00000300
-
-
-#define NV04_STRETCHED_IMAGE_FROM_CPU							0x00000076
-
-
-
-#define NV04_SCALED_IMAGE_FROM_MEMORY							0x00000077
-
-#define  NV04_SCALED_IMAGE_FROM_MEMORY_NOP						0x00000100
-#define  NV04_SCALED_IMAGE_FROM_MEMORY_NOTIFY						0x00000104
-#define  NV04_SCALED_IMAGE_FROM_MEMORY_DMA_NOTIFY					0x00000180
-#define  NV04_SCALED_IMAGE_FROM_MEMORY_DMA_IMAGE					0x00000184
-#define  NV04_SCALED_IMAGE_FROM_MEMORY_PATTERN						0x00000188
-#define  NV04_SCALED_IMAGE_FROM_MEMORY_ROP						0x0000018c
-#define  NV04_SCALED_IMAGE_FROM_MEMORY_BETA1						0x00000190
-#define  NV04_SCALED_IMAGE_FROM_MEMORY_BETA4						0x00000194
-#define  NV04_SCALED_IMAGE_FROM_MEMORY_SURFACE						0x00000198
-#define  NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION					0x000002fc
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_DITHER				0x00000000
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_TRUNCATE			0x00000001
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_SUBTR_TRUNCATE			0x00000002
-#define  NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT					0x00000300
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A1R5G5B5				0x00000001
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_X1R5G5B5				0x00000002
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A8R8G8B8				0x00000003
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_X8R8G8B8				0x00000004
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_V8YB8U8YA8				0x00000005
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_YB8V8YA8U8				0x00000006
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_R5G6B5				0x00000007
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_Y8					0x00000008
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_AY8				0x00000009
-#define  NV04_SCALED_IMAGE_FROM_MEMORY_OPERATION					0x00000304
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY_AND				0x00000000
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_OPERATION_ROP_AND				0x00000001
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_OPERATION_BLEND_AND				0x00000002
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY				0x00000003
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY_PREMULT			0x00000004
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_OPERATION_BLEND_PREMULT				0x00000005
-#define  NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT					0x00000308
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_X_SHIFT				0
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_X_MASK				0x0000ffff
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_Y_SHIFT				16
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_Y_MASK				0xffff0000
-#define  NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE					0x0000030c
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_W_SHIFT				0
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_W_MASK				0x0000ffff
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_H_SHIFT				16
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_H_MASK				0xffff0000
-#define  NV04_SCALED_IMAGE_FROM_MEMORY_OUT_POINT					0x00000310
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_OUT_POINT_X_SHIFT				0
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_OUT_POINT_X_MASK				0x0000ffff
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_OUT_POINT_Y_SHIFT				16
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_OUT_POINT_Y_MASK				0xffff0000
-#define  NV04_SCALED_IMAGE_FROM_MEMORY_OUT_SIZE						0x00000314
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_OUT_SIZE_W_SHIFT				0
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_OUT_SIZE_W_MASK					0x0000ffff
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_OUT_SIZE_H_SHIFT				16
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_OUT_SIZE_H_MASK					0xffff0000
-#define  NV04_SCALED_IMAGE_FROM_MEMORY_DU_DX						0x00000318
-#define  NV04_SCALED_IMAGE_FROM_MEMORY_DV_DY						0x0000031c
-#define  NV04_SCALED_IMAGE_FROM_MEMORY_SIZE						0x00000400
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_SIZE_W_SHIFT					0
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_SIZE_W_MASK					0x0000ffff
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_SIZE_H_SHIFT					16
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_SIZE_H_MASK					0xffff0000
-#define  NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT						0x00000404
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_PITCH_SHIFT				0
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_PITCH_MASK				0x0000ffff
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_SHIFT				16
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_MASK				0x00ff0000
-#define    NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_CENTER				0x00010000
-#define    NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_CORNER				0x00020000
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_SHIFT				24
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_MASK				0xff000000
-#define    NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_POINT_SAMPLE			0x00000000
-#define    NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_BILINEAR				0x01000000
-#define  NV04_SCALED_IMAGE_FROM_MEMORY_ADDRESS						0x00000408
-#define  NV04_SCALED_IMAGE_FROM_MEMORY_POINT						0x0000040c
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_POINT_X_SHIFT					0
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_POINT_X_MASK					0x0000ffff
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_POINT_Y_SHIFT					16
-#define   NV04_SCALED_IMAGE_FROM_MEMORY_POINT_Y_MASK					0xffff0000
-
-
-#define NV10_TEXTURE_FROM_CPU								0x0000007b
-
-#define  NV10_TEXTURE_FROM_CPU_NOP							0x00000100
-#define  NV10_TEXTURE_FROM_CPU_NOTIFY							0x00000104
-#define  NV10_TEXTURE_FROM_CPU_WAIT_FOR_IDLE						0x00000108
-#define  NV10_TEXTURE_FROM_CPU_PM_TRIGGER						0x00000140
-#define  NV10_TEXTURE_FROM_CPU_DMA_NOTIFY						0x00000180
-#define  NV10_TEXTURE_FROM_CPU_SURFACE							0x00000184
-#define  NV10_TEXTURE_FROM_CPU_COLOR_FORMAT						0x00000300
-#define  NV10_TEXTURE_FROM_CPU_POINT							0x00000304
-#define   NV10_TEXTURE_FROM_CPU_POINT_X_SHIFT						0
-#define   NV10_TEXTURE_FROM_CPU_POINT_X_MASK						0x0000ffff
-#define   NV10_TEXTURE_FROM_CPU_POINT_Y_SHIFT						16
-#define   NV10_TEXTURE_FROM_CPU_POINT_Y_MASK						0xffff0000
-#define  NV10_TEXTURE_FROM_CPU_SIZE							0x00000308
-#define   NV10_TEXTURE_FROM_CPU_SIZE_W_SHIFT						0
-#define   NV10_TEXTURE_FROM_CPU_SIZE_W_MASK						0x0000ffff
-#define   NV10_TEXTURE_FROM_CPU_SIZE_H_SHIFT						16
-#define   NV10_TEXTURE_FROM_CPU_SIZE_H_MASK						0xffff0000
-#define  NV10_TEXTURE_FROM_CPU_CLIP_HORIZONTAL						0x0000030c
-#define   NV10_TEXTURE_FROM_CPU_CLIP_HORIZONTAL_X_SHIFT					0
-#define   NV10_TEXTURE_FROM_CPU_CLIP_HORIZONTAL_X_MASK					0x0000ffff
-#define   NV10_TEXTURE_FROM_CPU_CLIP_HORIZONTAL_W_SHIFT					16
-#define   NV10_TEXTURE_FROM_CPU_CLIP_HORIZONTAL_W_MASK					0xffff0000
-#define  NV10_TEXTURE_FROM_CPU_CLIP_VERTICAL						0x00000310
-#define   NV10_TEXTURE_FROM_CPU_CLIP_VERTICAL_Y_SHIFT					0
-#define   NV10_TEXTURE_FROM_CPU_CLIP_VERTICAL_Y_MASK					0x0000ffff
-#define   NV10_TEXTURE_FROM_CPU_CLIP_VERTICAL_H_SHIFT					16
-#define   NV10_TEXTURE_FROM_CPU_CLIP_VERTICAL_H_MASK					0xffff0000
-#define  NV10_TEXTURE_FROM_CPU_COLOR(x)							(0x00000400+((x)*4))
-#define  NV10_TEXTURE_FROM_CPU_COLOR__SIZE						0x00000700
-
-
-#define NV10_VIDEO_DISPLAY								0x0000007c
-
-
-
-#define NV10_DVD_SUBPICTURE								0x00000088
-
-
-
-#define NV10_SCALED_IMAGE_FROM_MEMORY							0x00000089
-
-#define  NV10_SCALED_IMAGE_FROM_MEMORY_WAIT_FOR_IDLE					0x00000108
-
-
-#define NV10_IMAGE_FROM_CPU								0x0000008a
-
-#define  NV10_IMAGE_FROM_CPU_COLOR_CONVERSION						0x000002f8
-
-
-#define NV10_CONTEXT_SURFACES_3D							0x00000093
-
-
-
-#define NV10_DX5_TEXTURE_TRIANGLE							0x00000094
-
-
-
-#define NV10_DX6_MULTI_TEXTURE_TRIANGLE							0x00000095
-
-
-
-#define NV11TCL										0x00000096
-
-#define  NV11TCL_COLOR_LOGIC_OP_ENABLE							0x00000d40
-#define  NV11TCL_COLOR_LOGIC_OP_OP							0x00000d44
-#define   NV11TCL_COLOR_LOGIC_OP_OP_CLEAR						0x00001500
-#define   NV11TCL_COLOR_LOGIC_OP_OP_AND							0x00001501
-#define   NV11TCL_COLOR_LOGIC_OP_OP_AND_REVERSE						0x00001502
-#define   NV11TCL_COLOR_LOGIC_OP_OP_COPY						0x00001503
-#define   NV11TCL_COLOR_LOGIC_OP_OP_AND_INVERTED					0x00001504
-#define   NV11TCL_COLOR_LOGIC_OP_OP_NOOP						0x00001505
-#define   NV11TCL_COLOR_LOGIC_OP_OP_XOR							0x00001506
-#define   NV11TCL_COLOR_LOGIC_OP_OP_OR							0x00001507
-#define   NV11TCL_COLOR_LOGIC_OP_OP_NOR							0x00001508
-#define   NV11TCL_COLOR_LOGIC_OP_OP_EQUIV						0x00001509
-#define   NV11TCL_COLOR_LOGIC_OP_OP_INVERT						0x0000150a
-#define   NV11TCL_COLOR_LOGIC_OP_OP_OR_REVERSE						0x0000150b
-#define   NV11TCL_COLOR_LOGIC_OP_OP_COPY_INVERTED					0x0000150c
-#define   NV11TCL_COLOR_LOGIC_OP_OP_OR_INVERTED						0x0000150d
-#define   NV11TCL_COLOR_LOGIC_OP_OP_NAND						0x0000150e
-#define   NV11TCL_COLOR_LOGIC_OP_OP_SET							0x0000150f
-
-
-#define NV20TCL										0x00000097
-
-#define  NV20TCL_NOP									0x00000100
-#define  NV20TCL_NOTIFY									0x00000104
-#define  NV20TCL_DMA_NOTIFY								0x00000180
-#define  NV20TCL_DMA_TEXTURE0								0x00000184
-#define  NV20TCL_DMA_TEXTURE1								0x00000188
-#define  NV20TCL_DMA_COLOR								0x00000194
-#define  NV20TCL_DMA_ZETA								0x00000198
-#define  NV20TCL_DMA_VTXBUF0								0x0000019c
-#define  NV20TCL_DMA_VTXBUF1								0x000001a0
-#define  NV20TCL_DMA_FENCE								0x000001a4
-#define  NV20TCL_DMA_QUERY								0x000001a8
-#define  NV20TCL_RT_HORIZ								0x00000200
-#define   NV20TCL_RT_HORIZ_X_SHIFT							0
-#define   NV20TCL_RT_HORIZ_X_MASK							0x0000ffff
-#define   NV20TCL_RT_HORIZ_W_SHIFT							16
-#define   NV20TCL_RT_HORIZ_W_MASK							0xffff0000
-#define  NV20TCL_RT_VERT								0x00000204
-#define   NV20TCL_RT_VERT_Y_SHIFT							0
-#define   NV20TCL_RT_VERT_Y_MASK							0x0000ffff
-#define   NV20TCL_RT_VERT_H_SHIFT							16
-#define   NV20TCL_RT_VERT_H_MASK							0xffff0000
-#define  NV20TCL_RT_FORMAT								0x00000208
-#define   NV20TCL_RT_FORMAT_TYPE_SHIFT							8
-#define   NV20TCL_RT_FORMAT_TYPE_MASK							0x00000f00
-#define    NV20TCL_RT_FORMAT_TYPE_LINEAR						0x00000100
-#define    NV20TCL_RT_FORMAT_TYPE_SWIZZLED						0x00000200
-#define   NV20TCL_RT_FORMAT_COLOR_SHIFT							0
-#define   NV20TCL_RT_FORMAT_COLOR_MASK							0x0000001f
-#define    NV20TCL_RT_FORMAT_COLOR_R5G6B5						0x00000003
-#define    NV20TCL_RT_FORMAT_COLOR_X8R8G8B8						0x00000005
-#define    NV20TCL_RT_FORMAT_COLOR_A8R8G8B8						0x00000008
-#define    NV20TCL_RT_FORMAT_COLOR_B8							0x00000009
-#define    NV20TCL_RT_FORMAT_COLOR_UNKNOWN						0x0000000d
-#define    NV20TCL_RT_FORMAT_COLOR_X8B8G8R8						0x0000000f
-#define    NV20TCL_RT_FORMAT_COLOR_A8B8G8R8						0x00000010
-#define  NV20TCL_RT_PITCH								0x0000020c
-#define   NV20TCL_RT_PITCH_COLOR_PITCH_SHIFT						0
-#define   NV20TCL_RT_PITCH_COLOR_PITCH_MASK						0x0000ffff
-#define   NV20TCL_RT_PITCH_ZETA_PITCH_SHIFT						16
-#define   NV20TCL_RT_PITCH_ZETA_PITCH_MASK						0xffff0000
-#define  NV20TCL_COLOR_OFFSET								0x00000210
-#define  NV20TCL_ZETA_OFFSET								0x00000214
-#define  NV20TCL_RC_IN_ALPHA(x)								(0x00000260+((x)*4))
-#define  NV20TCL_RC_IN_ALPHA__SIZE							0x00000008
-#define   NV20TCL_RC_IN_ALPHA_D_INPUT_SHIFT						0
-#define   NV20TCL_RC_IN_ALPHA_D_INPUT_MASK						0x0000000f
-#define    NV20TCL_RC_IN_ALPHA_D_INPUT_ZERO						0x00000000
-#define    NV20TCL_RC_IN_ALPHA_D_INPUT_CONSTANT_COLOR0_NV				0x00000001
-#define    NV20TCL_RC_IN_ALPHA_D_INPUT_CONSTANT_COLOR1_NV				0x00000002
-#define    NV20TCL_RC_IN_ALPHA_D_INPUT_FOG						0x00000003
-#define    NV20TCL_RC_IN_ALPHA_D_INPUT_PRIMARY_COLOR_NV					0x00000004
-#define    NV20TCL_RC_IN_ALPHA_D_INPUT_SECONDARY_COLOR_NV				0x00000005
-#define    NV20TCL_RC_IN_ALPHA_D_INPUT_TEXTURE0_ARB					0x00000008
-#define    NV20TCL_RC_IN_ALPHA_D_INPUT_TEXTURE1_ARB					0x00000009
-#define    NV20TCL_RC_IN_ALPHA_D_INPUT_SPARE0_NV					0x0000000c
-#define    NV20TCL_RC_IN_ALPHA_D_INPUT_SPARE1_NV					0x0000000d
-#define    NV20TCL_RC_IN_ALPHA_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x0000000e
-#define    NV20TCL_RC_IN_ALPHA_D_INPUT_E_TIMES_F_NV					0x0000000f
-#define   NV20TCL_RC_IN_ALPHA_D_COMPONENT_USAGE						(1 <<  4)
-#define    NV20TCL_RC_IN_ALPHA_D_COMPONENT_USAGE_BLUE					0x00000000
-#define    NV20TCL_RC_IN_ALPHA_D_COMPONENT_USAGE_ALPHA					0x00000010
-#define   NV20TCL_RC_IN_ALPHA_D_MAPPING_SHIFT						5
-#define   NV20TCL_RC_IN_ALPHA_D_MAPPING_MASK						0x000000e0
-#define    NV20TCL_RC_IN_ALPHA_D_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV20TCL_RC_IN_ALPHA_D_MAPPING_UNSIGNED_INVERT_NV				0x00000020
-#define    NV20TCL_RC_IN_ALPHA_D_MAPPING_EXPAND_NORMAL_NV				0x00000040
-#define    NV20TCL_RC_IN_ALPHA_D_MAPPING_EXPAND_NEGATE_NV				0x00000060
-#define    NV20TCL_RC_IN_ALPHA_D_MAPPING_HALF_BIAS_NORMAL_NV				0x00000080
-#define    NV20TCL_RC_IN_ALPHA_D_MAPPING_HALF_BIAS_NEGATE_NV				0x000000a0
-#define    NV20TCL_RC_IN_ALPHA_D_MAPPING_SIGNED_IDENTITY_NV				0x000000c0
-#define    NV20TCL_RC_IN_ALPHA_D_MAPPING_SIGNED_NEGATE_NV				0x000000e0
-#define   NV20TCL_RC_IN_ALPHA_C_INPUT_SHIFT						8
-#define   NV20TCL_RC_IN_ALPHA_C_INPUT_MASK						0x00000f00
-#define    NV20TCL_RC_IN_ALPHA_C_INPUT_ZERO						0x00000000
-#define    NV20TCL_RC_IN_ALPHA_C_INPUT_CONSTANT_COLOR0_NV				0x00000100
-#define    NV20TCL_RC_IN_ALPHA_C_INPUT_CONSTANT_COLOR1_NV				0x00000200
-#define    NV20TCL_RC_IN_ALPHA_C_INPUT_FOG						0x00000300
-#define    NV20TCL_RC_IN_ALPHA_C_INPUT_PRIMARY_COLOR_NV					0x00000400
-#define    NV20TCL_RC_IN_ALPHA_C_INPUT_SECONDARY_COLOR_NV				0x00000500
-#define    NV20TCL_RC_IN_ALPHA_C_INPUT_TEXTURE0_ARB					0x00000800
-#define    NV20TCL_RC_IN_ALPHA_C_INPUT_TEXTURE1_ARB					0x00000900
-#define    NV20TCL_RC_IN_ALPHA_C_INPUT_SPARE0_NV					0x00000c00
-#define    NV20TCL_RC_IN_ALPHA_C_INPUT_SPARE1_NV					0x00000d00
-#define    NV20TCL_RC_IN_ALPHA_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x00000e00
-#define    NV20TCL_RC_IN_ALPHA_C_INPUT_E_TIMES_F_NV					0x00000f00
-#define   NV20TCL_RC_IN_ALPHA_C_COMPONENT_USAGE						(1 << 12)
-#define    NV20TCL_RC_IN_ALPHA_C_COMPONENT_USAGE_BLUE					0x00000000
-#define    NV20TCL_RC_IN_ALPHA_C_COMPONENT_USAGE_ALPHA					0x00001000
-#define   NV20TCL_RC_IN_ALPHA_C_MAPPING_SHIFT						13
-#define   NV20TCL_RC_IN_ALPHA_C_MAPPING_MASK						0x0000e000
-#define    NV20TCL_RC_IN_ALPHA_C_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV20TCL_RC_IN_ALPHA_C_MAPPING_UNSIGNED_INVERT_NV				0x00002000
-#define    NV20TCL_RC_IN_ALPHA_C_MAPPING_EXPAND_NORMAL_NV				0x00004000
-#define    NV20TCL_RC_IN_ALPHA_C_MAPPING_EXPAND_NEGATE_NV				0x00006000
-#define    NV20TCL_RC_IN_ALPHA_C_MAPPING_HALF_BIAS_NORMAL_NV				0x00008000
-#define    NV20TCL_RC_IN_ALPHA_C_MAPPING_HALF_BIAS_NEGATE_NV				0x0000a000
-#define    NV20TCL_RC_IN_ALPHA_C_MAPPING_SIGNED_IDENTITY_NV				0x0000c000
-#define    NV20TCL_RC_IN_ALPHA_C_MAPPING_SIGNED_NEGATE_NV				0x0000e000
-#define   NV20TCL_RC_IN_ALPHA_B_INPUT_SHIFT						16
-#define   NV20TCL_RC_IN_ALPHA_B_INPUT_MASK						0x000f0000
-#define    NV20TCL_RC_IN_ALPHA_B_INPUT_ZERO						0x00000000
-#define    NV20TCL_RC_IN_ALPHA_B_INPUT_CONSTANT_COLOR0_NV				0x00010000
-#define    NV20TCL_RC_IN_ALPHA_B_INPUT_CONSTANT_COLOR1_NV				0x00020000
-#define    NV20TCL_RC_IN_ALPHA_B_INPUT_FOG						0x00030000
-#define    NV20TCL_RC_IN_ALPHA_B_INPUT_PRIMARY_COLOR_NV					0x00040000
-#define    NV20TCL_RC_IN_ALPHA_B_INPUT_SECONDARY_COLOR_NV				0x00050000
-#define    NV20TCL_RC_IN_ALPHA_B_INPUT_TEXTURE0_ARB					0x00080000
-#define    NV20TCL_RC_IN_ALPHA_B_INPUT_TEXTURE1_ARB					0x00090000
-#define    NV20TCL_RC_IN_ALPHA_B_INPUT_SPARE0_NV					0x000c0000
-#define    NV20TCL_RC_IN_ALPHA_B_INPUT_SPARE1_NV					0x000d0000
-#define    NV20TCL_RC_IN_ALPHA_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x000e0000
-#define    NV20TCL_RC_IN_ALPHA_B_INPUT_E_TIMES_F_NV					0x000f0000
-#define   NV20TCL_RC_IN_ALPHA_B_COMPONENT_USAGE						(1 << 20)
-#define    NV20TCL_RC_IN_ALPHA_B_COMPONENT_USAGE_BLUE					0x00000000
-#define    NV20TCL_RC_IN_ALPHA_B_COMPONENT_USAGE_ALPHA					0x00100000
-#define   NV20TCL_RC_IN_ALPHA_B_MAPPING_SHIFT						21
-#define   NV20TCL_RC_IN_ALPHA_B_MAPPING_MASK						0x00e00000
-#define    NV20TCL_RC_IN_ALPHA_B_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV20TCL_RC_IN_ALPHA_B_MAPPING_UNSIGNED_INVERT_NV				0x00200000
-#define    NV20TCL_RC_IN_ALPHA_B_MAPPING_EXPAND_NORMAL_NV				0x00400000
-#define    NV20TCL_RC_IN_ALPHA_B_MAPPING_EXPAND_NEGATE_NV				0x00600000
-#define    NV20TCL_RC_IN_ALPHA_B_MAPPING_HALF_BIAS_NORMAL_NV				0x00800000
-#define    NV20TCL_RC_IN_ALPHA_B_MAPPING_HALF_BIAS_NEGATE_NV				0x00a00000
-#define    NV20TCL_RC_IN_ALPHA_B_MAPPING_SIGNED_IDENTITY_NV				0x00c00000
-#define    NV20TCL_RC_IN_ALPHA_B_MAPPING_SIGNED_NEGATE_NV				0x00e00000
-#define   NV20TCL_RC_IN_ALPHA_A_INPUT_SHIFT						24
-#define   NV20TCL_RC_IN_ALPHA_A_INPUT_MASK						0x0f000000
-#define    NV20TCL_RC_IN_ALPHA_A_INPUT_ZERO						0x00000000
-#define    NV20TCL_RC_IN_ALPHA_A_INPUT_CONSTANT_COLOR0_NV				0x01000000
-#define    NV20TCL_RC_IN_ALPHA_A_INPUT_CONSTANT_COLOR1_NV				0x02000000
-#define    NV20TCL_RC_IN_ALPHA_A_INPUT_FOG						0x03000000
-#define    NV20TCL_RC_IN_ALPHA_A_INPUT_PRIMARY_COLOR_NV					0x04000000
-#define    NV20TCL_RC_IN_ALPHA_A_INPUT_SECONDARY_COLOR_NV				0x05000000
-#define    NV20TCL_RC_IN_ALPHA_A_INPUT_TEXTURE0_ARB					0x08000000
-#define    NV20TCL_RC_IN_ALPHA_A_INPUT_TEXTURE1_ARB					0x09000000
-#define    NV20TCL_RC_IN_ALPHA_A_INPUT_SPARE0_NV					0x0c000000
-#define    NV20TCL_RC_IN_ALPHA_A_INPUT_SPARE1_NV					0x0d000000
-#define    NV20TCL_RC_IN_ALPHA_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x0e000000
-#define    NV20TCL_RC_IN_ALPHA_A_INPUT_E_TIMES_F_NV					0x0f000000
-#define   NV20TCL_RC_IN_ALPHA_A_COMPONENT_USAGE						(1 << 28)
-#define    NV20TCL_RC_IN_ALPHA_A_COMPONENT_USAGE_BLUE					0x00000000
-#define    NV20TCL_RC_IN_ALPHA_A_COMPONENT_USAGE_ALPHA					0x10000000
-#define   NV20TCL_RC_IN_ALPHA_A_MAPPING_SHIFT						29
-#define   NV20TCL_RC_IN_ALPHA_A_MAPPING_MASK						0xe0000000
-#define    NV20TCL_RC_IN_ALPHA_A_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV20TCL_RC_IN_ALPHA_A_MAPPING_UNSIGNED_INVERT_NV				0x20000000
-#define    NV20TCL_RC_IN_ALPHA_A_MAPPING_EXPAND_NORMAL_NV				0x40000000
-#define    NV20TCL_RC_IN_ALPHA_A_MAPPING_EXPAND_NEGATE_NV				0x60000000
-#define    NV20TCL_RC_IN_ALPHA_A_MAPPING_HALF_BIAS_NORMAL_NV				0x80000000
-#define    NV20TCL_RC_IN_ALPHA_A_MAPPING_HALF_BIAS_NEGATE_NV				0xa0000000
-#define    NV20TCL_RC_IN_ALPHA_A_MAPPING_SIGNED_IDENTITY_NV				0xc0000000
-#define    NV20TCL_RC_IN_ALPHA_A_MAPPING_SIGNED_NEGATE_NV				0xe0000000
-#define  NV20TCL_RC_FINAL0								0x00000288
-#define   NV20TCL_RC_FINAL0_D_INPUT_SHIFT						0
-#define   NV20TCL_RC_FINAL0_D_INPUT_MASK						0x0000000f
-#define    NV20TCL_RC_FINAL0_D_INPUT_ZERO						0x00000000
-#define    NV20TCL_RC_FINAL0_D_INPUT_CONSTANT_COLOR0_NV					0x00000001
-#define    NV20TCL_RC_FINAL0_D_INPUT_CONSTANT_COLOR1_NV					0x00000002
-#define    NV20TCL_RC_FINAL0_D_INPUT_FOG						0x00000003
-#define    NV20TCL_RC_FINAL0_D_INPUT_PRIMARY_COLOR_NV					0x00000004
-#define    NV20TCL_RC_FINAL0_D_INPUT_SECONDARY_COLOR_NV					0x00000005
-#define    NV20TCL_RC_FINAL0_D_INPUT_TEXTURE0_ARB					0x00000008
-#define    NV20TCL_RC_FINAL0_D_INPUT_TEXTURE1_ARB					0x00000009
-#define    NV20TCL_RC_FINAL0_D_INPUT_SPARE0_NV						0x0000000c
-#define    NV20TCL_RC_FINAL0_D_INPUT_SPARE1_NV						0x0000000d
-#define    NV20TCL_RC_FINAL0_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x0000000e
-#define    NV20TCL_RC_FINAL0_D_INPUT_E_TIMES_F_NV					0x0000000f
-#define   NV20TCL_RC_FINAL0_D_COMPONENT_USAGE						(1 <<  4)
-#define    NV20TCL_RC_FINAL0_D_COMPONENT_USAGE_RGB					0x00000000
-#define    NV20TCL_RC_FINAL0_D_COMPONENT_USAGE_ALPHA					0x00000010
-#define   NV20TCL_RC_FINAL0_D_MAPPING_SHIFT						5
-#define   NV20TCL_RC_FINAL0_D_MAPPING_MASK						0x000000e0
-#define    NV20TCL_RC_FINAL0_D_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV20TCL_RC_FINAL0_D_MAPPING_UNSIGNED_INVERT_NV				0x00000020
-#define    NV20TCL_RC_FINAL0_D_MAPPING_EXPAND_NORMAL_NV					0x00000040
-#define    NV20TCL_RC_FINAL0_D_MAPPING_EXPAND_NEGATE_NV					0x00000060
-#define    NV20TCL_RC_FINAL0_D_MAPPING_HALF_BIAS_NORMAL_NV				0x00000080
-#define    NV20TCL_RC_FINAL0_D_MAPPING_HALF_BIAS_NEGATE_NV				0x000000a0
-#define    NV20TCL_RC_FINAL0_D_MAPPING_SIGNED_IDENTITY_NV				0x000000c0
-#define    NV20TCL_RC_FINAL0_D_MAPPING_SIGNED_NEGATE_NV					0x000000e0
-#define   NV20TCL_RC_FINAL0_C_INPUT_SHIFT						8
-#define   NV20TCL_RC_FINAL0_C_INPUT_MASK						0x00000f00
-#define    NV20TCL_RC_FINAL0_C_INPUT_ZERO						0x00000000
-#define    NV20TCL_RC_FINAL0_C_INPUT_CONSTANT_COLOR0_NV					0x00000100
-#define    NV20TCL_RC_FINAL0_C_INPUT_CONSTANT_COLOR1_NV					0x00000200
-#define    NV20TCL_RC_FINAL0_C_INPUT_FOG						0x00000300
-#define    NV20TCL_RC_FINAL0_C_INPUT_PRIMARY_COLOR_NV					0x00000400
-#define    NV20TCL_RC_FINAL0_C_INPUT_SECONDARY_COLOR_NV					0x00000500
-#define    NV20TCL_RC_FINAL0_C_INPUT_TEXTURE0_ARB					0x00000800
-#define    NV20TCL_RC_FINAL0_C_INPUT_TEXTURE1_ARB					0x00000900
-#define    NV20TCL_RC_FINAL0_C_INPUT_SPARE0_NV						0x00000c00
-#define    NV20TCL_RC_FINAL0_C_INPUT_SPARE1_NV						0x00000d00
-#define    NV20TCL_RC_FINAL0_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x00000e00
-#define    NV20TCL_RC_FINAL0_C_INPUT_E_TIMES_F_NV					0x00000f00
-#define   NV20TCL_RC_FINAL0_C_COMPONENT_USAGE						(1 << 12)
-#define    NV20TCL_RC_FINAL0_C_COMPONENT_USAGE_RGB					0x00000000
-#define    NV20TCL_RC_FINAL0_C_COMPONENT_USAGE_ALPHA					0x00001000
-#define   NV20TCL_RC_FINAL0_C_MAPPING_SHIFT						13
-#define   NV20TCL_RC_FINAL0_C_MAPPING_MASK						0x0000e000
-#define    NV20TCL_RC_FINAL0_C_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV20TCL_RC_FINAL0_C_MAPPING_UNSIGNED_INVERT_NV				0x00002000
-#define    NV20TCL_RC_FINAL0_C_MAPPING_EXPAND_NORMAL_NV					0x00004000
-#define    NV20TCL_RC_FINAL0_C_MAPPING_EXPAND_NEGATE_NV					0x00006000
-#define    NV20TCL_RC_FINAL0_C_MAPPING_HALF_BIAS_NORMAL_NV				0x00008000
-#define    NV20TCL_RC_FINAL0_C_MAPPING_HALF_BIAS_NEGATE_NV				0x0000a000
-#define    NV20TCL_RC_FINAL0_C_MAPPING_SIGNED_IDENTITY_NV				0x0000c000
-#define    NV20TCL_RC_FINAL0_C_MAPPING_SIGNED_NEGATE_NV					0x0000e000
-#define   NV20TCL_RC_FINAL0_B_INPUT_SHIFT						16
-#define   NV20TCL_RC_FINAL0_B_INPUT_MASK						0x000f0000
-#define    NV20TCL_RC_FINAL0_B_INPUT_ZERO						0x00000000
-#define    NV20TCL_RC_FINAL0_B_INPUT_CONSTANT_COLOR0_NV					0x00010000
-#define    NV20TCL_RC_FINAL0_B_INPUT_CONSTANT_COLOR1_NV					0x00020000
-#define    NV20TCL_RC_FINAL0_B_INPUT_FOG						0x00030000
-#define    NV20TCL_RC_FINAL0_B_INPUT_PRIMARY_COLOR_NV					0x00040000
-#define    NV20TCL_RC_FINAL0_B_INPUT_SECONDARY_COLOR_NV					0x00050000
-#define    NV20TCL_RC_FINAL0_B_INPUT_TEXTURE0_ARB					0x00080000
-#define    NV20TCL_RC_FINAL0_B_INPUT_TEXTURE1_ARB					0x00090000
-#define    NV20TCL_RC_FINAL0_B_INPUT_SPARE0_NV						0x000c0000
-#define    NV20TCL_RC_FINAL0_B_INPUT_SPARE1_NV						0x000d0000
-#define    NV20TCL_RC_FINAL0_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x000e0000
-#define    NV20TCL_RC_FINAL0_B_INPUT_E_TIMES_F_NV					0x000f0000
-#define   NV20TCL_RC_FINAL0_B_COMPONENT_USAGE						(1 << 20)
-#define    NV20TCL_RC_FINAL0_B_COMPONENT_USAGE_RGB					0x00000000
-#define    NV20TCL_RC_FINAL0_B_COMPONENT_USAGE_ALPHA					0x00100000
-#define   NV20TCL_RC_FINAL0_B_MAPPING_SHIFT						21
-#define   NV20TCL_RC_FINAL0_B_MAPPING_MASK						0x00e00000
-#define    NV20TCL_RC_FINAL0_B_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV20TCL_RC_FINAL0_B_MAPPING_UNSIGNED_INVERT_NV				0x00200000
-#define    NV20TCL_RC_FINAL0_B_MAPPING_EXPAND_NORMAL_NV					0x00400000
-#define    NV20TCL_RC_FINAL0_B_MAPPING_EXPAND_NEGATE_NV					0x00600000
-#define    NV20TCL_RC_FINAL0_B_MAPPING_HALF_BIAS_NORMAL_NV				0x00800000
-#define    NV20TCL_RC_FINAL0_B_MAPPING_HALF_BIAS_NEGATE_NV				0x00a00000
-#define    NV20TCL_RC_FINAL0_B_MAPPING_SIGNED_IDENTITY_NV				0x00c00000
-#define    NV20TCL_RC_FINAL0_B_MAPPING_SIGNED_NEGATE_NV					0x00e00000
-#define   NV20TCL_RC_FINAL0_A_INPUT_SHIFT						24
-#define   NV20TCL_RC_FINAL0_A_INPUT_MASK						0x0f000000
-#define    NV20TCL_RC_FINAL0_A_INPUT_ZERO						0x00000000
-#define    NV20TCL_RC_FINAL0_A_INPUT_CONSTANT_COLOR0_NV					0x01000000
-#define    NV20TCL_RC_FINAL0_A_INPUT_CONSTANT_COLOR1_NV					0x02000000
-#define    NV20TCL_RC_FINAL0_A_INPUT_FOG						0x03000000
-#define    NV20TCL_RC_FINAL0_A_INPUT_PRIMARY_COLOR_NV					0x04000000
-#define    NV20TCL_RC_FINAL0_A_INPUT_SECONDARY_COLOR_NV					0x05000000
-#define    NV20TCL_RC_FINAL0_A_INPUT_TEXTURE0_ARB					0x08000000
-#define    NV20TCL_RC_FINAL0_A_INPUT_TEXTURE1_ARB					0x09000000
-#define    NV20TCL_RC_FINAL0_A_INPUT_SPARE0_NV						0x0c000000
-#define    NV20TCL_RC_FINAL0_A_INPUT_SPARE1_NV						0x0d000000
-#define    NV20TCL_RC_FINAL0_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x0e000000
-#define    NV20TCL_RC_FINAL0_A_INPUT_E_TIMES_F_NV					0x0f000000
-#define   NV20TCL_RC_FINAL0_A_COMPONENT_USAGE						(1 << 28)
-#define    NV20TCL_RC_FINAL0_A_COMPONENT_USAGE_RGB					0x00000000
-#define    NV20TCL_RC_FINAL0_A_COMPONENT_USAGE_ALPHA					0x10000000
-#define   NV20TCL_RC_FINAL0_A_MAPPING_SHIFT						29
-#define   NV20TCL_RC_FINAL0_A_MAPPING_MASK						0xe0000000
-#define    NV20TCL_RC_FINAL0_A_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV20TCL_RC_FINAL0_A_MAPPING_UNSIGNED_INVERT_NV				0x20000000
-#define    NV20TCL_RC_FINAL0_A_MAPPING_EXPAND_NORMAL_NV					0x40000000
-#define    NV20TCL_RC_FINAL0_A_MAPPING_EXPAND_NEGATE_NV					0x60000000
-#define    NV20TCL_RC_FINAL0_A_MAPPING_HALF_BIAS_NORMAL_NV				0x80000000
-#define    NV20TCL_RC_FINAL0_A_MAPPING_HALF_BIAS_NEGATE_NV				0xa0000000
-#define    NV20TCL_RC_FINAL0_A_MAPPING_SIGNED_IDENTITY_NV				0xc0000000
-#define    NV20TCL_RC_FINAL0_A_MAPPING_SIGNED_NEGATE_NV					0xe0000000
-#define  NV20TCL_RC_FINAL1								0x0000028c
-#define   NV20TCL_RC_FINAL1_COLOR_SUM_CLAMP						(1 <<  7)
-#define   NV20TCL_RC_FINAL1_G_INPUT_SHIFT						8
-#define   NV20TCL_RC_FINAL1_G_INPUT_MASK						0x00000f00
-#define    NV20TCL_RC_FINAL1_G_INPUT_ZERO						0x00000000
-#define    NV20TCL_RC_FINAL1_G_INPUT_CONSTANT_COLOR0_NV					0x00000100
-#define    NV20TCL_RC_FINAL1_G_INPUT_CONSTANT_COLOR1_NV					0x00000200
-#define    NV20TCL_RC_FINAL1_G_INPUT_FOG						0x00000300
-#define    NV20TCL_RC_FINAL1_G_INPUT_PRIMARY_COLOR_NV					0x00000400
-#define    NV20TCL_RC_FINAL1_G_INPUT_SECONDARY_COLOR_NV					0x00000500
-#define    NV20TCL_RC_FINAL1_G_INPUT_TEXTURE0_ARB					0x00000800
-#define    NV20TCL_RC_FINAL1_G_INPUT_TEXTURE1_ARB					0x00000900
-#define    NV20TCL_RC_FINAL1_G_INPUT_SPARE0_NV						0x00000c00
-#define    NV20TCL_RC_FINAL1_G_INPUT_SPARE1_NV						0x00000d00
-#define    NV20TCL_RC_FINAL1_G_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x00000e00
-#define    NV20TCL_RC_FINAL1_G_INPUT_E_TIMES_F_NV					0x00000f00
-#define   NV20TCL_RC_FINAL1_G_COMPONENT_USAGE						(1 << 12)
-#define    NV20TCL_RC_FINAL1_G_COMPONENT_USAGE_RGB					0x00000000
-#define    NV20TCL_RC_FINAL1_G_COMPONENT_USAGE_ALPHA					0x00001000
-#define   NV20TCL_RC_FINAL1_G_MAPPING_SHIFT						13
-#define   NV20TCL_RC_FINAL1_G_MAPPING_MASK						0x0000e000
-#define    NV20TCL_RC_FINAL1_G_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV20TCL_RC_FINAL1_G_MAPPING_UNSIGNED_INVERT_NV				0x00002000
-#define    NV20TCL_RC_FINAL1_G_MAPPING_EXPAND_NORMAL_NV					0x00004000
-#define    NV20TCL_RC_FINAL1_G_MAPPING_EXPAND_NEGATE_NV					0x00006000
-#define    NV20TCL_RC_FINAL1_G_MAPPING_HALF_BIAS_NORMAL_NV				0x00008000
-#define    NV20TCL_RC_FINAL1_G_MAPPING_HALF_BIAS_NEGATE_NV				0x0000a000
-#define    NV20TCL_RC_FINAL1_G_MAPPING_SIGNED_IDENTITY_NV				0x0000c000
-#define    NV20TCL_RC_FINAL1_G_MAPPING_SIGNED_NEGATE_NV					0x0000e000
-#define   NV20TCL_RC_FINAL1_F_INPUT_SHIFT						16
-#define   NV20TCL_RC_FINAL1_F_INPUT_MASK						0x000f0000
-#define    NV20TCL_RC_FINAL1_F_INPUT_ZERO						0x00000000
-#define    NV20TCL_RC_FINAL1_F_INPUT_CONSTANT_COLOR0_NV					0x00010000
-#define    NV20TCL_RC_FINAL1_F_INPUT_CONSTANT_COLOR1_NV					0x00020000
-#define    NV20TCL_RC_FINAL1_F_INPUT_FOG						0x00030000
-#define    NV20TCL_RC_FINAL1_F_INPUT_PRIMARY_COLOR_NV					0x00040000
-#define    NV20TCL_RC_FINAL1_F_INPUT_SECONDARY_COLOR_NV					0x00050000
-#define    NV20TCL_RC_FINAL1_F_INPUT_TEXTURE0_ARB					0x00080000
-#define    NV20TCL_RC_FINAL1_F_INPUT_TEXTURE1_ARB					0x00090000
-#define    NV20TCL_RC_FINAL1_F_INPUT_SPARE0_NV						0x000c0000
-#define    NV20TCL_RC_FINAL1_F_INPUT_SPARE1_NV						0x000d0000
-#define    NV20TCL_RC_FINAL1_F_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x000e0000
-#define    NV20TCL_RC_FINAL1_F_INPUT_E_TIMES_F_NV					0x000f0000
-#define   NV20TCL_RC_FINAL1_F_COMPONENT_USAGE						(1 << 20)
-#define    NV20TCL_RC_FINAL1_F_COMPONENT_USAGE_RGB					0x00000000
-#define    NV20TCL_RC_FINAL1_F_COMPONENT_USAGE_ALPHA					0x00100000
-#define   NV20TCL_RC_FINAL1_F_MAPPING_SHIFT						21
-#define   NV20TCL_RC_FINAL1_F_MAPPING_MASK						0x00e00000
-#define    NV20TCL_RC_FINAL1_F_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV20TCL_RC_FINAL1_F_MAPPING_UNSIGNED_INVERT_NV				0x00200000
-#define    NV20TCL_RC_FINAL1_F_MAPPING_EXPAND_NORMAL_NV					0x00400000
-#define    NV20TCL_RC_FINAL1_F_MAPPING_EXPAND_NEGATE_NV					0x00600000
-#define    NV20TCL_RC_FINAL1_F_MAPPING_HALF_BIAS_NORMAL_NV				0x00800000
-#define    NV20TCL_RC_FINAL1_F_MAPPING_HALF_BIAS_NEGATE_NV				0x00a00000
-#define    NV20TCL_RC_FINAL1_F_MAPPING_SIGNED_IDENTITY_NV				0x00c00000
-#define    NV20TCL_RC_FINAL1_F_MAPPING_SIGNED_NEGATE_NV					0x00e00000
-#define   NV20TCL_RC_FINAL1_E_INPUT_SHIFT						24
-#define   NV20TCL_RC_FINAL1_E_INPUT_MASK						0x0f000000
-#define    NV20TCL_RC_FINAL1_E_INPUT_ZERO						0x00000000
-#define    NV20TCL_RC_FINAL1_E_INPUT_CONSTANT_COLOR0_NV					0x01000000
-#define    NV20TCL_RC_FINAL1_E_INPUT_CONSTANT_COLOR1_NV					0x02000000
-#define    NV20TCL_RC_FINAL1_E_INPUT_FOG						0x03000000
-#define    NV20TCL_RC_FINAL1_E_INPUT_PRIMARY_COLOR_NV					0x04000000
-#define    NV20TCL_RC_FINAL1_E_INPUT_SECONDARY_COLOR_NV					0x05000000
-#define    NV20TCL_RC_FINAL1_E_INPUT_TEXTURE0_ARB					0x08000000
-#define    NV20TCL_RC_FINAL1_E_INPUT_TEXTURE1_ARB					0x09000000
-#define    NV20TCL_RC_FINAL1_E_INPUT_SPARE0_NV						0x0c000000
-#define    NV20TCL_RC_FINAL1_E_INPUT_SPARE1_NV						0x0d000000
-#define    NV20TCL_RC_FINAL1_E_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x0e000000
-#define    NV20TCL_RC_FINAL1_E_INPUT_E_TIMES_F_NV					0x0f000000
-#define   NV20TCL_RC_FINAL1_E_COMPONENT_USAGE						(1 << 28)
-#define    NV20TCL_RC_FINAL1_E_COMPONENT_USAGE_RGB					0x00000000
-#define    NV20TCL_RC_FINAL1_E_COMPONENT_USAGE_ALPHA					0x10000000
-#define   NV20TCL_RC_FINAL1_E_MAPPING_SHIFT						29
-#define   NV20TCL_RC_FINAL1_E_MAPPING_MASK						0xe0000000
-#define    NV20TCL_RC_FINAL1_E_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV20TCL_RC_FINAL1_E_MAPPING_UNSIGNED_INVERT_NV				0x20000000
-#define    NV20TCL_RC_FINAL1_E_MAPPING_EXPAND_NORMAL_NV					0x40000000
-#define    NV20TCL_RC_FINAL1_E_MAPPING_EXPAND_NEGATE_NV					0x60000000
-#define    NV20TCL_RC_FINAL1_E_MAPPING_HALF_BIAS_NORMAL_NV				0x80000000
-#define    NV20TCL_RC_FINAL1_E_MAPPING_HALF_BIAS_NEGATE_NV				0xa0000000
-#define    NV20TCL_RC_FINAL1_E_MAPPING_SIGNED_IDENTITY_NV				0xc0000000
-#define    NV20TCL_RC_FINAL1_E_MAPPING_SIGNED_NEGATE_NV					0xe0000000
-#define  NV20TCL_LIGHT_CONTROL								0x00000294
-#define  NV20TCL_FOG_MODE								0x0000029c
-#define   NV20TCL_FOG_MODE_EXP								0x00000800
-#define   NV20TCL_FOG_MODE_EXP_2							0x00000802
-#define   NV20TCL_FOG_MODE_EXP2								0x00000803
-#define   NV20TCL_FOG_MODE_LINEAR							0x00000804
-#define   NV20TCL_FOG_MODE_LINEAR_2							0x00002601
-#define  NV20TCL_FOG_COORD_DIST								0x000002a0
-#define   NV20TCL_FOG_COORD_DIST_COORD_FALSE						0x00000000
-#define   NV20TCL_FOG_COORD_DIST_COORD_FRAGMENT_DEPTH_DISTANCE_EYE_RADIAL_NV		0x00000001
-#define   NV20TCL_FOG_COORD_DIST_COORD_FRAGMENT_DEPTH_DISTANCE_EYE_PLANE_ABSOLUTE_NV	0x00000002
-#define   NV20TCL_FOG_COORD_DIST_COORD_FOG						0x00000003
-#define  NV20TCL_FOG_ENABLE								0x000002a4
-#define  NV20TCL_FOG_COLOR								0x000002a8
-#define   NV20TCL_FOG_COLOR_R_SHIFT							0
-#define   NV20TCL_FOG_COLOR_R_MASK							0x000000ff
-#define   NV20TCL_FOG_COLOR_G_SHIFT							8
-#define   NV20TCL_FOG_COLOR_G_MASK							0x0000ff00
-#define   NV20TCL_FOG_COLOR_B_SHIFT							16
-#define   NV20TCL_FOG_COLOR_B_MASK							0x00ff0000
-#define   NV20TCL_FOG_COLOR_A_SHIFT							24
-#define   NV20TCL_FOG_COLOR_A_MASK							0xff000000
-#define  NV20TCL_VIEWPORT_CLIP_MODE							0x000002b4
-#define  NV20TCL_VIEWPORT_CLIP_HORIZ(x)							(0x000002c0+((x)*4))
-#define  NV20TCL_VIEWPORT_CLIP_HORIZ__SIZE						0x00000008
-#define  NV20TCL_VIEWPORT_CLIP_VERT(x)							(0x000002e0+((x)*4))
-#define  NV20TCL_VIEWPORT_CLIP_VERT__SIZE						0x00000008
-#define  NV20TCL_ALPHA_FUNC_ENABLE							0x00000300
-#define  NV20TCL_BLEND_FUNC_ENABLE							0x00000304
-#define  NV20TCL_CULL_FACE_ENABLE							0x00000308
-#define  NV20TCL_DEPTH_TEST_ENABLE							0x0000030c
-#define  NV20TCL_DITHER_ENABLE								0x00000310
-#define  NV20TCL_LIGHTING_ENABLE							0x00000314
-#define  NV20TCL_POINT_PARAMETERS_ENABLE						0x00000318
-#define  NV20TCL_POINT_SMOOTH_ENABLE							0x0000031c
-#define  NV20TCL_LINE_SMOOTH_ENABLE							0x00000320
-#define  NV20TCL_POLYGON_SMOOTH_ENABLE							0x00000324
-#define  NV20TCL_STENCIL_ENABLE								0x0000032c
-#define  NV20TCL_POLYGON_OFFSET_POINT_ENABLE						0x00000330
-#define  NV20TCL_POLYGON_OFFSET_LINE_ENABLE						0x00000334
-#define  NV20TCL_POLYGON_OFFSET_FILL_ENABLE						0x00000338
-#define  NV20TCL_ALPHA_FUNC_FUNC							0x0000033c
-#define   NV20TCL_ALPHA_FUNC_FUNC_NEVER							0x00000200
-#define   NV20TCL_ALPHA_FUNC_FUNC_LESS							0x00000201
-#define   NV20TCL_ALPHA_FUNC_FUNC_EQUAL							0x00000202
-#define   NV20TCL_ALPHA_FUNC_FUNC_LEQUAL						0x00000203
-#define   NV20TCL_ALPHA_FUNC_FUNC_GREATER						0x00000204
-#define   NV20TCL_ALPHA_FUNC_FUNC_GREATER						0x00000204
-#define   NV20TCL_ALPHA_FUNC_FUNC_NOTEQUAL						0x00000205
-#define   NV20TCL_ALPHA_FUNC_FUNC_GEQUAL						0x00000206
-#define   NV20TCL_ALPHA_FUNC_FUNC_ALWAYS						0x00000207
-#define  NV20TCL_ALPHA_FUNC_REF								0x00000340
-#define  NV20TCL_BLEND_FUNC_SRC								0x00000344
-#define   NV20TCL_BLEND_FUNC_SRC_ZERO							0x00000000
-#define   NV20TCL_BLEND_FUNC_SRC_ONE							0x00000001
-#define   NV20TCL_BLEND_FUNC_SRC_SRC_COLOR						0x00000300
-#define   NV20TCL_BLEND_FUNC_SRC_ONE_MINUS_SRC_COLOR					0x00000301
-#define   NV20TCL_BLEND_FUNC_SRC_SRC_ALPHA						0x00000302
-#define   NV20TCL_BLEND_FUNC_SRC_ONE_MINUS_SRC_ALPHA					0x00000303
-#define   NV20TCL_BLEND_FUNC_SRC_DST_ALPHA						0x00000304
-#define   NV20TCL_BLEND_FUNC_SRC_ONE_MINUS_DST_ALPHA					0x00000305
-#define   NV20TCL_BLEND_FUNC_SRC_DST_COLOR						0x00000306
-#define   NV20TCL_BLEND_FUNC_SRC_ONE_MINUS_DST_COLOR					0x00000307
-#define   NV20TCL_BLEND_FUNC_SRC_SRC_ALPHA_SATURATE					0x00000308
-#define   NV20TCL_BLEND_FUNC_SRC_CONSTANT_COLOR						0x00008001
-#define   NV20TCL_BLEND_FUNC_SRC_ONE_MINUS_CONSTANT_COLOR				0x00008002
-#define   NV20TCL_BLEND_FUNC_SRC_CONSTANT_ALPHA						0x00008003
-#define   NV20TCL_BLEND_FUNC_SRC_ONE_MINUS_CONSTANT_ALPHA				0x00008004
-#define  NV20TCL_BLEND_FUNC_DST								0x00000348
-#define   NV20TCL_BLEND_FUNC_DST_ZERO							0x00000000
-#define   NV20TCL_BLEND_FUNC_DST_ONE							0x00000001
-#define   NV20TCL_BLEND_FUNC_DST_SRC_COLOR						0x00000300
-#define   NV20TCL_BLEND_FUNC_DST_ONE_MINUS_SRC_COLOR					0x00000301
-#define   NV20TCL_BLEND_FUNC_DST_SRC_ALPHA						0x00000302
-#define   NV20TCL_BLEND_FUNC_DST_ONE_MINUS_SRC_ALPHA					0x00000303
-#define   NV20TCL_BLEND_FUNC_DST_DST_ALPHA						0x00000304
-#define   NV20TCL_BLEND_FUNC_DST_ONE_MINUS_DST_ALPHA					0x00000305
-#define   NV20TCL_BLEND_FUNC_DST_DST_COLOR						0x00000306
-#define   NV20TCL_BLEND_FUNC_DST_ONE_MINUS_DST_COLOR					0x00000307
-#define   NV20TCL_BLEND_FUNC_DST_SRC_ALPHA_SATURATE					0x00000308
-#define   NV20TCL_BLEND_FUNC_DST_CONSTANT_COLOR						0x00008001
-#define   NV20TCL_BLEND_FUNC_DST_ONE_MINUS_CONSTANT_COLOR				0x00008002
-#define   NV20TCL_BLEND_FUNC_DST_CONSTANT_ALPHA						0x00008003
-#define   NV20TCL_BLEND_FUNC_DST_ONE_MINUS_CONSTANT_ALPHA				0x00008004
-#define  NV20TCL_BLEND_COLOR								0x0000034c
-#define   NV20TCL_BLEND_COLOR_B_SHIFT							0
-#define   NV20TCL_BLEND_COLOR_B_MASK							0x000000ff
-#define   NV20TCL_BLEND_COLOR_G_SHIFT							8
-#define   NV20TCL_BLEND_COLOR_G_MASK							0x0000ff00
-#define   NV20TCL_BLEND_COLOR_R_SHIFT							16
-#define   NV20TCL_BLEND_COLOR_R_MASK							0x00ff0000
-#define   NV20TCL_BLEND_COLOR_A_SHIFT							24
-#define   NV20TCL_BLEND_COLOR_A_MASK							0xff000000
-#define  NV20TCL_BLEND_EQUATION								0x00000350
-#define   NV20TCL_BLEND_EQUATION_FUNC_ADD						0x00008006
-#define   NV20TCL_BLEND_EQUATION_MIN							0x00008007
-#define   NV20TCL_BLEND_EQUATION_MAX							0x00008008
-#define   NV20TCL_BLEND_EQUATION_FUNC_SUBTRACT						0x0000800a
-#define   NV20TCL_BLEND_EQUATION_FUNC_REVERSE_SUBTRACT					0x0000800b
-#define  NV20TCL_DEPTH_FUNC								0x00000354
-#define   NV20TCL_DEPTH_FUNC_NEVER							0x00000200
-#define   NV20TCL_DEPTH_FUNC_LESS							0x00000201
-#define   NV20TCL_DEPTH_FUNC_EQUAL							0x00000202
-#define   NV20TCL_DEPTH_FUNC_LEQUAL							0x00000203
-#define   NV20TCL_DEPTH_FUNC_GREATER							0x00000204
-#define   NV20TCL_DEPTH_FUNC_GREATER							0x00000204
-#define   NV20TCL_DEPTH_FUNC_NOTEQUAL							0x00000205
-#define   NV20TCL_DEPTH_FUNC_GEQUAL							0x00000206
-#define   NV20TCL_DEPTH_FUNC_ALWAYS							0x00000207
-#define  NV20TCL_COLOR_MASK								0x00000358
-#define   NV20TCL_COLOR_MASK_B								(1 <<  0)
-#define   NV20TCL_COLOR_MASK_G								(1 <<  8)
-#define   NV20TCL_COLOR_MASK_R								(1 << 16)
-#define   NV20TCL_COLOR_MASK_A								(1 << 24)
-#define  NV20TCL_DEPTH_WRITE_ENABLE							0x0000035c
-#define  NV20TCL_STENCIL_MASK								0x00000360
-#define  NV20TCL_STENCIL_FUNC_FUNC							0x00000364
-#define   NV20TCL_STENCIL_FUNC_FUNC_NEVER						0x00000200
-#define   NV20TCL_STENCIL_FUNC_FUNC_LESS						0x00000201
-#define   NV20TCL_STENCIL_FUNC_FUNC_EQUAL						0x00000202
-#define   NV20TCL_STENCIL_FUNC_FUNC_LEQUAL						0x00000203
-#define   NV20TCL_STENCIL_FUNC_FUNC_GREATER						0x00000204
-#define   NV20TCL_STENCIL_FUNC_FUNC_GREATER						0x00000204
-#define   NV20TCL_STENCIL_FUNC_FUNC_NOTEQUAL						0x00000205
-#define   NV20TCL_STENCIL_FUNC_FUNC_GEQUAL						0x00000206
-#define   NV20TCL_STENCIL_FUNC_FUNC_ALWAYS						0x00000207
-#define  NV20TCL_STENCIL_FUNC_REF							0x00000368
-#define  NV20TCL_STENCIL_FUNC_MASK							0x0000036c
-#define  NV20TCL_STENCIL_OP_FAIL							0x00000370
-#define   NV20TCL_STENCIL_OP_FAIL_ZERO							0x00000000
-#define   NV20TCL_STENCIL_OP_FAIL_INVERT						0x0000150a
-#define   NV20TCL_STENCIL_OP_FAIL_KEEP							0x00001e00
-#define   NV20TCL_STENCIL_OP_FAIL_REPLACE						0x00001e01
-#define   NV20TCL_STENCIL_OP_FAIL_INCR							0x00001e02
-#define   NV20TCL_STENCIL_OP_FAIL_DECR							0x00001e03
-#define   NV20TCL_STENCIL_OP_FAIL_INCR_WRAP						0x00008507
-#define   NV20TCL_STENCIL_OP_FAIL_DECR_WRAP						0x00008508
-#define  NV20TCL_STENCIL_OP_ZFAIL							0x00000374
-#define   NV20TCL_STENCIL_OP_ZFAIL_ZERO							0x00000000
-#define   NV20TCL_STENCIL_OP_ZFAIL_INVERT						0x0000150a
-#define   NV20TCL_STENCIL_OP_ZFAIL_KEEP							0x00001e00
-#define   NV20TCL_STENCIL_OP_ZFAIL_REPLACE						0x00001e01
-#define   NV20TCL_STENCIL_OP_ZFAIL_INCR							0x00001e02
-#define   NV20TCL_STENCIL_OP_ZFAIL_DECR							0x00001e03
-#define   NV20TCL_STENCIL_OP_ZFAIL_INCR_WRAP						0x00008507
-#define   NV20TCL_STENCIL_OP_ZFAIL_DECR_WRAP						0x00008508
-#define  NV20TCL_STENCIL_OP_ZPASS							0x00000378
-#define   NV20TCL_STENCIL_OP_ZPASS_ZERO							0x00000000
-#define   NV20TCL_STENCIL_OP_ZPASS_INVERT						0x0000150a
-#define   NV20TCL_STENCIL_OP_ZPASS_KEEP							0x00001e00
-#define   NV20TCL_STENCIL_OP_ZPASS_REPLACE						0x00001e01
-#define   NV20TCL_STENCIL_OP_ZPASS_INCR							0x00001e02
-#define   NV20TCL_STENCIL_OP_ZPASS_DECR							0x00001e03
-#define   NV20TCL_STENCIL_OP_ZPASS_INCR_WRAP						0x00008507
-#define   NV20TCL_STENCIL_OP_ZPASS_DECR_WRAP						0x00008508
-#define  NV20TCL_SHADE_MODEL								0x0000037c
-#define   NV20TCL_SHADE_MODEL_FLAT							0x00001d00
-#define   NV20TCL_SHADE_MODEL_SMOOTH							0x00001d01
-#define  NV20TCL_LINE_WIDTH								0x00000380
-#define  NV20TCL_POLYGON_OFFSET_FACTOR							0x00000384
-#define  NV20TCL_POLYGON_OFFSET_UNITS							0x00000388
-#define  NV20TCL_POLYGON_MODE_FRONT							0x0000038c
-#define   NV20TCL_POLYGON_MODE_FRONT_POINT						0x00001b00
-#define   NV20TCL_POLYGON_MODE_FRONT_LINE						0x00001b01
-#define   NV20TCL_POLYGON_MODE_FRONT_FILL						0x00001b02
-#define  NV20TCL_POLYGON_MODE_BACK							0x00000390
-#define   NV20TCL_POLYGON_MODE_BACK_POINT						0x00001b00
-#define   NV20TCL_POLYGON_MODE_BACK_LINE						0x00001b01
-#define   NV20TCL_POLYGON_MODE_BACK_FILL						0x00001b02
-#define  NV20TCL_DEPTH_RANGE_NEAR							0x00000394
-#define  NV20TCL_DEPTH_RANGE_FAR							0x00000398
-#define  NV20TCL_CULL_FACE								0x0000039c
-#define   NV20TCL_CULL_FACE_FRONT							0x00000404
-#define   NV20TCL_CULL_FACE_BACK							0x00000405
-#define   NV20TCL_CULL_FACE_FRONT_AND_BACK						0x00000408
-#define  NV20TCL_FRONT_FACE								0x000003a0
-#define   NV20TCL_FRONT_FACE_CW								0x00000900
-#define   NV20TCL_FRONT_FACE_CCW							0x00000901
-#define  NV20TCL_NORMALIZE_ENABLE							0x000003a4
-#define  NV20TCL_COLOR_MATERIAL_FRONT_R							0x000003a8
-#define  NV20TCL_COLOR_MATERIAL_FRONT_G							0x000003ac
-#define  NV20TCL_COLOR_MATERIAL_FRONT_B							0x000003b0
-#define  NV20TCL_COLOR_MATERIAL_FRONT_A							0x000003b4
-#define  NV20TCL_SEPARATE_SPECULAR_ENABLE						0x000003b8
-#define  NV20TCL_ENABLED_LIGHTS								0x000003bc
-#define  NV20TCL_TX_GEN_S(x)								(0x000003c0+((x)*16))
-#define  NV20TCL_TX_GEN_S__SIZE								0x00000004
-#define   NV20TCL_TX_GEN_S_FALSE							0x00000000
-#define   NV20TCL_TX_GEN_S_EYE_LINEAR							0x00002400
-#define   NV20TCL_TX_GEN_S_OBJECT_LINEAR						0x00002401
-#define   NV20TCL_TX_GEN_S_SPHERE_MAP							0x00002402
-#define   NV20TCL_TX_GEN_S_NORMAL_MAP							0x00008511
-#define   NV20TCL_TX_GEN_S_REFLECTION_MAP						0x00008512
-#define  NV20TCL_TX_GEN_T(x)								(0x000003c4+((x)*16))
-#define  NV20TCL_TX_GEN_T__SIZE								0x00000004
-#define   NV20TCL_TX_GEN_T_FALSE							0x00000000
-#define   NV20TCL_TX_GEN_T_EYE_LINEAR							0x00002400
-#define   NV20TCL_TX_GEN_T_OBJECT_LINEAR						0x00002401
-#define   NV20TCL_TX_GEN_T_SPHERE_MAP							0x00002402
-#define   NV20TCL_TX_GEN_T_NORMAL_MAP							0x00008511
-#define   NV20TCL_TX_GEN_T_REFLECTION_MAP						0x00008512
-#define  NV20TCL_TX_GEN_R(x)								(0x000003c8+((x)*16))
-#define  NV20TCL_TX_GEN_R__SIZE								0x00000004
-#define   NV20TCL_TX_GEN_R_FALSE							0x00000000
-#define   NV20TCL_TX_GEN_R_EYE_LINEAR							0x00002400
-#define   NV20TCL_TX_GEN_R_OBJECT_LINEAR						0x00002401
-#define   NV20TCL_TX_GEN_R_SPHERE_MAP							0x00002402
-#define   NV20TCL_TX_GEN_R_NORMAL_MAP							0x00008511
-#define   NV20TCL_TX_GEN_R_REFLECTION_MAP						0x00008512
-#define  NV20TCL_TX_GEN_Q(x)								(0x000003cc+((x)*16))
-#define  NV20TCL_TX_GEN_Q__SIZE								0x00000004
-#define   NV20TCL_TX_GEN_Q_FALSE							0x00000000
-#define   NV20TCL_TX_GEN_Q_EYE_LINEAR							0x00002400
-#define   NV20TCL_TX_GEN_Q_OBJECT_LINEAR						0x00002401
-#define   NV20TCL_TX_GEN_Q_SPHERE_MAP							0x00002402
-#define   NV20TCL_TX_GEN_Q_NORMAL_MAP							0x00008511
-#define   NV20TCL_TX_GEN_Q_REFLECTION_MAP						0x00008512
-#define  NV20TCL_TX_MATRIX_ENABLE(x)							(0x00000420+((x)*4))
-#define  NV20TCL_TX_MATRIX_ENABLE__SIZE							0x00000004
-#define  NV20TCL_POINT_SIZE								0x0000043c
-#define  NV20TCL_MODELVIEW0_MATRIX(x)							(0x00000480+((x)*4))
-#define  NV20TCL_MODELVIEW0_MATRIX__SIZE						0x00000010
-#define  NV20TCL_MODELVIEW1_MATRIX(x)							(0x000004c0+((x)*4))
-#define  NV20TCL_MODELVIEW1_MATRIX__SIZE						0x00000010
-#define  NV20TCL_MODELVIEW2_MATRIX(x)							(0x00000500+((x)*4))
-#define  NV20TCL_MODELVIEW2_MATRIX__SIZE						0x00000010
-#define  NV20TCL_MODELVIEW3_MATRIX(x)							(0x00000540+((x)*4))
-#define  NV20TCL_MODELVIEW3_MATRIX__SIZE						0x00000010
-#define  NV20TCL_INVERSE_MODELVIEW0_MATRIX(x)						(0x00000580+((x)*4))
-#define  NV20TCL_INVERSE_MODELVIEW0_MATRIX__SIZE					0x00000010
-#define  NV20TCL_INVERSE_MODELVIEW1_MATRIX(x)						(0x000005c0+((x)*4))
-#define  NV20TCL_INVERSE_MODELVIEW1_MATRIX__SIZE					0x00000010
-#define  NV20TCL_INVERSE_MODELVIEW2_MATRIX(x)						(0x00000600+((x)*4))
-#define  NV20TCL_INVERSE_MODELVIEW2_MATRIX__SIZE					0x00000010
-#define  NV20TCL_INVERSE_MODELVIEW3_MATRIX(x)						(0x00000640+((x)*4))
-#define  NV20TCL_INVERSE_MODELVIEW3_MATRIX__SIZE					0x00000010
-#define  NV20TCL_PROJECTION_MATRIX(x)							(0x00000680+((x)*4))
-#define  NV20TCL_PROJECTION_MATRIX__SIZE						0x00000010
-#define  NV20TCL_TX0_MATRIX(x)								(0x000006c0+((x)*4))
-#define  NV20TCL_TX0_MATRIX__SIZE							0x00000010
-#define  NV20TCL_TX1_MATRIX(x)								(0x00000700+((x)*4))
-#define  NV20TCL_TX1_MATRIX__SIZE							0x00000010
-#define  NV20TCL_TX2_MATRIX(x)								(0x00000740+((x)*4))
-#define  NV20TCL_TX2_MATRIX__SIZE							0x00000010
-#define  NV20TCL_TX3_MATRIX(x)								(0x00000780+((x)*4))
-#define  NV20TCL_TX3_MATRIX__SIZE							0x00000010
-#define  NV20TCL_TX0_CLIP_PLANE_A(x)							(0x00000840+((x)*16))
-#define  NV20TCL_TX0_CLIP_PLANE_A__SIZE							0x00000004
-#define  NV20TCL_TX0_CLIP_PLANE_B(x)							(0x00000844+((x)*16))
-#define  NV20TCL_TX0_CLIP_PLANE_B__SIZE							0x00000004
-#define  NV20TCL_TX0_CLIP_PLANE_C(x)							(0x00000848+((x)*16))
-#define  NV20TCL_TX0_CLIP_PLANE_C__SIZE							0x00000004
-#define  NV20TCL_TX0_CLIP_PLANE_D(x)							(0x0000084c+((x)*16))
-#define  NV20TCL_TX0_CLIP_PLANE_D__SIZE							0x00000004
-#define  NV20TCL_TX1_CLIP_PLANE_A(x)							(0x00000880+((x)*16))
-#define  NV20TCL_TX1_CLIP_PLANE_A__SIZE							0x00000004
-#define  NV20TCL_TX1_CLIP_PLANE_B(x)							(0x00000884+((x)*16))
-#define  NV20TCL_TX1_CLIP_PLANE_B__SIZE							0x00000004
-#define  NV20TCL_TX1_CLIP_PLANE_C(x)							(0x00000888+((x)*16))
-#define  NV20TCL_TX1_CLIP_PLANE_C__SIZE							0x00000004
-#define  NV20TCL_TX1_CLIP_PLANE_D(x)							(0x0000088c+((x)*16))
-#define  NV20TCL_TX1_CLIP_PLANE_D__SIZE							0x00000004
-#define  NV20TCL_TX2_CLIP_PLANE_A(x)							(0x000008c0+((x)*16))
-#define  NV20TCL_TX2_CLIP_PLANE_A__SIZE							0x00000004
-#define  NV20TCL_TX2_CLIP_PLANE_B(x)							(0x000008c4+((x)*16))
-#define  NV20TCL_TX2_CLIP_PLANE_B__SIZE							0x00000004
-#define  NV20TCL_TX2_CLIP_PLANE_C(x)							(0x000008c8+((x)*16))
-#define  NV20TCL_TX2_CLIP_PLANE_C__SIZE							0x00000004
-#define  NV20TCL_TX2_CLIP_PLANE_D(x)							(0x000008cc+((x)*16))
-#define  NV20TCL_TX2_CLIP_PLANE_D__SIZE							0x00000004
-#define  NV20TCL_TX3_CLIP_PLANE_A(x)							(0x00000900+((x)*16))
-#define  NV20TCL_TX3_CLIP_PLANE_A__SIZE							0x00000004
-#define  NV20TCL_TX3_CLIP_PLANE_B(x)							(0x00000904+((x)*16))
-#define  NV20TCL_TX3_CLIP_PLANE_B__SIZE							0x00000004
-#define  NV20TCL_TX3_CLIP_PLANE_C(x)							(0x00000908+((x)*16))
-#define  NV20TCL_TX3_CLIP_PLANE_C__SIZE							0x00000004
-#define  NV20TCL_TX3_CLIP_PLANE_D(x)							(0x0000090c+((x)*16))
-#define  NV20TCL_TX3_CLIP_PLANE_D__SIZE							0x00000004
-#define  NV20TCL_FOG_EQUATION_CONSTANT							0x000009c0
-#define  NV20TCL_FOG_EQUATION_LINEAR							0x000009c4
-#define  NV20TCL_FOG_EQUATION_QUADRATIC							0x000009c8
-#define  NV20TCL_FRONT_MATERIAL_SHININESS(x)						(0x000009e0+((x)*4))
-#define  NV20TCL_FRONT_MATERIAL_SHININESS__SIZE						0x00000006
-#define  NV20TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_R			0x00000a10
-#define  NV20TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_G			0x00000a14
-#define  NV20TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_B			0x00000a18
-#define  NV20TCL_VIEWPORT_SCALE0_X							0x00000a20
-#define  NV20TCL_VIEWPORT_SCALE0_Y							0x00000a24
-#define  NV20TCL_VIEWPORT_SCALE0_Z							0x00000a28
-#define  NV20TCL_VIEWPORT_SCALE0_W							0x00000a2c
-#define  NV20TCL_POINT_PARAMETER(x)							(0x00000a30+((x)*4))
-#define  NV20TCL_POINT_PARAMETER__SIZE							0x00000008
-#define  NV20TCL_RC_CONSTANT_COLOR0(x)							(0x00000a60+((x)*4))
-#define  NV20TCL_RC_CONSTANT_COLOR0__SIZE						0x00000008
-#define   NV20TCL_RC_CONSTANT_COLOR0_B_SHIFT						0
-#define   NV20TCL_RC_CONSTANT_COLOR0_B_MASK						0x000000ff
-#define   NV20TCL_RC_CONSTANT_COLOR0_G_SHIFT						8
-#define   NV20TCL_RC_CONSTANT_COLOR0_G_MASK						0x0000ff00
-#define   NV20TCL_RC_CONSTANT_COLOR0_R_SHIFT						16
-#define   NV20TCL_RC_CONSTANT_COLOR0_R_MASK						0x00ff0000
-#define   NV20TCL_RC_CONSTANT_COLOR0_A_SHIFT						24
-#define   NV20TCL_RC_CONSTANT_COLOR0_A_MASK						0xff000000
-#define  NV20TCL_RC_CONSTANT_COLOR1(x)							(0x00000a80+((x)*4))
-#define  NV20TCL_RC_CONSTANT_COLOR1__SIZE						0x00000008
-#define   NV20TCL_RC_CONSTANT_COLOR1_B_SHIFT						0
-#define   NV20TCL_RC_CONSTANT_COLOR1_B_MASK						0x000000ff
-#define   NV20TCL_RC_CONSTANT_COLOR1_G_SHIFT						8
-#define   NV20TCL_RC_CONSTANT_COLOR1_G_MASK						0x0000ff00
-#define   NV20TCL_RC_CONSTANT_COLOR1_R_SHIFT						16
-#define   NV20TCL_RC_CONSTANT_COLOR1_R_MASK						0x00ff0000
-#define   NV20TCL_RC_CONSTANT_COLOR1_A_SHIFT						24
-#define   NV20TCL_RC_CONSTANT_COLOR1_A_MASK						0xff000000
-#define  NV20TCL_RC_OUT_ALPHA(x)							(0x00000aa0+((x)*4))
-#define  NV20TCL_RC_OUT_ALPHA__SIZE							0x00000008
-#define   NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_SHIFT						0
-#define   NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_MASK						0x0000000f
-#define    NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_ZERO						0x00000000
-#define    NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_CONSTANT_COLOR0_NV				0x00000001
-#define    NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_CONSTANT_COLOR1_NV				0x00000002
-#define    NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_FOG						0x00000003
-#define    NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_PRIMARY_COLOR_NV				0x00000004
-#define    NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_SECONDARY_COLOR_NV				0x00000005
-#define    NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE0_ARB					0x00000008
-#define    NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE1_ARB					0x00000009
-#define    NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE0_NV					0x0000000c
-#define    NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE1_NV					0x0000000d
-#define    NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV		0x0000000e
-#define    NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_E_TIMES_F_NV					0x0000000f
-#define   NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_SHIFT						4
-#define   NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_MASK						0x000000f0
-#define    NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_ZERO						0x00000000
-#define    NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_CONSTANT_COLOR0_NV				0x00000010
-#define    NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_CONSTANT_COLOR1_NV				0x00000020
-#define    NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_FOG						0x00000030
-#define    NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_PRIMARY_COLOR_NV				0x00000040
-#define    NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_SECONDARY_COLOR_NV				0x00000050
-#define    NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE0_ARB					0x00000080
-#define    NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE1_ARB					0x00000090
-#define    NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE0_NV					0x000000c0
-#define    NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE1_NV					0x000000d0
-#define    NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV		0x000000e0
-#define    NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_E_TIMES_F_NV					0x000000f0
-#define   NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_SHIFT						8
-#define   NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_MASK						0x00000f00
-#define    NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_ZERO						0x00000000
-#define    NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_CONSTANT_COLOR0_NV				0x00000100
-#define    NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_CONSTANT_COLOR1_NV				0x00000200
-#define    NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_FOG						0x00000300
-#define    NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_PRIMARY_COLOR_NV				0x00000400
-#define    NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_SECONDARY_COLOR_NV				0x00000500
-#define    NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE0_ARB					0x00000800
-#define    NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE1_ARB					0x00000900
-#define    NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE0_NV					0x00000c00
-#define    NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE1_NV					0x00000d00
-#define    NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV		0x00000e00
-#define    NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_E_TIMES_F_NV					0x00000f00
-#define   NV20TCL_RC_OUT_ALPHA_CD_DOT_PRODUCT						(1 << 12)
-#define   NV20TCL_RC_OUT_ALPHA_AB_DOT_PRODUCT						(1 << 13)
-#define   NV20TCL_RC_OUT_ALPHA_MUX_SUM							(1 << 14)
-#define   NV20TCL_RC_OUT_ALPHA_BIAS							(1 << 15)
-#define    NV20TCL_RC_OUT_ALPHA_BIAS_NONE						0x00000000
-#define    NV20TCL_RC_OUT_ALPHA_BIAS_BIAS_BY_NEGATIVE_ONE_HALF_NV			0x00008000
-#define   NV20TCL_RC_OUT_ALPHA_SCALE_SHIFT						17
-#define   NV20TCL_RC_OUT_ALPHA_SCALE_MASK						0x00000000
-#define    NV20TCL_RC_OUT_ALPHA_SCALE_NONE						0x00000000
-#define    NV20TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_TWO_NV					0x00020000
-#define    NV20TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_FOUR_NV					0x00040000
-#define    NV20TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_ONE_HALF_NV				0x00060000
-#define  NV20TCL_RC_IN_RGB(x)								(0x00000ac0+((x)*4))
-#define  NV20TCL_RC_IN_RGB__SIZE							0x00000008
-#define   NV20TCL_RC_IN_RGB_D_INPUT_SHIFT						0
-#define   NV20TCL_RC_IN_RGB_D_INPUT_MASK						0x0000000f
-#define    NV20TCL_RC_IN_RGB_D_INPUT_ZERO						0x00000000
-#define    NV20TCL_RC_IN_RGB_D_INPUT_CONSTANT_COLOR0_NV					0x00000001
-#define    NV20TCL_RC_IN_RGB_D_INPUT_CONSTANT_COLOR1_NV					0x00000002
-#define    NV20TCL_RC_IN_RGB_D_INPUT_FOG						0x00000003
-#define    NV20TCL_RC_IN_RGB_D_INPUT_PRIMARY_COLOR_NV					0x00000004
-#define    NV20TCL_RC_IN_RGB_D_INPUT_SECONDARY_COLOR_NV					0x00000005
-#define    NV20TCL_RC_IN_RGB_D_INPUT_TEXTURE0_ARB					0x00000008
-#define    NV20TCL_RC_IN_RGB_D_INPUT_TEXTURE1_ARB					0x00000009
-#define    NV20TCL_RC_IN_RGB_D_INPUT_SPARE0_NV						0x0000000c
-#define    NV20TCL_RC_IN_RGB_D_INPUT_SPARE1_NV						0x0000000d
-#define    NV20TCL_RC_IN_RGB_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x0000000e
-#define    NV20TCL_RC_IN_RGB_D_INPUT_E_TIMES_F_NV					0x0000000f
-#define   NV20TCL_RC_IN_RGB_D_COMPONENT_USAGE						(1 <<  4)
-#define    NV20TCL_RC_IN_RGB_D_COMPONENT_USAGE_RGB					0x00000000
-#define    NV20TCL_RC_IN_RGB_D_COMPONENT_USAGE_ALPHA					0x00000010
-#define   NV20TCL_RC_IN_RGB_D_MAPPING_SHIFT						5
-#define   NV20TCL_RC_IN_RGB_D_MAPPING_MASK						0x000000e0
-#define    NV20TCL_RC_IN_RGB_D_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV20TCL_RC_IN_RGB_D_MAPPING_UNSIGNED_INVERT_NV				0x00000020
-#define    NV20TCL_RC_IN_RGB_D_MAPPING_EXPAND_NORMAL_NV					0x00000040
-#define    NV20TCL_RC_IN_RGB_D_MAPPING_EXPAND_NEGATE_NV					0x00000060
-#define    NV20TCL_RC_IN_RGB_D_MAPPING_HALF_BIAS_NORMAL_NV				0x00000080
-#define    NV20TCL_RC_IN_RGB_D_MAPPING_HALF_BIAS_NEGATE_NV				0x000000a0
-#define    NV20TCL_RC_IN_RGB_D_MAPPING_SIGNED_IDENTITY_NV				0x000000c0
-#define    NV20TCL_RC_IN_RGB_D_MAPPING_SIGNED_NEGATE_NV					0x000000e0
-#define   NV20TCL_RC_IN_RGB_C_INPUT_SHIFT						8
-#define   NV20TCL_RC_IN_RGB_C_INPUT_MASK						0x00000f00
-#define    NV20TCL_RC_IN_RGB_C_INPUT_ZERO						0x00000000
-#define    NV20TCL_RC_IN_RGB_C_INPUT_CONSTANT_COLOR0_NV					0x00000100
-#define    NV20TCL_RC_IN_RGB_C_INPUT_CONSTANT_COLOR1_NV					0x00000200
-#define    NV20TCL_RC_IN_RGB_C_INPUT_FOG						0x00000300
-#define    NV20TCL_RC_IN_RGB_C_INPUT_PRIMARY_COLOR_NV					0x00000400
-#define    NV20TCL_RC_IN_RGB_C_INPUT_SECONDARY_COLOR_NV					0x00000500
-#define    NV20TCL_RC_IN_RGB_C_INPUT_TEXTURE0_ARB					0x00000800
-#define    NV20TCL_RC_IN_RGB_C_INPUT_TEXTURE1_ARB					0x00000900
-#define    NV20TCL_RC_IN_RGB_C_INPUT_SPARE0_NV						0x00000c00
-#define    NV20TCL_RC_IN_RGB_C_INPUT_SPARE1_NV						0x00000d00
-#define    NV20TCL_RC_IN_RGB_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x00000e00
-#define    NV20TCL_RC_IN_RGB_C_INPUT_E_TIMES_F_NV					0x00000f00
-#define   NV20TCL_RC_IN_RGB_C_COMPONENT_USAGE						(1 << 12)
-#define    NV20TCL_RC_IN_RGB_C_COMPONENT_USAGE_RGB					0x00000000
-#define    NV20TCL_RC_IN_RGB_C_COMPONENT_USAGE_ALPHA					0x00001000
-#define   NV20TCL_RC_IN_RGB_C_MAPPING_SHIFT						13
-#define   NV20TCL_RC_IN_RGB_C_MAPPING_MASK						0x0000e000
-#define    NV20TCL_RC_IN_RGB_C_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV20TCL_RC_IN_RGB_C_MAPPING_UNSIGNED_INVERT_NV				0x00002000
-#define    NV20TCL_RC_IN_RGB_C_MAPPING_EXPAND_NORMAL_NV					0x00004000
-#define    NV20TCL_RC_IN_RGB_C_MAPPING_EXPAND_NEGATE_NV					0x00006000
-#define    NV20TCL_RC_IN_RGB_C_MAPPING_HALF_BIAS_NORMAL_NV				0x00008000
-#define    NV20TCL_RC_IN_RGB_C_MAPPING_HALF_BIAS_NEGATE_NV				0x0000a000
-#define    NV20TCL_RC_IN_RGB_C_MAPPING_SIGNED_IDENTITY_NV				0x0000c000
-#define    NV20TCL_RC_IN_RGB_C_MAPPING_SIGNED_NEGATE_NV					0x0000e000
-#define   NV20TCL_RC_IN_RGB_B_INPUT_SHIFT						16
-#define   NV20TCL_RC_IN_RGB_B_INPUT_MASK						0x000f0000
-#define    NV20TCL_RC_IN_RGB_B_INPUT_ZERO						0x00000000
-#define    NV20TCL_RC_IN_RGB_B_INPUT_CONSTANT_COLOR0_NV					0x00010000
-#define    NV20TCL_RC_IN_RGB_B_INPUT_CONSTANT_COLOR1_NV					0x00020000
-#define    NV20TCL_RC_IN_RGB_B_INPUT_FOG						0x00030000
-#define    NV20TCL_RC_IN_RGB_B_INPUT_PRIMARY_COLOR_NV					0x00040000
-#define    NV20TCL_RC_IN_RGB_B_INPUT_SECONDARY_COLOR_NV					0x00050000
-#define    NV20TCL_RC_IN_RGB_B_INPUT_TEXTURE0_ARB					0x00080000
-#define    NV20TCL_RC_IN_RGB_B_INPUT_TEXTURE1_ARB					0x00090000
-#define    NV20TCL_RC_IN_RGB_B_INPUT_SPARE0_NV						0x000c0000
-#define    NV20TCL_RC_IN_RGB_B_INPUT_SPARE1_NV						0x000d0000
-#define    NV20TCL_RC_IN_RGB_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x000e0000
-#define    NV20TCL_RC_IN_RGB_B_INPUT_E_TIMES_F_NV					0x000f0000
-#define   NV20TCL_RC_IN_RGB_B_COMPONENT_USAGE						(1 << 20)
-#define    NV20TCL_RC_IN_RGB_B_COMPONENT_USAGE_RGB					0x00000000
-#define    NV20TCL_RC_IN_RGB_B_COMPONENT_USAGE_ALPHA					0x00100000
-#define   NV20TCL_RC_IN_RGB_B_MAPPING_SHIFT						21
-#define   NV20TCL_RC_IN_RGB_B_MAPPING_MASK						0x00e00000
-#define    NV20TCL_RC_IN_RGB_B_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV20TCL_RC_IN_RGB_B_MAPPING_UNSIGNED_INVERT_NV				0x00200000
-#define    NV20TCL_RC_IN_RGB_B_MAPPING_EXPAND_NORMAL_NV					0x00400000
-#define    NV20TCL_RC_IN_RGB_B_MAPPING_EXPAND_NEGATE_NV					0x00600000
-#define    NV20TCL_RC_IN_RGB_B_MAPPING_HALF_BIAS_NORMAL_NV				0x00800000
-#define    NV20TCL_RC_IN_RGB_B_MAPPING_HALF_BIAS_NEGATE_NV				0x00a00000
-#define    NV20TCL_RC_IN_RGB_B_MAPPING_SIGNED_IDENTITY_NV				0x00c00000
-#define    NV20TCL_RC_IN_RGB_B_MAPPING_SIGNED_NEGATE_NV					0x00e00000
-#define   NV20TCL_RC_IN_RGB_A_INPUT_SHIFT						24
-#define   NV20TCL_RC_IN_RGB_A_INPUT_MASK						0x0f000000
-#define    NV20TCL_RC_IN_RGB_A_INPUT_ZERO						0x00000000
-#define    NV20TCL_RC_IN_RGB_A_INPUT_CONSTANT_COLOR0_NV					0x01000000
-#define    NV20TCL_RC_IN_RGB_A_INPUT_CONSTANT_COLOR1_NV					0x02000000
-#define    NV20TCL_RC_IN_RGB_A_INPUT_FOG						0x03000000
-#define    NV20TCL_RC_IN_RGB_A_INPUT_PRIMARY_COLOR_NV					0x04000000
-#define    NV20TCL_RC_IN_RGB_A_INPUT_SECONDARY_COLOR_NV					0x05000000
-#define    NV20TCL_RC_IN_RGB_A_INPUT_TEXTURE0_ARB					0x08000000
-#define    NV20TCL_RC_IN_RGB_A_INPUT_TEXTURE1_ARB					0x09000000
-#define    NV20TCL_RC_IN_RGB_A_INPUT_SPARE0_NV						0x0c000000
-#define    NV20TCL_RC_IN_RGB_A_INPUT_SPARE1_NV						0x0d000000
-#define    NV20TCL_RC_IN_RGB_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x0e000000
-#define    NV20TCL_RC_IN_RGB_A_INPUT_E_TIMES_F_NV					0x0f000000
-#define   NV20TCL_RC_IN_RGB_A_COMPONENT_USAGE						(1 << 28)
-#define    NV20TCL_RC_IN_RGB_A_COMPONENT_USAGE_RGB					0x00000000
-#define    NV20TCL_RC_IN_RGB_A_COMPONENT_USAGE_ALPHA					0x10000000
-#define   NV20TCL_RC_IN_RGB_A_MAPPING_SHIFT						29
-#define   NV20TCL_RC_IN_RGB_A_MAPPING_MASK						0xe0000000
-#define    NV20TCL_RC_IN_RGB_A_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV20TCL_RC_IN_RGB_A_MAPPING_UNSIGNED_INVERT_NV				0x20000000
-#define    NV20TCL_RC_IN_RGB_A_MAPPING_EXPAND_NORMAL_NV					0x40000000
-#define    NV20TCL_RC_IN_RGB_A_MAPPING_EXPAND_NEGATE_NV					0x60000000
-#define    NV20TCL_RC_IN_RGB_A_MAPPING_HALF_BIAS_NORMAL_NV				0x80000000
-#define    NV20TCL_RC_IN_RGB_A_MAPPING_HALF_BIAS_NEGATE_NV				0xa0000000
-#define    NV20TCL_RC_IN_RGB_A_MAPPING_SIGNED_IDENTITY_NV				0xc0000000
-#define    NV20TCL_RC_IN_RGB_A_MAPPING_SIGNED_NEGATE_NV					0xe0000000
-#define  NV20TCL_VIEWPORT_SCALE1_X							0x00000af0
-#define  NV20TCL_VIEWPORT_SCALE1_Y							0x00000af4
-#define  NV20TCL_VIEWPORT_SCALE1_Z							0x00000af8
-#define  NV20TCL_VIEWPORT_SCALE1_W							0x00000afc
-#define  NV20TCL_VP_UPLOAD_INST(x)							(0x00000b00+((x)*4))
-#define  NV20TCL_VP_UPLOAD_INST__SIZE							0x00000004
-#define  NV20TCL_VP_UPLOAD_CONST(x)							(0x00000b80+((x)*4))
-#define  NV20TCL_VP_UPLOAD_CONST__SIZE							0x00000004
-#define  NV20TCL_LIGHT_BACK_SIDE_PRODUCT_AMBIENT_R(x)					(0x00000c00+((x)*64))
-#define  NV20TCL_LIGHT_BACK_SIDE_PRODUCT_AMBIENT_R__SIZE				0x00000008
-#define  NV20TCL_LIGHT_BACK_SIDE_PRODUCT_AMBIENT_G(x)					(0x00000c04+((x)*64))
-#define  NV20TCL_LIGHT_BACK_SIDE_PRODUCT_AMBIENT_G__SIZE				0x00000008
-#define  NV20TCL_LIGHT_BACK_SIDE_PRODUCT_AMBIENT_B(x)					(0x00000c08+((x)*64))
-#define  NV20TCL_LIGHT_BACK_SIDE_PRODUCT_AMBIENT_B__SIZE				0x00000008
-#define  NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_R(x)					(0x00001000+((x)*128))
-#define  NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_R__SIZE				0x00000008
-#define  NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_G(x)					(0x00001004+((x)*128))
-#define  NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_G__SIZE				0x00000008
-#define  NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_B(x)					(0x00001008+((x)*128))
-#define  NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_B__SIZE				0x00000008
-#define  NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_R(x)					(0x0000100c+((x)*128))
-#define  NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_R__SIZE				0x00000008
-#define  NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_G(x)					(0x00001010+((x)*128))
-#define  NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_G__SIZE				0x00000008
-#define  NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_B(x)					(0x00001014+((x)*128))
-#define  NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_B__SIZE				0x00000008
-#define  NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_R(x)					(0x00001018+((x)*128))
-#define  NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_R__SIZE				0x00000008
-#define  NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_G(x)					(0x0000101c+((x)*128))
-#define  NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_G__SIZE				0x00000008
-#define  NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_B(x)					(0x00001020+((x)*128))
-#define  NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_B__SIZE				0x00000008
-#define  NV20TCL_LIGHT_HALF_VECTOR_X(x)							(0x00001028+((x)*128))
-#define  NV20TCL_LIGHT_HALF_VECTOR_X__SIZE						0x00000008
-#define  NV20TCL_LIGHT_HALF_VECTOR_Y(x)							(0x0000102c+((x)*128))
-#define  NV20TCL_LIGHT_HALF_VECTOR_Y__SIZE						0x00000008
-#define  NV20TCL_LIGHT_HALF_VECTOR_Z(x)							(0x00001030+((x)*128))
-#define  NV20TCL_LIGHT_HALF_VECTOR_Z__SIZE						0x00000008
-#define  NV20TCL_LIGHT_DIRECTION_X(x)							(0x00001034+((x)*128))
-#define  NV20TCL_LIGHT_DIRECTION_X__SIZE						0x00000008
-#define  NV20TCL_LIGHT_DIRECTION_Y(x)							(0x00001038+((x)*128))
-#define  NV20TCL_LIGHT_DIRECTION_Y__SIZE						0x00000008
-#define  NV20TCL_LIGHT_DIRECTION_Z(x)							(0x0000103c+((x)*128))
-#define  NV20TCL_LIGHT_DIRECTION_Z__SIZE						0x00000008
-#define  NV20TCL_LIGHT_POSITION_X(x)							(0x0000105c+((x)*128))
-#define  NV20TCL_LIGHT_POSITION_X__SIZE							0x00000008
-#define  NV20TCL_LIGHT_POSITION_Y(x)							(0x00001060+((x)*128))
-#define  NV20TCL_LIGHT_POSITION_Y__SIZE							0x00000008
-#define  NV20TCL_LIGHT_POSITION_Z(x)							(0x00001064+((x)*128))
-#define  NV20TCL_LIGHT_POSITION_Z__SIZE							0x00000008
-#define  NV20TCL_LIGHT_CONSTANT_ATTENUATION(x)						(0x00001068+((x)*128))
-#define  NV20TCL_LIGHT_CONSTANT_ATTENUATION__SIZE					0x00000008
-#define  NV20TCL_LIGHT_LINEAR_ATTENUATION(x)						(0x0000106c+((x)*128))
-#define  NV20TCL_LIGHT_LINEAR_ATTENUATION__SIZE						0x00000008
-#define  NV20TCL_LIGHT_QUADRATIC_ATTENUATION(x)						(0x00001070+((x)*128))
-#define  NV20TCL_LIGHT_QUADRATIC_ATTENUATION__SIZE					0x00000008
-#define  NV20TCL_POLYGON_STIPPLE_ENABLE							0x0000147c
-#define  NV20TCL_POLYGON_STIPPLE_PATTERN(x)						(0x00001480+((x)*4))
-#define  NV20TCL_POLYGON_STIPPLE_PATTERN__SIZE						0x00000020
-#define  NV20TCL_VERTEX_POS_3F_X							0x00001500
-#define  NV20TCL_VERTEX_POS_3F_Y							0x00001504
-#define  NV20TCL_VERTEX_POS_3F_Z							0x00001508
-#define  NV20TCL_VERTEX_POS_4F_X							0x00001518
-#define  NV20TCL_VERTEX_POS_4F_Y							0x0000151c
-#define  NV20TCL_VERTEX_POS_4F_Z							0x00001520
-#define  NV20TCL_VERTEX_POS_3I_XY							0x00001528
-#define   NV20TCL_VERTEX_POS_3I_XY_X_SHIFT						0
-#define   NV20TCL_VERTEX_POS_3I_XY_X_MASK						0x0000ffff
-#define   NV20TCL_VERTEX_POS_3I_XY_Y_SHIFT						16
-#define   NV20TCL_VERTEX_POS_3I_XY_Y_MASK						0xffff0000
-#define  NV20TCL_VERTEX_POS_3I_Z							0x0000152c
-#define   NV20TCL_VERTEX_POS_3I_Z_Z_SHIFT						0
-#define   NV20TCL_VERTEX_POS_3I_Z_Z_MASK						0x0000ffff
-#define  NV20TCL_VERTEX_NOR_3F_X							0x00001530
-#define  NV20TCL_VERTEX_NOR_3F_Y							0x00001534
-#define  NV20TCL_VERTEX_NOR_3F_Z							0x00001538
-#define  NV20TCL_VERTEX_NOR_3I_XY							0x00001540
-#define   NV20TCL_VERTEX_NOR_3I_XY_X_SHIFT						0
-#define   NV20TCL_VERTEX_NOR_3I_XY_X_MASK						0x0000ffff
-#define   NV20TCL_VERTEX_NOR_3I_XY_Y_SHIFT						16
-#define   NV20TCL_VERTEX_NOR_3I_XY_Y_MASK						0xffff0000
-#define  NV20TCL_VERTEX_NOR_3I_Z							0x00001544
-#define   NV20TCL_VERTEX_NOR_3I_Z_Z_SHIFT						0
-#define   NV20TCL_VERTEX_NOR_3I_Z_Z_MASK						0x0000ffff
-#define  NV20TCL_VERTEX_COL_4F_X							0x00001550
-#define  NV20TCL_VERTEX_COL_4F_Y							0x00001554
-#define  NV20TCL_VERTEX_COL_4F_Z							0x00001558
-#define  NV20TCL_VERTEX_COL_4F_W							0x0000155c
-#define  NV20TCL_VERTEX_COL_3F_X							0x00001560
-#define  NV20TCL_VERTEX_COL_3F_Y							0x00001564
-#define  NV20TCL_VERTEX_COL_3F_Z							0x00001568
-#define  NV20TCL_VERTEX_COL_4I								0x0000156c
-#define   NV20TCL_VERTEX_COL_4I_R_SHIFT							0
-#define   NV20TCL_VERTEX_COL_4I_R_MASK							0x000000ff
-#define   NV20TCL_VERTEX_COL_4I_G_SHIFT							8
-#define   NV20TCL_VERTEX_COL_4I_G_MASK							0x0000ff00
-#define   NV20TCL_VERTEX_COL_4I_B_SHIFT							16
-#define   NV20TCL_VERTEX_COL_4I_B_MASK							0x00ff0000
-#define   NV20TCL_VERTEX_COL_4I_A_SHIFT							24
-#define   NV20TCL_VERTEX_COL_4I_A_MASK							0xff000000
-#define  NV20TCL_VERTEX_COL2_3F_X							0x00001580
-#define  NV20TCL_VERTEX_COL2_3F_Y							0x00001584
-#define  NV20TCL_VERTEX_COL2_3F_Z							0x00001588
-#define  NV20TCL_VERTEX_COL2_4I								0x0000158c
-#define   NV20TCL_VERTEX_COL2_4I_R_SHIFT						0
-#define   NV20TCL_VERTEX_COL2_4I_R_MASK							0x000000ff
-#define   NV20TCL_VERTEX_COL2_4I_G_SHIFT						8
-#define   NV20TCL_VERTEX_COL2_4I_G_MASK							0x0000ff00
-#define   NV20TCL_VERTEX_COL2_4I_B_SHIFT						16
-#define   NV20TCL_VERTEX_COL2_4I_B_MASK							0x00ff0000
-#define   NV20TCL_VERTEX_COL2_4I_A_SHIFT						24
-#define   NV20TCL_VERTEX_COL2_4I_A_MASK							0xff000000
-#define  NV20TCL_VERTEX_TX0_2F_S							0x00001590
-#define  NV20TCL_VERTEX_TX0_2F_T							0x00001594
-#define  NV20TCL_VERTEX_TX0_2I								0x00001598
-#define   NV20TCL_VERTEX_TX0_2I_S_SHIFT							0
-#define   NV20TCL_VERTEX_TX0_2I_S_MASK							0x0000ffff
-#define   NV20TCL_VERTEX_TX0_2I_T_SHIFT							16
-#define   NV20TCL_VERTEX_TX0_2I_T_MASK							0xffff0000
-#define  NV20TCL_VERTEX_TX0_4F_S							0x000015a0
-#define  NV20TCL_VERTEX_TX0_4F_T							0x000015a4
-#define  NV20TCL_VERTEX_TX0_4F_R							0x000015a8
-#define  NV20TCL_VERTEX_TX0_4F_Q							0x000015ac
-#define  NV20TCL_VERTEX_TX0_4I_ST							0x000015b0
-#define   NV20TCL_VERTEX_TX0_4I_ST_S_SHIFT						0
-#define   NV20TCL_VERTEX_TX0_4I_ST_S_MASK						0x0000ffff
-#define   NV20TCL_VERTEX_TX0_4I_ST_T_SHIFT						16
-#define   NV20TCL_VERTEX_TX0_4I_ST_T_MASK						0xffff0000
-#define  NV20TCL_VERTEX_TX0_4I_RQ							0x000015b4
-#define   NV20TCL_VERTEX_TX0_4I_RQ_R_SHIFT						0
-#define   NV20TCL_VERTEX_TX0_4I_RQ_R_MASK						0x0000ffff
-#define   NV20TCL_VERTEX_TX0_4I_RQ_Q_SHIFT						16
-#define   NV20TCL_VERTEX_TX0_4I_RQ_Q_MASK						0xffff0000
-#define  NV20TCL_VERTEX_TX1_2F_S							0x000015b8
-#define  NV20TCL_VERTEX_TX1_2F_T							0x000015bc
-#define  NV20TCL_VERTEX_TX1_2I								0x000015c0
-#define   NV20TCL_VERTEX_TX1_2I_S_SHIFT							0
-#define   NV20TCL_VERTEX_TX1_2I_S_MASK							0x0000ffff
-#define   NV20TCL_VERTEX_TX1_2I_T_SHIFT							16
-#define   NV20TCL_VERTEX_TX1_2I_T_MASK							0xffff0000
-#define  NV20TCL_VERTEX_TX1_4F_S							0x000015c8
-#define  NV20TCL_VERTEX_TX1_4F_T							0x000015cc
-#define  NV20TCL_VERTEX_TX1_4F_R							0x000015d0
-#define  NV20TCL_VERTEX_TX1_4F_Q							0x000015d4
-#define  NV20TCL_VERTEX_TX1_4I_ST							0x000015d8
-#define   NV20TCL_VERTEX_TX1_4I_ST_S_SHIFT						0
-#define   NV20TCL_VERTEX_TX1_4I_ST_S_MASK						0x0000ffff
-#define   NV20TCL_VERTEX_TX1_4I_ST_T_SHIFT						16
-#define   NV20TCL_VERTEX_TX1_4I_ST_T_MASK						0xffff0000
-#define  NV20TCL_VERTEX_TX1_4I_RQ							0x000015dc
-#define   NV20TCL_VERTEX_TX1_4I_RQ_R_SHIFT						0
-#define   NV20TCL_VERTEX_TX1_4I_RQ_R_MASK						0x0000ffff
-#define   NV20TCL_VERTEX_TX1_4I_RQ_Q_SHIFT						16
-#define   NV20TCL_VERTEX_TX1_4I_RQ_Q_MASK						0xffff0000
-#define  NV20TCL_VERTEX_TX2_2F_S							0x000015e0
-#define  NV20TCL_VERTEX_TX2_2F_T							0x000015e4
-#define  NV20TCL_VERTEX_TX2_2I								0x000015e8
-#define   NV20TCL_VERTEX_TX2_2I_S_SHIFT							0
-#define   NV20TCL_VERTEX_TX2_2I_S_MASK							0x0000ffff
-#define   NV20TCL_VERTEX_TX2_2I_T_SHIFT							16
-#define   NV20TCL_VERTEX_TX2_2I_T_MASK							0xffff0000
-#define  NV20TCL_VERTEX_TX2_4F_S							0x000015f0
-#define  NV20TCL_VERTEX_TX2_4F_T							0x000015f4
-#define  NV20TCL_VERTEX_TX2_4F_R							0x000015f8
-#define  NV20TCL_VERTEX_TX2_4F_Q							0x000015fc
-#define  NV20TCL_VERTEX_TX2_4I_ST							0x00001600
-#define   NV20TCL_VERTEX_TX2_4I_ST_S_SHIFT						0
-#define   NV20TCL_VERTEX_TX2_4I_ST_S_MASK						0x0000ffff
-#define   NV20TCL_VERTEX_TX2_4I_ST_T_SHIFT						16
-#define   NV20TCL_VERTEX_TX2_4I_ST_T_MASK						0xffff0000
-#define  NV20TCL_VERTEX_TX2_4I_RQ							0x00001604
-#define   NV20TCL_VERTEX_TX2_4I_RQ_R_SHIFT						0
-#define   NV20TCL_VERTEX_TX2_4I_RQ_R_MASK						0x0000ffff
-#define   NV20TCL_VERTEX_TX2_4I_RQ_Q_SHIFT						16
-#define   NV20TCL_VERTEX_TX2_4I_RQ_Q_MASK						0xffff0000
-#define  NV20TCL_VERTEX_TX3_2F_S							0x00001608
-#define  NV20TCL_VERTEX_TX3_2F_T							0x0000160c
-#define  NV20TCL_VERTEX_TX3_2I								0x00001610
-#define   NV20TCL_VERTEX_TX3_2I_S_SHIFT							0
-#define   NV20TCL_VERTEX_TX3_2I_S_MASK							0x0000ffff
-#define   NV20TCL_VERTEX_TX3_2I_T_SHIFT							16
-#define   NV20TCL_VERTEX_TX3_2I_T_MASK							0xffff0000
-#define  NV20TCL_VERTEX_TX3_4F_S							0x00001620
-#define  NV20TCL_VERTEX_TX3_4F_T							0x00001624
-#define  NV20TCL_VERTEX_TX3_4F_R							0x00001628
-#define  NV20TCL_VERTEX_TX3_4F_Q							0x0000162c
-#define  NV20TCL_VERTEX_TX3_4I_ST							0x00001630
-#define   NV20TCL_VERTEX_TX3_4I_ST_S_SHIFT						0
-#define   NV20TCL_VERTEX_TX3_4I_ST_S_MASK						0x0000ffff
-#define   NV20TCL_VERTEX_TX3_4I_ST_T_SHIFT						16
-#define   NV20TCL_VERTEX_TX3_4I_ST_T_MASK						0xffff0000
-#define  NV20TCL_VERTEX_TX3_4I_RQ							0x00001634
-#define   NV20TCL_VERTEX_TX3_4I_RQ_R_SHIFT						0
-#define   NV20TCL_VERTEX_TX3_4I_RQ_R_MASK						0x0000ffff
-#define   NV20TCL_VERTEX_TX3_4I_RQ_Q_SHIFT						16
-#define   NV20TCL_VERTEX_TX3_4I_RQ_Q_MASK						0xffff0000
-#define  NV20TCL_VERTEX_FOG_1F								0x00001698
-#define  NV20TCL_EDGEFLAG_ENABLE							0x000016bc
-#define  NV20TCL_VTXBUF_ADDRESS(x)							(0x00001720+((x)*4))
-#define  NV20TCL_VTXBUF_ADDRESS__SIZE							0x00000010
-#define   NV20TCL_VTXBUF_ADDRESS_DMA1							(1 << 31)
-#define   NV20TCL_VTXBUF_ADDRESS_OFFSET_SHIFT						0
-#define   NV20TCL_VTXBUF_ADDRESS_OFFSET_MASK						0x0fffffff
-#define  NV20TCL_VTXFMT(x)								(0x00001760+((x)*4))
-#define  NV20TCL_VTXFMT__SIZE								0x00000010
-#define   NV20TCL_VTXFMT_TYPE_SHIFT							0
-#define   NV20TCL_VTXFMT_TYPE_MASK							0x0000000f
-#define    NV20TCL_VTXFMT_TYPE_FLOAT							0x00000002
-#define    NV20TCL_VTXFMT_TYPE_UBYTE							0x00000004
-#define    NV20TCL_VTXFMT_TYPE_USHORT							0x00000005
-#define   NV20TCL_VTXFMT_SIZE_SHIFT							4
-#define   NV20TCL_VTXFMT_SIZE_MASK							0x000000f0
-#define   NV20TCL_VTXFMT_STRIDE_SHIFT							8
-#define   NV20TCL_VTXFMT_STRIDE_MASK							0x0000ff00
-#define  NV20TCL_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_R			0x000017a0
-#define  NV20TCL_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_G			0x000017a4
-#define  NV20TCL_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_B			0x000017a8
-#define  NV20TCL_COLOR_MATERIAL_BACK_A							0x000017ac
-#define  NV20TCL_COLOR_MATERIAL_BACK_R							0x000017b0
-#define  NV20TCL_COLOR_MATERIAL_BACK_G							0x000017b4
-#define  NV20TCL_COLOR_MATERIAL_BACK_B							0x000017b8
-#define  NV20TCL_COLOR_LOGIC_OP_ENABLE							0x000017bc
-#define  NV20TCL_COLOR_LOGIC_OP_OP							0x000017c0
-#define   NV20TCL_COLOR_LOGIC_OP_OP_CLEAR						0x00001500
-#define   NV20TCL_COLOR_LOGIC_OP_OP_AND							0x00001501
-#define   NV20TCL_COLOR_LOGIC_OP_OP_AND_REVERSE						0x00001502
-#define   NV20TCL_COLOR_LOGIC_OP_OP_COPY						0x00001503
-#define   NV20TCL_COLOR_LOGIC_OP_OP_AND_INVERTED					0x00001504
-#define   NV20TCL_COLOR_LOGIC_OP_OP_NOOP						0x00001505
-#define   NV20TCL_COLOR_LOGIC_OP_OP_XOR							0x00001506
-#define   NV20TCL_COLOR_LOGIC_OP_OP_OR							0x00001507
-#define   NV20TCL_COLOR_LOGIC_OP_OP_NOR							0x00001508
-#define   NV20TCL_COLOR_LOGIC_OP_OP_EQUIV						0x00001509
-#define   NV20TCL_COLOR_LOGIC_OP_OP_INVERT						0x0000150a
-#define   NV20TCL_COLOR_LOGIC_OP_OP_OR_REVERSE						0x0000150b
-#define   NV20TCL_COLOR_LOGIC_OP_OP_COPY_INVERTED					0x0000150c
-#define   NV20TCL_COLOR_LOGIC_OP_OP_OR_INVERTED						0x0000150d
-#define   NV20TCL_COLOR_LOGIC_OP_OP_NAND						0x0000150e
-#define   NV20TCL_COLOR_LOGIC_OP_OP_SET							0x0000150f
-#define  NV20TCL_LIGHT_MODEL_TWO_SIDE_ENABLE						0x000017c4
-#define  NV20TCL_TX_SHADER_CULL_MODE							0x000017f8
-#define   NV20TCL_TX_SHADER_CULL_MODE_TX0_S						(1 <<  0)
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX0_S_GEQUAL					0x00000000
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX0_S_LESS					0x00000001
-#define   NV20TCL_TX_SHADER_CULL_MODE_TX0_T						(1 <<  1)
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX0_T_GEQUAL					0x00000000
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX0_T_LESS					0x00000002
-#define   NV20TCL_TX_SHADER_CULL_MODE_TX0_R						(1 <<  2)
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX0_R_GEQUAL					0x00000000
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX0_R_LESS					0x00000004
-#define   NV20TCL_TX_SHADER_CULL_MODE_TX0_Q						(1 <<  3)
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX0_Q_GEQUAL					0x00000000
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX0_Q_LESS					0x00000008
-#define   NV20TCL_TX_SHADER_CULL_MODE_TX1_S						(1 <<  4)
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX1_S_GEQUAL					0x00000000
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX1_S_LESS					0x00000010
-#define   NV20TCL_TX_SHADER_CULL_MODE_TX1_T						(1 <<  5)
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX1_T_GEQUAL					0x00000000
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX1_T_LESS					0x00000020
-#define   NV20TCL_TX_SHADER_CULL_MODE_TX1_R						(1 <<  6)
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX1_R_GEQUAL					0x00000000
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX1_R_LESS					0x00000040
-#define   NV20TCL_TX_SHADER_CULL_MODE_TX1_Q						(1 <<  7)
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX1_Q_GEQUAL					0x00000000
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX1_Q_LESS					0x00000080
-#define   NV20TCL_TX_SHADER_CULL_MODE_TX2_S						(1 <<  8)
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX2_S_GEQUAL					0x00000000
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX2_S_LESS					0x00000100
-#define   NV20TCL_TX_SHADER_CULL_MODE_TX2_T						(1 <<  9)
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX2_T_GEQUAL					0x00000000
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX2_T_LESS					0x00000200
-#define   NV20TCL_TX_SHADER_CULL_MODE_TX2_R						(1 << 10)
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX2_R_GEQUAL					0x00000000
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX2_R_LESS					0x00000400
-#define   NV20TCL_TX_SHADER_CULL_MODE_TX2_Q						(1 << 11)
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX2_Q_GEQUAL					0x00000000
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX2_Q_LESS					0x00000800
-#define   NV20TCL_TX_SHADER_CULL_MODE_TX3_S						(1 << 12)
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX3_S_GEQUAL					0x00000000
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX3_S_LESS					0x00001000
-#define   NV20TCL_TX_SHADER_CULL_MODE_TX3_T						(1 << 13)
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX3_T_GEQUAL					0x00000000
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX3_T_LESS					0x00002000
-#define   NV20TCL_TX_SHADER_CULL_MODE_TX3_R						(1 << 14)
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX3_R_GEQUAL					0x00000000
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX3_R_LESS					0x00004000
-#define   NV20TCL_TX_SHADER_CULL_MODE_TX3_Q						(1 << 15)
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX3_Q_GEQUAL					0x00000000
-#define    NV20TCL_TX_SHADER_CULL_MODE_TX3_Q_LESS					0x00008000
-#define  NV20TCL_VERTEX_BEGIN_END							0x000017fc
-#define   NV20TCL_VERTEX_BEGIN_END_STOP							0x00000000
-#define   NV20TCL_VERTEX_BEGIN_END_POINTS						0x00000001
-#define   NV20TCL_VERTEX_BEGIN_END_LINES						0x00000002
-#define   NV20TCL_VERTEX_BEGIN_END_LINE_LOOP						0x00000003
-#define   NV20TCL_VERTEX_BEGIN_END_LINE_STRIP						0x00000004
-#define   NV20TCL_VERTEX_BEGIN_END_TRIANGLES						0x00000005
-#define   NV20TCL_VERTEX_BEGIN_END_TRIANGLE_STRIP					0x00000006
-#define   NV20TCL_VERTEX_BEGIN_END_TRIANGLE_FAN						0x00000007
-#define   NV20TCL_VERTEX_BEGIN_END_QUADS						0x00000008
-#define   NV20TCL_VERTEX_BEGIN_END_QUAD_STRIP						0x00000009
-#define   NV20TCL_VERTEX_BEGIN_END_POLYGON						0x0000000a
-#define  NV20TCL_VB_ELEMENT_U16								0x00001800
-#define   NV20TCL_VB_ELEMENT_U16_I0_SHIFT						0
-#define   NV20TCL_VB_ELEMENT_U16_I0_MASK						0x0000ffff
-#define   NV20TCL_VB_ELEMENT_U16_I1_SHIFT						16
-#define   NV20TCL_VB_ELEMENT_U16_I1_MASK						0xffff0000
-#define  NV20TCL_VB_VERTEX_BATCH							0x00001810
-#define   NV20TCL_VB_VERTEX_BATCH_OFFSET_SHIFT						0
-#define   NV20TCL_VB_VERTEX_BATCH_OFFSET_MASK						0x00ffffff
-#define   NV20TCL_VB_VERTEX_BATCH_COUNT_SHIFT						24
-#define   NV20TCL_VB_VERTEX_BATCH_COUNT_MASK						0xff000000
-#define  NV20TCL_VERTEX_DATA								0x00001818
-#define  NV20TCL_TX_SHADER_CONST_EYE_X							0x0000181c
-#define  NV20TCL_TX_SHADER_CONST_EYE_Y							0x00001820
-#define  NV20TCL_TX_SHADER_CONST_EYE_Z							0x00001824
-#define  NV20TCL_VTX_ATTR_4F_X(x)							(0x00001a00+((x)*16))
-#define  NV20TCL_VTX_ATTR_4F_X__SIZE							0x00000010
-#define  NV20TCL_VTX_ATTR_4F_Y(x)							(0x00001a04+((x)*16))
-#define  NV20TCL_VTX_ATTR_4F_Y__SIZE							0x00000010
-#define  NV20TCL_VTX_ATTR_4F_Z(x)							(0x00001a08+((x)*16))
-#define  NV20TCL_VTX_ATTR_4F_Z__SIZE							0x00000010
-#define  NV20TCL_VTX_ATTR_4F_W(x)							(0x00001a0c+((x)*16))
-#define  NV20TCL_VTX_ATTR_4F_W__SIZE							0x00000010
-#define  NV20TCL_TX_OFFSET(x)								(0x00001b00+((x)*64))
-#define  NV20TCL_TX_OFFSET__SIZE							0x00000004
-#define  NV20TCL_TX_FORMAT(x)								(0x00001b04+((x)*64))
-#define  NV20TCL_TX_FORMAT__SIZE							0x00000004
-#define   NV20TCL_TX_FORMAT_DMA0							(1 <<  0)
-#define   NV20TCL_TX_FORMAT_DMA1							(1 <<  1)
-#define   NV20TCL_TX_FORMAT_CUBIC							(1 <<  2)
-#define   NV20TCL_TX_FORMAT_NO_BORDER							(1 <<  3)
-#define   NV20TCL_TX_FORMAT_DIMS_SHIFT							4
-#define   NV20TCL_TX_FORMAT_DIMS_MASK							0x000000f0
-#define    NV20TCL_TX_FORMAT_DIMS_1D							0x00000010
-#define    NV20TCL_TX_FORMAT_DIMS_2D							0x00000020
-#define    NV20TCL_TX_FORMAT_DIMS_3D							0x00000030
-#define   NV20TCL_TX_FORMAT_FORMAT_SHIFT						8
-#define   NV20TCL_TX_FORMAT_FORMAT_MASK							0x0000ff00
-#define    NV20TCL_TX_FORMAT_FORMAT_L8							0x00000000
-#define    NV20TCL_TX_FORMAT_FORMAT_A8							0x00000100
-#define    NV20TCL_TX_FORMAT_FORMAT_A1R5G5B5						0x00000200
-#define    NV20TCL_TX_FORMAT_FORMAT_A8_RECT						0x00000300
-#define    NV20TCL_TX_FORMAT_FORMAT_A4R4G4B4						0x00000400
-#define    NV20TCL_TX_FORMAT_FORMAT_R5G6B5						0x00000500
-#define    NV20TCL_TX_FORMAT_FORMAT_A8R8G8B8						0x00000600
-#define    NV20TCL_TX_FORMAT_FORMAT_X8R8G8B8						0x00000700
-#define    NV20TCL_TX_FORMAT_FORMAT_INDEX8						0x00000b00
-#define    NV20TCL_TX_FORMAT_FORMAT_DXT1						0x00000c00
-#define    NV20TCL_TX_FORMAT_FORMAT_DXT3						0x00000e00
-#define    NV20TCL_TX_FORMAT_FORMAT_DXT5						0x00000f00
-#define    NV20TCL_TX_FORMAT_FORMAT_A1R5G5B5_RECT					0x00001000
-#define    NV20TCL_TX_FORMAT_FORMAT_R5G6B5_RECT						0x00001100
-#define    NV20TCL_TX_FORMAT_FORMAT_A8R8G8B8_RECT					0x00001200
-#define    NV20TCL_TX_FORMAT_FORMAT_L8_RECT						0x00001300
-#define    NV20TCL_TX_FORMAT_FORMAT_A8L8						0x00001a00
-#define    NV20TCL_TX_FORMAT_FORMAT_A8_RECT2						0x00001b00
-#define    NV20TCL_TX_FORMAT_FORMAT_A4R4G4B4_RECT					0x00001d00
-#define    NV20TCL_TX_FORMAT_FORMAT_R8G8B8_RECT						0x00001e00
-#define    NV20TCL_TX_FORMAT_FORMAT_L8A8_RECT						0x00002000
-#define    NV20TCL_TX_FORMAT_FORMAT_DSDT						0x00002800
-#define    NV20TCL_TX_FORMAT_FORMAT_A16							0x00003200
-#define    NV20TCL_TX_FORMAT_FORMAT_HILO16						0x00003300
-#define    NV20TCL_TX_FORMAT_FORMAT_A16_RECT						0x00003500
-#define    NV20TCL_TX_FORMAT_FORMAT_HILO16_RECT						0x00003600
-#define    NV20TCL_TX_FORMAT_FORMAT_HILO8						0x00004400
-#define    NV20TCL_TX_FORMAT_FORMAT_SIGNED_HILO8					0x00004500
-#define    NV20TCL_TX_FORMAT_FORMAT_HILO8_RECT						0x00004600
-#define    NV20TCL_TX_FORMAT_FORMAT_SIGNED_HILO8_RECT					0x00004700
-#define    NV20TCL_TX_FORMAT_FORMAT_FLOAT_RGBA16_NV					0x00004a00
-#define    NV20TCL_TX_FORMAT_FORMAT_FLOAT_RGBA32_NV					0x00004b00
-#define    NV20TCL_TX_FORMAT_FORMAT_FLOAT_R32_NV					0x00004c00
-#define   NV20TCL_TX_FORMAT_MIPMAP							(1 << 19)
-#define   NV20TCL_TX_FORMAT_BASE_SIZE_U_SHIFT						20
-#define   NV20TCL_TX_FORMAT_BASE_SIZE_U_MASK						0x00f00000
-#define   NV20TCL_TX_FORMAT_BASE_SIZE_V_SHIFT						24
-#define   NV20TCL_TX_FORMAT_BASE_SIZE_V_MASK						0x0f000000
-#define   NV20TCL_TX_FORMAT_BASE_SIZE_W_SHIFT						28
-#define   NV20TCL_TX_FORMAT_BASE_SIZE_W_MASK						0xf0000000
-#define  NV20TCL_TX_WRAP(x)								(0x00001b08+((x)*64))
-#define  NV20TCL_TX_WRAP__SIZE								0x00000004
-#define   NV20TCL_TX_WRAP_S_SHIFT							0
-#define   NV20TCL_TX_WRAP_S_MASK							0x000000ff
-#define    NV20TCL_TX_WRAP_S_REPEAT							0x00000001
-#define    NV20TCL_TX_WRAP_S_MIRRORED_REPEAT						0x00000002
-#define    NV20TCL_TX_WRAP_S_CLAMP_TO_EDGE						0x00000003
-#define    NV20TCL_TX_WRAP_S_CLAMP_TO_BORDER						0x00000004
-#define    NV20TCL_TX_WRAP_S_CLAMP							0x00000005
-#define   NV20TCL_TX_WRAP_T_SHIFT							8
-#define   NV20TCL_TX_WRAP_T_MASK							0x00000f00
-#define    NV20TCL_TX_WRAP_T_REPEAT							0x00000100
-#define    NV20TCL_TX_WRAP_T_MIRRORED_REPEAT						0x00000200
-#define    NV20TCL_TX_WRAP_T_CLAMP_TO_EDGE						0x00000300
-#define    NV20TCL_TX_WRAP_T_CLAMP_TO_BORDER						0x00000400
-#define    NV20TCL_TX_WRAP_T_CLAMP							0x00000500
-#define   NV20TCL_TX_WRAP_R_SHIFT							16
-#define   NV20TCL_TX_WRAP_R_MASK							0x000f0000
-#define    NV20TCL_TX_WRAP_R_REPEAT							0x00010000
-#define    NV20TCL_TX_WRAP_R_MIRRORED_REPEAT						0x00020000
-#define    NV20TCL_TX_WRAP_R_CLAMP_TO_EDGE						0x00030000
-#define    NV20TCL_TX_WRAP_R_CLAMP_TO_BORDER						0x00040000
-#define    NV20TCL_TX_WRAP_R_CLAMP							0x00050000
-#define  NV20TCL_TX_ENABLE(x)								(0x00001b0c+((x)*64))
-#define  NV20TCL_TX_ENABLE__SIZE							0x00000004
-#define   NV20TCL_TX_ENABLE_ANISO_SHIFT							4
-#define   NV20TCL_TX_ENABLE_ANISO_MASK							0x00000030
-#define    NV20TCL_TX_ENABLE_ANISO_NONE							0x00000000
-#define    NV20TCL_TX_ENABLE_ANISO_2X							0x00000010
-#define    NV20TCL_TX_ENABLE_ANISO_4X							0x00000020
-#define    NV20TCL_TX_ENABLE_ANISO_8X							0x00000030
-#define   NV20TCL_TX_ENABLE_MIPMAP_MAX_LOD_SHIFT					14
-#define   NV20TCL_TX_ENABLE_MIPMAP_MAX_LOD_MASK						0x0003c000
-#define   NV20TCL_TX_ENABLE_MIPMAP_MIN_LOD_SHIFT					26
-#define   NV20TCL_TX_ENABLE_MIPMAP_MIN_LOD_MASK						0x3c000000
-#define   NV20TCL_TX_ENABLE_ENABLE							(1 << 30)
-#define  NV20TCL_TX_SWIZZLE(x)								(0x00001b10+((x)*64))
-#define  NV20TCL_TX_SWIZZLE__SIZE							0x00000004
-#define   NV20TCL_TX_SWIZZLE_RECT_PITCH_SHIFT						16
-#define   NV20TCL_TX_SWIZZLE_RECT_PITCH_MASK						0xffff0000
-#define  NV20TCL_TX_FILTER(x)								(0x00001b14+((x)*64))
-#define  NV20TCL_TX_FILTER__SIZE							0x00000004
-#define   NV20TCL_TX_FILTER_LOD_BIAS_SHIFT						8
-#define   NV20TCL_TX_FILTER_LOD_BIAS_MASK						0x00000f00
-#define   NV20TCL_TX_FILTER_MINIFY_SHIFT						16
-#define   NV20TCL_TX_FILTER_MINIFY_MASK							0x000f0000
-#define    NV20TCL_TX_FILTER_MINIFY_NEAREST						0x00010000
-#define    NV20TCL_TX_FILTER_MINIFY_LINEAR						0x00020000
-#define    NV20TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST				0x00030000
-#define    NV20TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST				0x00040000
-#define    NV20TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR				0x00050000
-#define    NV20TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR				0x00060000
-#define   NV20TCL_TX_FILTER_MAGNIFY_SHIFT						24
-#define   NV20TCL_TX_FILTER_MAGNIFY_MASK						0x0f000000
-#define    NV20TCL_TX_FILTER_MAGNIFY_NEAREST						0x01000000
-#define    NV20TCL_TX_FILTER_MAGNIFY_LINEAR						0x02000000
-#define  NV20TCL_TX_NPOT_SIZE(x)							(0x00001b1c+((x)*64))
-#define  NV20TCL_TX_NPOT_SIZE__SIZE							0x00000004
-#define   NV20TCL_TX_NPOT_SIZE_H_SHIFT							0
-#define   NV20TCL_TX_NPOT_SIZE_H_MASK							0x0000ffff
-#define   NV20TCL_TX_NPOT_SIZE_W_SHIFT							16
-#define   NV20TCL_TX_NPOT_SIZE_W_MASK							0xffff0000
-#define  NV20TCL_TX_PALETTE_OFFSET(x)							(0x00001b20+((x)*64))
-#define  NV20TCL_TX_PALETTE_OFFSET__SIZE						0x00000004
-#define  NV20TCL_TX_BORDER_COLOR(x)							(0x00001b24+((x)*64))
-#define  NV20TCL_TX_BORDER_COLOR__SIZE							0x00000004
-#define   NV20TCL_TX_BORDER_COLOR_B_SHIFT						0
-#define   NV20TCL_TX_BORDER_COLOR_B_MASK						0x000000ff
-#define   NV20TCL_TX_BORDER_COLOR_G_SHIFT						8
-#define   NV20TCL_TX_BORDER_COLOR_G_MASK						0x0000ff00
-#define   NV20TCL_TX_BORDER_COLOR_R_SHIFT						16
-#define   NV20TCL_TX_BORDER_COLOR_R_MASK						0x00ff0000
-#define   NV20TCL_TX_BORDER_COLOR_A_SHIFT						24
-#define   NV20TCL_TX_BORDER_COLOR_A_MASK						0xff000000
-#define  NV20TCL_TX_SHADER_OFFSET_MATRIX00(x)						(0x00001b28+((x)*64))
-#define  NV20TCL_TX_SHADER_OFFSET_MATRIX00__SIZE					0x00000004
-#define  NV20TCL_TX_SHADER_OFFSET_MATRIX01(x)						(0x00001b2c+((x)*64))
-#define  NV20TCL_TX_SHADER_OFFSET_MATRIX01__SIZE					0x00000004
-#define  NV20TCL_TX_SHADER_OFFSET_MATRIX11(x)						(0x00001b30+((x)*64))
-#define  NV20TCL_TX_SHADER_OFFSET_MATRIX11__SIZE					0x00000004
-#define  NV20TCL_TX_SHADER_OFFSET_MATRIX10(x)						(0x00001b34+((x)*64))
-#define  NV20TCL_TX_SHADER_OFFSET_MATRIX10__SIZE					0x00000004
-#define  NV20TCL_DEPTH_UNK17D8								0x00001d78
-#define   NV20TCL_DEPTH_UNK17D8_CLAMP_SHIFT						4
-#define   NV20TCL_DEPTH_UNK17D8_CLAMP_MASK						0x000000f0
-#define  NV20TCL_MULTISAMPLE_CONTROL							0x00001d7c
-#define  NV20TCL_CLEAR_DEPTH_VALUE							0x00001d8c
-#define  NV20TCL_CLEAR_VALUE								0x00001d90
-#define  NV20TCL_CLEAR_BUFFERS								0x00001d94
-#define   NV20TCL_CLEAR_BUFFERS_COLOR_A							(1 <<  7)
-#define   NV20TCL_CLEAR_BUFFERS_COLOR_B							(1 <<  6)
-#define   NV20TCL_CLEAR_BUFFERS_COLOR_G							(1 <<  5)
-#define   NV20TCL_CLEAR_BUFFERS_COLOR_R							(1 <<  4)
-#define   NV20TCL_CLEAR_BUFFERS_STENCIL							(1 <<  1)
-#define   NV20TCL_CLEAR_BUFFERS_DEPTH							(1 <<  0)
-#define  NV20TCL_RC_COLOR0								0x00001e20
-#define   NV20TCL_RC_COLOR0_B_SHIFT							0
-#define   NV20TCL_RC_COLOR0_B_MASK							0x000000ff
-#define   NV20TCL_RC_COLOR0_G_SHIFT							8
-#define   NV20TCL_RC_COLOR0_G_MASK							0x0000ff00
-#define   NV20TCL_RC_COLOR0_R_SHIFT							16
-#define   NV20TCL_RC_COLOR0_R_MASK							0x00ff0000
-#define   NV20TCL_RC_COLOR0_A_SHIFT							24
-#define   NV20TCL_RC_COLOR0_A_MASK							0xff000000
-#define  NV20TCL_RC_COLOR1								0x00001e24
-#define   NV20TCL_RC_COLOR1_B_SHIFT							0
-#define   NV20TCL_RC_COLOR1_B_MASK							0x000000ff
-#define   NV20TCL_RC_COLOR1_G_SHIFT							8
-#define   NV20TCL_RC_COLOR1_G_MASK							0x0000ff00
-#define   NV20TCL_RC_COLOR1_R_SHIFT							16
-#define   NV20TCL_RC_COLOR1_R_MASK							0x00ff0000
-#define   NV20TCL_RC_COLOR1_A_SHIFT							24
-#define   NV20TCL_RC_COLOR1_A_MASK							0xff000000
-#define  NV20TCL_BACK_MATERIAL_SHININESS(x)						(0x00001e28+((x)*4))
-#define  NV20TCL_BACK_MATERIAL_SHININESS__SIZE						0x00000006
-#define  NV20TCL_RC_OUT_RGB(x)								(0x00001e40+((x)*4))
-#define  NV20TCL_RC_OUT_RGB__SIZE							0x00000008
-#define   NV20TCL_RC_OUT_RGB_CD_OUTPUT_SHIFT						0
-#define   NV20TCL_RC_OUT_RGB_CD_OUTPUT_MASK						0x0000000f
-#define    NV20TCL_RC_OUT_RGB_CD_OUTPUT_ZERO						0x00000000
-#define    NV20TCL_RC_OUT_RGB_CD_OUTPUT_CONSTANT_COLOR0_NV				0x00000001
-#define    NV20TCL_RC_OUT_RGB_CD_OUTPUT_CONSTANT_COLOR1_NV				0x00000002
-#define    NV20TCL_RC_OUT_RGB_CD_OUTPUT_FOG						0x00000003
-#define    NV20TCL_RC_OUT_RGB_CD_OUTPUT_PRIMARY_COLOR_NV				0x00000004
-#define    NV20TCL_RC_OUT_RGB_CD_OUTPUT_SECONDARY_COLOR_NV				0x00000005
-#define    NV20TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE0_ARB					0x00000008
-#define    NV20TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE1_ARB					0x00000009
-#define    NV20TCL_RC_OUT_RGB_CD_OUTPUT_SPARE0_NV					0x0000000c
-#define    NV20TCL_RC_OUT_RGB_CD_OUTPUT_SPARE1_NV					0x0000000d
-#define    NV20TCL_RC_OUT_RGB_CD_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x0000000e
-#define    NV20TCL_RC_OUT_RGB_CD_OUTPUT_E_TIMES_F_NV					0x0000000f
-#define   NV20TCL_RC_OUT_RGB_AB_OUTPUT_SHIFT						4
-#define   NV20TCL_RC_OUT_RGB_AB_OUTPUT_MASK						0x000000f0
-#define    NV20TCL_RC_OUT_RGB_AB_OUTPUT_ZERO						0x00000000
-#define    NV20TCL_RC_OUT_RGB_AB_OUTPUT_CONSTANT_COLOR0_NV				0x00000010
-#define    NV20TCL_RC_OUT_RGB_AB_OUTPUT_CONSTANT_COLOR1_NV				0x00000020
-#define    NV20TCL_RC_OUT_RGB_AB_OUTPUT_FOG						0x00000030
-#define    NV20TCL_RC_OUT_RGB_AB_OUTPUT_PRIMARY_COLOR_NV				0x00000040
-#define    NV20TCL_RC_OUT_RGB_AB_OUTPUT_SECONDARY_COLOR_NV				0x00000050
-#define    NV20TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE0_ARB					0x00000080
-#define    NV20TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE1_ARB					0x00000090
-#define    NV20TCL_RC_OUT_RGB_AB_OUTPUT_SPARE0_NV					0x000000c0
-#define    NV20TCL_RC_OUT_RGB_AB_OUTPUT_SPARE1_NV					0x000000d0
-#define    NV20TCL_RC_OUT_RGB_AB_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x000000e0
-#define    NV20TCL_RC_OUT_RGB_AB_OUTPUT_E_TIMES_F_NV					0x000000f0
-#define   NV20TCL_RC_OUT_RGB_SUM_OUTPUT_SHIFT						8
-#define   NV20TCL_RC_OUT_RGB_SUM_OUTPUT_MASK						0x00000f00
-#define    NV20TCL_RC_OUT_RGB_SUM_OUTPUT_ZERO						0x00000000
-#define    NV20TCL_RC_OUT_RGB_SUM_OUTPUT_CONSTANT_COLOR0_NV				0x00000100
-#define    NV20TCL_RC_OUT_RGB_SUM_OUTPUT_CONSTANT_COLOR1_NV				0x00000200
-#define    NV20TCL_RC_OUT_RGB_SUM_OUTPUT_FOG						0x00000300
-#define    NV20TCL_RC_OUT_RGB_SUM_OUTPUT_PRIMARY_COLOR_NV				0x00000400
-#define    NV20TCL_RC_OUT_RGB_SUM_OUTPUT_SECONDARY_COLOR_NV				0x00000500
-#define    NV20TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE0_ARB					0x00000800
-#define    NV20TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE1_ARB					0x00000900
-#define    NV20TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE0_NV					0x00000c00
-#define    NV20TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE1_NV					0x00000d00
-#define    NV20TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x00000e00
-#define    NV20TCL_RC_OUT_RGB_SUM_OUTPUT_E_TIMES_F_NV					0x00000f00
-#define   NV20TCL_RC_OUT_RGB_CD_DOT_PRODUCT						(1 << 12)
-#define   NV20TCL_RC_OUT_RGB_AB_DOT_PRODUCT						(1 << 13)
-#define   NV20TCL_RC_OUT_RGB_MUX_SUM							(1 << 14)
-#define   NV20TCL_RC_OUT_RGB_BIAS							(1 << 15)
-#define    NV20TCL_RC_OUT_RGB_BIAS_NONE							0x00000000
-#define    NV20TCL_RC_OUT_RGB_BIAS_BIAS_BY_NEGATIVE_ONE_HALF_NV				0x00008000
-#define   NV20TCL_RC_OUT_RGB_SCALE_SHIFT						17
-#define   NV20TCL_RC_OUT_RGB_SCALE_MASK							0x00000000
-#define    NV20TCL_RC_OUT_RGB_SCALE_NONE						0x00000000
-#define    NV20TCL_RC_OUT_RGB_SCALE_SCALE_BY_TWO_NV					0x00020000
-#define    NV20TCL_RC_OUT_RGB_SCALE_SCALE_BY_FOUR_NV					0x00040000
-#define    NV20TCL_RC_OUT_RGB_SCALE_SCALE_BY_ONE_HALF_NV				0x00060000
-#define  NV20TCL_RC_ENABLE								0x00001e60
-#define   NV20TCL_RC_ENABLE_NUM_COMBINERS_SHIFT						0
-#define   NV20TCL_RC_ENABLE_NUM_COMBINERS_MASK						0x0000000f
-#define  NV20TCL_TX_RCOMP								0x00001e6c
-#define   NV20TCL_TX_RCOMP_NEVER							0x00000000
-#define   NV20TCL_TX_RCOMP_GREATER							0x00000001
-#define   NV20TCL_TX_RCOMP_EQUAL							0x00000002
-#define   NV20TCL_TX_RCOMP_GEQUAL							0x00000003
-#define   NV20TCL_TX_RCOMP_LESS								0x00000004
-#define   NV20TCL_TX_RCOMP_NOTEQUAL							0x00000005
-#define   NV20TCL_TX_RCOMP_LEQUAL							0x00000006
-#define   NV20TCL_TX_RCOMP_ALWAYS							0x00000007
-#define  NV20TCL_TX_SHADER_OP								0x00001e70
-#define   NV20TCL_TX_SHADER_OP_TX0_SHIFT						0
-#define   NV20TCL_TX_SHADER_OP_TX0_MASK							0x0000001f
-#define    NV20TCL_TX_SHADER_OP_TX0_NONE						0x00000000
-#define    NV20TCL_TX_SHADER_OP_TX0_TEXTURE_2D						0x00000001
-#define    NV20TCL_TX_SHADER_OP_TX0_PASS_THROUGH					0x00000004
-#define    NV20TCL_TX_SHADER_OP_TX0_CULL_FRAGMENT					0x00000005
-#define    NV20TCL_TX_SHADER_OP_TX0_OFFSET_TEXTURE_2D					0x00000006
-#define    NV20TCL_TX_SHADER_OP_TX0_DOT_PRODUCT_TEXTURE_2D				0x00000009
-#define    NV20TCL_TX_SHADER_OP_TX0_DOT_PRODUCT_DEPTH_REPLACE				0x0000000a
-#define    NV20TCL_TX_SHADER_OP_TX0_DEPENDANT_AR_TEXTURE_2D				0x0000000f
-#define    NV20TCL_TX_SHADER_OP_TX0_DEPENDANT_GB_TEXTURE_2D				0x00000010
-#define    NV20TCL_TX_SHADER_OP_TX0_DOT_PRODUCT						0x00000011
-#define   NV20TCL_TX_SHADER_OP_TX1_SHIFT						5
-#define   NV20TCL_TX_SHADER_OP_TX1_MASK							0x000003e0
-#define    NV20TCL_TX_SHADER_OP_TX1_NONE						0x00000000
-#define    NV20TCL_TX_SHADER_OP_TX1_TEXTURE_2D						0x00000020
-#define    NV20TCL_TX_SHADER_OP_TX1_PASS_THROUGH					0x00000080
-#define    NV20TCL_TX_SHADER_OP_TX1_CULL_FRAGMENT					0x000000a0
-#define    NV20TCL_TX_SHADER_OP_TX1_OFFSET_TEXTURE_2D					0x000000c0
-#define    NV20TCL_TX_SHADER_OP_TX1_DOT_PRODUCT_TEXTURE_2D				0x00000120
-#define    NV20TCL_TX_SHADER_OP_TX1_DOT_PRODUCT_DEPTH_REPLACE				0x00000140
-#define    NV20TCL_TX_SHADER_OP_TX1_DEPENDANT_AR_TEXTURE_2D				0x000001e0
-#define    NV20TCL_TX_SHADER_OP_TX1_DEPENDANT_GB_TEXTURE_2D				0x00000200
-#define    NV20TCL_TX_SHADER_OP_TX1_DOT_PRODUCT						0x00000220
-#define   NV20TCL_TX_SHADER_OP_TX2_SHIFT						10
-#define   NV20TCL_TX_SHADER_OP_TX2_MASK							0x00007c00
-#define    NV20TCL_TX_SHADER_OP_TX2_NONE						0x00000000
-#define    NV20TCL_TX_SHADER_OP_TX2_TEXTURE_2D						0x00000400
-#define    NV20TCL_TX_SHADER_OP_TX2_PASS_THROUGH					0x00001000
-#define    NV20TCL_TX_SHADER_OP_TX2_CULL_FRAGMENT					0x00001400
-#define    NV20TCL_TX_SHADER_OP_TX2_OFFSET_TEXTURE_2D					0x00001800
-#define    NV20TCL_TX_SHADER_OP_TX2_DOT_PRODUCT_TEXTURE_2D				0x00002400
-#define    NV20TCL_TX_SHADER_OP_TX2_DOT_PRODUCT_DEPTH_REPLACE				0x00002800
-#define    NV20TCL_TX_SHADER_OP_TX2_DEPENDANT_AR_TEXTURE_2D				0x00003c00
-#define    NV20TCL_TX_SHADER_OP_TX2_DEPENDANT_GB_TEXTURE_2D				0x00004000
-#define    NV20TCL_TX_SHADER_OP_TX2_DOT_PRODUCT						0x00004400
-#define   NV20TCL_TX_SHADER_OP_TX3_SHIFT						15
-#define   NV20TCL_TX_SHADER_OP_TX3_MASK							0x000f8000
-#define    NV20TCL_TX_SHADER_OP_TX3_NONE						0x00000000
-#define    NV20TCL_TX_SHADER_OP_TX3_TEXTURE_2D						0x00008000
-#define    NV20TCL_TX_SHADER_OP_TX3_PASS_THROUGH					0x00020000
-#define    NV20TCL_TX_SHADER_OP_TX3_CULL_FRAGMENT					0x00028000
-#define    NV20TCL_TX_SHADER_OP_TX3_OFFSET_TEXTURE_2D					0x00030000
-#define    NV20TCL_TX_SHADER_OP_TX3_DOT_PRODUCT_TEXTURE_2D				0x00048000
-#define    NV20TCL_TX_SHADER_OP_TX3_DOT_PRODUCT_DEPTH_REPLACE				0x00050000
-#define    NV20TCL_TX_SHADER_OP_TX3_DEPENDANT_AR_TEXTURE_2D				0x00078000
-#define    NV20TCL_TX_SHADER_OP_TX3_DEPENDANT_GB_TEXTURE_2D				0x00080000
-#define    NV20TCL_TX_SHADER_OP_TX3_DOT_PRODUCT						0x00088000
-#define  NV20TCL_TX_SHADER_DOTMAPPING							0x00001e74
-#define   NV20TCL_TX_SHADER_DOTMAPPING_TX0_SHIFT					0
-#define   NV20TCL_TX_SHADER_DOTMAPPING_TX0_MASK						0x0000000f
-#define   NV20TCL_TX_SHADER_DOTMAPPING_TX1_SHIFT					4
-#define   NV20TCL_TX_SHADER_DOTMAPPING_TX1_MASK						0x000000f0
-#define   NV20TCL_TX_SHADER_DOTMAPPING_TX2_SHIFT					8
-#define   NV20TCL_TX_SHADER_DOTMAPPING_TX2_MASK						0x00000f00
-#define   NV20TCL_TX_SHADER_DOTMAPPING_TX3_SHIFT					12
-#define   NV20TCL_TX_SHADER_DOTMAPPING_TX3_MASK						0x0000f000
-#define  NV20TCL_TX_SHADER_PREVIOUS							0x00001e78
-#define   NV20TCL_TX_SHADER_PREVIOUS_TX0_SHIFT						8
-#define   NV20TCL_TX_SHADER_PREVIOUS_TX0_MASK						0x00000f00
-#define   NV20TCL_TX_SHADER_PREVIOUS_TX1_SHIFT						12
-#define   NV20TCL_TX_SHADER_PREVIOUS_TX1_MASK						0x0000f000
-#define   NV20TCL_TX_SHADER_PREVIOUS_TX2_SHIFT						16
-#define   NV20TCL_TX_SHADER_PREVIOUS_TX2_MASK						0x00030000
-#define   NV20TCL_TX_SHADER_PREVIOUS_TX3_SHIFT						20
-#define   NV20TCL_TX_SHADER_PREVIOUS_TX3_MASK						0x00300000
-#define  NV20TCL_ENGINE									0x00001e94
-#define   NV20TCL_ENGINE_VP								(1 <<  1)
-#define   NV20TCL_ENGINE_FIXED								(1 <<  2)
-#define  NV20TCL_VP_UPLOAD_FROM_ID							0x00001e9c
-#define  NV20TCL_VP_START_FROM_ID							0x00001ea0
-#define  NV20TCL_VP_UPLOAD_CONST_ID							0x00001ea4
-#define  NV20TCL_VIEWPORT_TRANSLATE_X							0x00001f00
-#define  NV20TCL_VIEWPORT_TRANSLATE_Y							0x00001f04
-#define  NV20TCL_VIEWPORT_TRANSLATE_Z							0x00001f08
-#define  NV20TCL_VIEWPORT_TRANSLATE_W							0x00001f0c
-
-
-#define NV17TCL										0x00000099
-
-#define  NV17TCL_DMA_IN_MEMORY4								0x000001ac
-#define  NV17TCL_DMA_IN_MEMORY5								0x000001b0
-#define  NV17TCL_COLOR_MASK_ENABLE							0x000002bc
-#define  NV17TCL_LMA_DEPTH_BUFFER_PITCH							0x00000d5c
-#define  NV17TCL_LMA_DEPTH_BUFFER_OFFSET						0x00000d60
-#define  NV17TCL_LMA_DEPTH_FILL_VALUE							0x00000d68
-#define  NV17TCL_LMA_DEPTH_BUFFER_CLEAR							0x00000d6c
-#define  NV17TCL_LMA_DEPTH_ENABLE							0x00001658
-
-
-#define NV20_SWIZZLED_SURFACE								0x0000009e
-
-
-
-#define NV12_IMAGE_BLIT									0x0000009f
-
-
-
-#define NV30_CONTEXT_SURFACES_2D							0x00000362
-
-
-
-#define NV30_STRETCHED_IMAGE_FROM_CPU							0x00000366
-
-
-
-#define NV30_TEXTURE_FROM_CPU								0x0000037b
-
-
-
-#define NV30_SCALED_IMAGE_FROM_MEMORY							0x00000389
-
-
-
-#define NV30_IMAGE_FROM_CPU								0x0000038a
-
-
-
-#define NV30TCL										0x00000397
-
-
-
-#define NV30_SWIZZLED_SURFACE								0x0000039e
-
-
-
-#define NV35TCL										0x00000497
-
-
-
-#define NV25TCL										0x00000597
-
-#define  NV25TCL_DMA_IN_MEMORY4								0x0000019c
-#define  NV25TCL_DMA_IN_MEMORY5								0x000001a0
-#define  NV25TCL_DMA_IN_MEMORY8								0x000001ac
-#define  NV25TCL_DMA_IN_MEMORY9								0x000001b0
-
-
-#define NV34TCL										0x00000697
-
-#define  NV34TCL_NOP									0x00000100
-#define  NV34TCL_NOTIFY									0x00000104
-#define  NV34TCL_DMA_NOTIFY								0x00000180
-#define  NV34TCL_DMA_TEXTURE0								0x00000184
-#define  NV34TCL_DMA_TEXTURE1								0x00000188
-#define  NV34TCL_DMA_COLOR1								0x0000018c
-#define  NV34TCL_DMA_COLOR0								0x00000194
-#define  NV34TCL_DMA_ZETA								0x00000198
-#define  NV34TCL_DMA_VTXBUF0								0x0000019c
-#define  NV34TCL_DMA_VTXBUF1								0x000001a0
-#define  NV34TCL_DMA_FENCE								0x000001a4
-#define  NV34TCL_DMA_QUERY								0x000001a8
-#define  NV34TCL_DMA_IN_MEMORY7								0x000001ac
-#define  NV34TCL_DMA_IN_MEMORY8								0x000001b0
-#define  NV34TCL_RT_HORIZ								0x00000200
-#define   NV34TCL_RT_HORIZ_X_SHIFT							0
-#define   NV34TCL_RT_HORIZ_X_MASK							0x0000ffff
-#define   NV34TCL_RT_HORIZ_W_SHIFT							16
-#define   NV34TCL_RT_HORIZ_W_MASK							0xffff0000
-#define  NV34TCL_RT_VERT								0x00000204
-#define   NV34TCL_RT_VERT_Y_SHIFT							0
-#define   NV34TCL_RT_VERT_Y_MASK							0x0000ffff
-#define   NV34TCL_RT_VERT_H_SHIFT							16
-#define   NV34TCL_RT_VERT_H_MASK							0xffff0000
-#define  NV34TCL_RT_FORMAT								0x00000208
-#define   NV34TCL_RT_FORMAT_LOG2_HEIGHT_SHIFT						24
-#define   NV34TCL_RT_FORMAT_LOG2_HEIGHT_MASK						0xff000000
-#define   NV34TCL_RT_FORMAT_LOG2_WIDTH_SHIFT						16
-#define   NV34TCL_RT_FORMAT_LOG2_WIDTH_MASK						0x00ff0000
-#define   NV34TCL_RT_FORMAT_TYPE_SHIFT							8
-#define   NV34TCL_RT_FORMAT_TYPE_MASK							0x00000f00
-#define    NV34TCL_RT_FORMAT_TYPE_LINEAR						0x00000100
-#define    NV34TCL_RT_FORMAT_TYPE_SWIZZLED						0x00000200
-#define   NV34TCL_RT_FORMAT_ZETA_SHIFT							5
-#define   NV34TCL_RT_FORMAT_ZETA_MASK							0x000000e0
-#define    NV34TCL_RT_FORMAT_ZETA_Z16							0x00000020
-#define    NV34TCL_RT_FORMAT_ZETA_Z24S8							0x00000040
-#define   NV34TCL_RT_FORMAT_COLOR_SHIFT							0
-#define   NV34TCL_RT_FORMAT_COLOR_MASK							0x0000001f
-#define    NV34TCL_RT_FORMAT_COLOR_R5G6B5						0x00000003
-#define    NV34TCL_RT_FORMAT_COLOR_X8R8G8B8						0x00000005
-#define    NV34TCL_RT_FORMAT_COLOR_A8R8G8B8						0x00000008
-#define    NV34TCL_RT_FORMAT_COLOR_B8							0x00000009
-#define    NV34TCL_RT_FORMAT_COLOR_UNKNOWN						0x0000000d
-#define    NV34TCL_RT_FORMAT_COLOR_X8B8G8R8						0x0000000f
-#define    NV34TCL_RT_FORMAT_COLOR_A8B8G8R8						0x00000010
-#define  NV34TCL_COLOR0_PITCH								0x0000020c
-#define   NV34TCL_COLOR0_PITCH_COLOR0_SHIFT						0
-#define   NV34TCL_COLOR0_PITCH_COLOR0_MASK						0x0000ffff
-#define   NV34TCL_COLOR0_PITCH_ZETA_SHIFT						16
-#define   NV34TCL_COLOR0_PITCH_ZETA_MASK						0xffff0000
-#define  NV34TCL_COLOR0_OFFSET								0x00000210
-#define  NV34TCL_ZETA_OFFSET								0x00000214
-#define  NV34TCL_COLOR1_OFFSET								0x00000218
-#define  NV34TCL_COLOR1_PITCH								0x0000021c
-#define  NV34TCL_RT_ENABLE								0x00000220
-#define   NV34TCL_RT_ENABLE_MRT								(1 <<  4)
-#define   NV34TCL_RT_ENABLE_COLOR1							(1 <<  1)
-#define   NV34TCL_RT_ENABLE_COLOR0							(1 <<  0)
-#define  NV34TCL_LMA_DEPTH_PITCH							0x0000022c
-#define  NV34TCL_LMA_DEPTH_OFFSET							0x00000230
-#define  NV34TCL_TX_UNITS_ENABLE							0x0000023c
-#define   NV34TCL_TX_UNITS_ENABLE_TX0							(1 <<  0)
-#define   NV34TCL_TX_UNITS_ENABLE_TX1							(1 <<  1)
-#define   NV34TCL_TX_UNITS_ENABLE_TX2							(1 <<  2)
-#define   NV34TCL_TX_UNITS_ENABLE_TX3							(1 <<  3)
-#define   NV34TCL_TX_UNITS_ENABLE_TX4							(1 <<  4)
-#define   NV34TCL_TX_UNITS_ENABLE_TX5							(1 <<  5)
-#define   NV34TCL_TX_UNITS_ENABLE_TX6							(1 <<  6)
-#define   NV34TCL_TX_UNITS_ENABLE_TX7							(1 <<  7)
-#define  NV34TCL_TX_MATRIX_ENABLE(x)							(0x00000240+((x)*4))
-#define  NV34TCL_TX_MATRIX_ENABLE__SIZE							0x00000008
-#define  NV34TCL_VIEWPORT_TX_ORIGIN							0x000002b8
-#define   NV34TCL_VIEWPORT_TX_ORIGIN_X_SHIFT						0
-#define   NV34TCL_VIEWPORT_TX_ORIGIN_X_MASK						0x0000ffff
-#define   NV34TCL_VIEWPORT_TX_ORIGIN_Y_SHIFT						16
-#define   NV34TCL_VIEWPORT_TX_ORIGIN_Y_MASK						0xffff0000
-#define  NV34TCL_VIEWPORT_CLIP_MODE							0x000002bc
-#define  NV34TCL_VIEWPORT_CLIP_HORIZ(x)							(0x000002c0+((x)*8))
-#define  NV34TCL_VIEWPORT_CLIP_HORIZ__SIZE						0x00000008
-#define   NV34TCL_VIEWPORT_CLIP_HORIZ_L_SHIFT						0
-#define   NV34TCL_VIEWPORT_CLIP_HORIZ_L_MASK						0x0000ffff
-#define   NV34TCL_VIEWPORT_CLIP_HORIZ_R_SHIFT						16
-#define   NV34TCL_VIEWPORT_CLIP_HORIZ_R_MASK						0xffff0000
-#define  NV34TCL_VIEWPORT_CLIP_VERT(x)							(0x000002c4+((x)*8))
-#define  NV34TCL_VIEWPORT_CLIP_VERT__SIZE						0x00000008
-#define   NV34TCL_VIEWPORT_CLIP_VERT_T_SHIFT						0
-#define   NV34TCL_VIEWPORT_CLIP_VERT_T_MASK						0x0000ffff
-#define   NV34TCL_VIEWPORT_CLIP_VERT_D_SHIFT						16
-#define   NV34TCL_VIEWPORT_CLIP_VERT_D_MASK						0xffff0000
-#define  NV34TCL_DITHER_ENABLE								0x00000300
-#define  NV34TCL_ALPHA_FUNC_ENABLE							0x00000304
-#define  NV34TCL_ALPHA_FUNC_FUNC							0x00000308
-#define   NV34TCL_ALPHA_FUNC_FUNC_NEVER							0x00000200
-#define   NV34TCL_ALPHA_FUNC_FUNC_LESS							0x00000201
-#define   NV34TCL_ALPHA_FUNC_FUNC_EQUAL							0x00000202
-#define   NV34TCL_ALPHA_FUNC_FUNC_LEQUAL						0x00000203
-#define   NV34TCL_ALPHA_FUNC_FUNC_GREATER						0x00000204
-#define   NV34TCL_ALPHA_FUNC_FUNC_GREATER						0x00000204
-#define   NV34TCL_ALPHA_FUNC_FUNC_NOTEQUAL						0x00000205
-#define   NV34TCL_ALPHA_FUNC_FUNC_GEQUAL						0x00000206
-#define   NV34TCL_ALPHA_FUNC_FUNC_ALWAYS						0x00000207
-#define  NV34TCL_ALPHA_FUNC_REF								0x0000030c
-#define  NV34TCL_BLEND_FUNC_ENABLE							0x00000310
-#define  NV34TCL_BLEND_FUNC_SRC								0x00000314
-#define   NV34TCL_BLEND_FUNC_SRC_RGB_SHIFT						0
-#define   NV34TCL_BLEND_FUNC_SRC_RGB_MASK						0x0000ffff
-#define    NV34TCL_BLEND_FUNC_SRC_RGB_ZERO						0x00000000
-#define    NV34TCL_BLEND_FUNC_SRC_RGB_ONE						0x00000001
-#define    NV34TCL_BLEND_FUNC_SRC_RGB_SRC_COLOR						0x00000300
-#define    NV34TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_SRC_COLOR				0x00000301
-#define    NV34TCL_BLEND_FUNC_SRC_RGB_SRC_ALPHA						0x00000302
-#define    NV34TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_SRC_ALPHA				0x00000303
-#define    NV34TCL_BLEND_FUNC_SRC_RGB_DST_ALPHA						0x00000304
-#define    NV34TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_DST_ALPHA				0x00000305
-#define    NV34TCL_BLEND_FUNC_SRC_RGB_DST_COLOR						0x00000306
-#define    NV34TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_DST_COLOR				0x00000307
-#define    NV34TCL_BLEND_FUNC_SRC_RGB_SRC_ALPHA_SATURATE				0x00000308
-#define    NV34TCL_BLEND_FUNC_SRC_RGB_CONSTANT_COLOR					0x00008001
-#define    NV34TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_CONSTANT_COLOR				0x00008002
-#define    NV34TCL_BLEND_FUNC_SRC_RGB_CONSTANT_ALPHA					0x00008003
-#define    NV34TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_CONSTANT_ALPHA				0x00008004
-#define   NV34TCL_BLEND_FUNC_SRC_ALPHA_SHIFT						16
-#define   NV34TCL_BLEND_FUNC_SRC_ALPHA_MASK						0xffff0000
-#define    NV34TCL_BLEND_FUNC_SRC_ALPHA_ZERO						0x00000000
-#define    NV34TCL_BLEND_FUNC_SRC_ALPHA_ONE						0x00010000
-#define    NV34TCL_BLEND_FUNC_SRC_ALPHA_SRC_COLOR					0x03000000
-#define    NV34TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_SRC_COLOR				0x03010000
-#define    NV34TCL_BLEND_FUNC_SRC_ALPHA_SRC_ALPHA					0x03020000
-#define    NV34TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_SRC_ALPHA				0x03030000
-#define    NV34TCL_BLEND_FUNC_SRC_ALPHA_DST_ALPHA					0x03040000
-#define    NV34TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_DST_ALPHA				0x03050000
-#define    NV34TCL_BLEND_FUNC_SRC_ALPHA_DST_COLOR					0x03060000
-#define    NV34TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_DST_COLOR				0x03070000
-#define    NV34TCL_BLEND_FUNC_SRC_ALPHA_SRC_ALPHA_SATURATE				0x03080000
-#define    NV34TCL_BLEND_FUNC_SRC_ALPHA_CONSTANT_COLOR					0x80010000
-#define    NV34TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_CONSTANT_COLOR			0x80020000
-#define    NV34TCL_BLEND_FUNC_SRC_ALPHA_CONSTANT_ALPHA					0x80030000
-#define    NV34TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_CONSTANT_ALPHA			0x80040000
-#define  NV34TCL_BLEND_FUNC_DST								0x00000318
-#define   NV34TCL_BLEND_FUNC_DST_RGB_SHIFT						0
-#define   NV34TCL_BLEND_FUNC_DST_RGB_MASK						0x0000ffff
-#define    NV34TCL_BLEND_FUNC_DST_RGB_ZERO						0x00000000
-#define    NV34TCL_BLEND_FUNC_DST_RGB_ONE						0x00000001
-#define    NV34TCL_BLEND_FUNC_DST_RGB_SRC_COLOR						0x00000300
-#define    NV34TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_SRC_COLOR				0x00000301
-#define    NV34TCL_BLEND_FUNC_DST_RGB_SRC_ALPHA						0x00000302
-#define    NV34TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_SRC_ALPHA				0x00000303
-#define    NV34TCL_BLEND_FUNC_DST_RGB_DST_ALPHA						0x00000304
-#define    NV34TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_DST_ALPHA				0x00000305
-#define    NV34TCL_BLEND_FUNC_DST_RGB_DST_COLOR						0x00000306
-#define    NV34TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_DST_COLOR				0x00000307
-#define    NV34TCL_BLEND_FUNC_DST_RGB_SRC_ALPHA_SATURATE				0x00000308
-#define    NV34TCL_BLEND_FUNC_DST_RGB_CONSTANT_COLOR					0x00008001
-#define    NV34TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_CONSTANT_COLOR				0x00008002
-#define    NV34TCL_BLEND_FUNC_DST_RGB_CONSTANT_ALPHA					0x00008003
-#define    NV34TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_CONSTANT_ALPHA				0x00008004
-#define   NV34TCL_BLEND_FUNC_DST_ALPHA_SHIFT						16
-#define   NV34TCL_BLEND_FUNC_DST_ALPHA_MASK						0xffff0000
-#define    NV34TCL_BLEND_FUNC_DST_ALPHA_ZERO						0x00000000
-#define    NV34TCL_BLEND_FUNC_DST_ALPHA_ONE						0x00010000
-#define    NV34TCL_BLEND_FUNC_DST_ALPHA_SRC_COLOR					0x03000000
-#define    NV34TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_SRC_COLOR				0x03010000
-#define    NV34TCL_BLEND_FUNC_DST_ALPHA_SRC_ALPHA					0x03020000
-#define    NV34TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_SRC_ALPHA				0x03030000
-#define    NV34TCL_BLEND_FUNC_DST_ALPHA_DST_ALPHA					0x03040000
-#define    NV34TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_DST_ALPHA				0x03050000
-#define    NV34TCL_BLEND_FUNC_DST_ALPHA_DST_COLOR					0x03060000
-#define    NV34TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_DST_COLOR				0x03070000
-#define    NV34TCL_BLEND_FUNC_DST_ALPHA_SRC_ALPHA_SATURATE				0x03080000
-#define    NV34TCL_BLEND_FUNC_DST_ALPHA_CONSTANT_COLOR					0x80010000
-#define    NV34TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_CONSTANT_COLOR			0x80020000
-#define    NV34TCL_BLEND_FUNC_DST_ALPHA_CONSTANT_ALPHA					0x80030000
-#define    NV34TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_CONSTANT_ALPHA			0x80040000
-#define  NV34TCL_BLEND_COLOR								0x0000031c
-#define   NV34TCL_BLEND_COLOR_B_SHIFT							0
-#define   NV34TCL_BLEND_COLOR_B_MASK							0x000000ff
-#define   NV34TCL_BLEND_COLOR_G_SHIFT							8
-#define   NV34TCL_BLEND_COLOR_G_MASK							0x0000ff00
-#define   NV34TCL_BLEND_COLOR_R_SHIFT							16
-#define   NV34TCL_BLEND_COLOR_R_MASK							0x00ff0000
-#define   NV34TCL_BLEND_COLOR_A_SHIFT							24
-#define   NV34TCL_BLEND_COLOR_A_MASK							0xff000000
-#define  NV34TCL_BLEND_EQUATION								0x00000320
-#define   NV34TCL_BLEND_EQUATION_FUNC_ADD						0x00008006
-#define   NV34TCL_BLEND_EQUATION_MIN							0x00008007
-#define   NV34TCL_BLEND_EQUATION_MAX							0x00008008
-#define   NV34TCL_BLEND_EQUATION_FUNC_SUBTRACT						0x0000800a
-#define   NV34TCL_BLEND_EQUATION_FUNC_REVERSE_SUBTRACT					0x0000800b
-#define  NV34TCL_COLOR_MASK								0x00000324
-#define   NV34TCL_COLOR_MASK_B_SHIFT							0
-#define   NV34TCL_COLOR_MASK_B_MASK							0x000000ff
-#define   NV34TCL_COLOR_MASK_G_SHIFT							8
-#define   NV34TCL_COLOR_MASK_G_MASK							0x0000ff00
-#define   NV34TCL_COLOR_MASK_R_SHIFT							16
-#define   NV34TCL_COLOR_MASK_R_MASK							0x00ff0000
-#define   NV34TCL_COLOR_MASK_A_SHIFT							24
-#define   NV34TCL_COLOR_MASK_A_MASK							0xff000000
-#define  NV34TCL_STENCIL_BACK_ENABLE							0x00000328
-#define  NV34TCL_STENCIL_BACK_MASK							0x0000032c
-#define  NV34TCL_STENCIL_BACK_FUNC_FUNC							0x00000330
-#define   NV34TCL_STENCIL_BACK_FUNC_FUNC_NEVER						0x00000200
-#define   NV34TCL_STENCIL_BACK_FUNC_FUNC_LESS						0x00000201
-#define   NV34TCL_STENCIL_BACK_FUNC_FUNC_EQUAL						0x00000202
-#define   NV34TCL_STENCIL_BACK_FUNC_FUNC_LEQUAL						0x00000203
-#define   NV34TCL_STENCIL_BACK_FUNC_FUNC_GREATER					0x00000204
-#define   NV34TCL_STENCIL_BACK_FUNC_FUNC_GREATER					0x00000204
-#define   NV34TCL_STENCIL_BACK_FUNC_FUNC_NOTEQUAL					0x00000205
-#define   NV34TCL_STENCIL_BACK_FUNC_FUNC_GEQUAL						0x00000206
-#define   NV34TCL_STENCIL_BACK_FUNC_FUNC_ALWAYS						0x00000207
-#define  NV34TCL_STENCIL_BACK_FUNC_REF							0x00000334
-#define  NV34TCL_STENCIL_BACK_FUNC_MASK							0x00000338
-#define  NV34TCL_STENCIL_BACK_OP_FAIL							0x0000033c
-#define   NV34TCL_STENCIL_BACK_OP_FAIL_ZERO						0x00000000
-#define   NV34TCL_STENCIL_BACK_OP_FAIL_INVERT						0x0000150a
-#define   NV34TCL_STENCIL_BACK_OP_FAIL_KEEP						0x00001e00
-#define   NV34TCL_STENCIL_BACK_OP_FAIL_REPLACE						0x00001e01
-#define   NV34TCL_STENCIL_BACK_OP_FAIL_INCR						0x00001e02
-#define   NV34TCL_STENCIL_BACK_OP_FAIL_DECR						0x00001e03
-#define   NV34TCL_STENCIL_BACK_OP_FAIL_INCR_WRAP					0x00008507
-#define   NV34TCL_STENCIL_BACK_OP_FAIL_DECR_WRAP					0x00008508
-#define  NV34TCL_STENCIL_BACK_OP_ZFAIL							0x00000340
-#define   NV34TCL_STENCIL_BACK_OP_ZFAIL_ZERO						0x00000000
-#define   NV34TCL_STENCIL_BACK_OP_ZFAIL_INVERT						0x0000150a
-#define   NV34TCL_STENCIL_BACK_OP_ZFAIL_KEEP						0x00001e00
-#define   NV34TCL_STENCIL_BACK_OP_ZFAIL_REPLACE						0x00001e01
-#define   NV34TCL_STENCIL_BACK_OP_ZFAIL_INCR						0x00001e02
-#define   NV34TCL_STENCIL_BACK_OP_ZFAIL_DECR						0x00001e03
-#define   NV34TCL_STENCIL_BACK_OP_ZFAIL_INCR_WRAP					0x00008507
-#define   NV34TCL_STENCIL_BACK_OP_ZFAIL_DECR_WRAP					0x00008508
-#define  NV34TCL_STENCIL_BACK_OP_ZPASS							0x00000344
-#define   NV34TCL_STENCIL_BACK_OP_ZPASS_ZERO						0x00000000
-#define   NV34TCL_STENCIL_BACK_OP_ZPASS_INVERT						0x0000150a
-#define   NV34TCL_STENCIL_BACK_OP_ZPASS_KEEP						0x00001e00
-#define   NV34TCL_STENCIL_BACK_OP_ZPASS_REPLACE						0x00001e01
-#define   NV34TCL_STENCIL_BACK_OP_ZPASS_INCR						0x00001e02
-#define   NV34TCL_STENCIL_BACK_OP_ZPASS_DECR						0x00001e03
-#define   NV34TCL_STENCIL_BACK_OP_ZPASS_INCR_WRAP					0x00008507
-#define   NV34TCL_STENCIL_BACK_OP_ZPASS_DECR_WRAP					0x00008508
-#define  NV34TCL_STENCIL_FRONT_ENABLE							0x00000348
-#define  NV34TCL_STENCIL_FRONT_MASK							0x0000034c
-#define  NV34TCL_STENCIL_FRONT_FUNC_FUNC						0x00000350
-#define   NV34TCL_STENCIL_FRONT_FUNC_FUNC_NEVER						0x00000200
-#define   NV34TCL_STENCIL_FRONT_FUNC_FUNC_LESS						0x00000201
-#define   NV34TCL_STENCIL_FRONT_FUNC_FUNC_EQUAL						0x00000202
-#define   NV34TCL_STENCIL_FRONT_FUNC_FUNC_LEQUAL					0x00000203
-#define   NV34TCL_STENCIL_FRONT_FUNC_FUNC_GREATER					0x00000204
-#define   NV34TCL_STENCIL_FRONT_FUNC_FUNC_GREATER					0x00000204
-#define   NV34TCL_STENCIL_FRONT_FUNC_FUNC_NOTEQUAL					0x00000205
-#define   NV34TCL_STENCIL_FRONT_FUNC_FUNC_GEQUAL					0x00000206
-#define   NV34TCL_STENCIL_FRONT_FUNC_FUNC_ALWAYS					0x00000207
-#define  NV34TCL_STENCIL_FRONT_FUNC_REF							0x00000354
-#define  NV34TCL_STENCIL_FRONT_FUNC_MASK						0x00000358
-#define  NV34TCL_STENCIL_FRONT_OP_FAIL							0x0000035c
-#define   NV34TCL_STENCIL_FRONT_OP_FAIL_ZERO						0x00000000
-#define   NV34TCL_STENCIL_FRONT_OP_FAIL_INVERT						0x0000150a
-#define   NV34TCL_STENCIL_FRONT_OP_FAIL_KEEP						0x00001e00
-#define   NV34TCL_STENCIL_FRONT_OP_FAIL_REPLACE						0x00001e01
-#define   NV34TCL_STENCIL_FRONT_OP_FAIL_INCR						0x00001e02
-#define   NV34TCL_STENCIL_FRONT_OP_FAIL_DECR						0x00001e03
-#define   NV34TCL_STENCIL_FRONT_OP_FAIL_INCR_WRAP					0x00008507
-#define   NV34TCL_STENCIL_FRONT_OP_FAIL_DECR_WRAP					0x00008508
-#define  NV34TCL_STENCIL_FRONT_OP_ZFAIL							0x00000360
-#define   NV34TCL_STENCIL_FRONT_OP_ZFAIL_ZERO						0x00000000
-#define   NV34TCL_STENCIL_FRONT_OP_ZFAIL_INVERT						0x0000150a
-#define   NV34TCL_STENCIL_FRONT_OP_ZFAIL_KEEP						0x00001e00
-#define   NV34TCL_STENCIL_FRONT_OP_ZFAIL_REPLACE					0x00001e01
-#define   NV34TCL_STENCIL_FRONT_OP_ZFAIL_INCR						0x00001e02
-#define   NV34TCL_STENCIL_FRONT_OP_ZFAIL_DECR						0x00001e03
-#define   NV34TCL_STENCIL_FRONT_OP_ZFAIL_INCR_WRAP					0x00008507
-#define   NV34TCL_STENCIL_FRONT_OP_ZFAIL_DECR_WRAP					0x00008508
-#define  NV34TCL_STENCIL_FRONT_OP_ZPASS							0x00000364
-#define   NV34TCL_STENCIL_FRONT_OP_ZPASS_ZERO						0x00000000
-#define   NV34TCL_STENCIL_FRONT_OP_ZPASS_INVERT						0x0000150a
-#define   NV34TCL_STENCIL_FRONT_OP_ZPASS_KEEP						0x00001e00
-#define   NV34TCL_STENCIL_FRONT_OP_ZPASS_REPLACE					0x00001e01
-#define   NV34TCL_STENCIL_FRONT_OP_ZPASS_INCR						0x00001e02
-#define   NV34TCL_STENCIL_FRONT_OP_ZPASS_DECR						0x00001e03
-#define   NV34TCL_STENCIL_FRONT_OP_ZPASS_INCR_WRAP					0x00008507
-#define   NV34TCL_STENCIL_FRONT_OP_ZPASS_DECR_WRAP					0x00008508
-#define  NV34TCL_SHADE_MODEL								0x00000368
-#define   NV34TCL_SHADE_MODEL_FLAT							0x00001d00
-#define   NV34TCL_SHADE_MODEL_SMOOTH							0x00001d01
-#define  NV34TCL_FOG_ENABLE								0x0000036c
-#define  NV34TCL_FOG_COLOR								0x00000370
-#define   NV34TCL_FOG_COLOR_R_SHIFT							0
-#define   NV34TCL_FOG_COLOR_R_MASK							0x000000ff
-#define   NV34TCL_FOG_COLOR_G_SHIFT							8
-#define   NV34TCL_FOG_COLOR_G_MASK							0x0000ff00
-#define   NV34TCL_FOG_COLOR_B_SHIFT							16
-#define   NV34TCL_FOG_COLOR_B_MASK							0x00ff0000
-#define   NV34TCL_FOG_COLOR_A_SHIFT							24
-#define   NV34TCL_FOG_COLOR_A_MASK							0xff000000
-#define  NV34TCL_COLOR_LOGIC_OP_ENABLE							0x00000374
-#define  NV34TCL_COLOR_LOGIC_OP_OP							0x00000378
-#define   NV34TCL_COLOR_LOGIC_OP_OP_CLEAR						0x00001500
-#define   NV34TCL_COLOR_LOGIC_OP_OP_AND							0x00001501
-#define   NV34TCL_COLOR_LOGIC_OP_OP_AND_REVERSE						0x00001502
-#define   NV34TCL_COLOR_LOGIC_OP_OP_COPY						0x00001503
-#define   NV34TCL_COLOR_LOGIC_OP_OP_AND_INVERTED					0x00001504
-#define   NV34TCL_COLOR_LOGIC_OP_OP_NOOP						0x00001505
-#define   NV34TCL_COLOR_LOGIC_OP_OP_XOR							0x00001506
-#define   NV34TCL_COLOR_LOGIC_OP_OP_OR							0x00001507
-#define   NV34TCL_COLOR_LOGIC_OP_OP_NOR							0x00001508
-#define   NV34TCL_COLOR_LOGIC_OP_OP_EQUIV						0x00001509
-#define   NV34TCL_COLOR_LOGIC_OP_OP_INVERT						0x0000150a
-#define   NV34TCL_COLOR_LOGIC_OP_OP_OR_REVERSE						0x0000150b
-#define   NV34TCL_COLOR_LOGIC_OP_OP_COPY_INVERTED					0x0000150c
-#define   NV34TCL_COLOR_LOGIC_OP_OP_OR_INVERTED						0x0000150d
-#define   NV34TCL_COLOR_LOGIC_OP_OP_NAND						0x0000150e
-#define   NV34TCL_COLOR_LOGIC_OP_OP_SET							0x0000150f
-#define  NV34TCL_NORMALIZE_ENABLE							0x0000037c
-#define  NV34TCL_COLOR_MATERIAL								0x00000390
-#define   NV34TCL_COLOR_MATERIAL_FRONT_EMISSION_ENABLE					(1 <<  0)
-#define   NV34TCL_COLOR_MATERIAL_FRONT_AMBIENT_ENABLE					(1 <<  2)
-#define   NV34TCL_COLOR_MATERIAL_FRONT_DIFFUSE_ENABLE					(1 <<  4)
-#define   NV34TCL_COLOR_MATERIAL_FRONT_SPECULAR_ENABLE					(1 <<  6)
-#define   NV34TCL_COLOR_MATERIAL_BACK_EMISSION_ENABLE					(1 <<  8)
-#define   NV34TCL_COLOR_MATERIAL_BACK_AMBIENT_ENABLE					(1 << 10)
-#define   NV34TCL_COLOR_MATERIAL_BACK_DIFFUSE_ENABLE					(1 << 12)
-#define   NV34TCL_COLOR_MATERIAL_BACK_SPECULAR_ENABLE					(1 << 14)
-#define  NV34TCL_DEPTH_RANGE_NEAR							0x00000394
-#define  NV34TCL_DEPTH_RANGE_FAR							0x00000398
-#define  NV34TCL_COLOR_MATERIAL_FRONT_R							0x000003a0
-#define  NV34TCL_COLOR_MATERIAL_FRONT_G							0x000003a4
-#define  NV34TCL_COLOR_MATERIAL_FRONT_B							0x000003a8
-#define  NV34TCL_COLOR_MATERIAL_FRONT_A							0x000003b4
-#define  NV34TCL_LINE_WIDTH								0x000003b8
-#define  NV34TCL_LINE_SMOOTH_ENABLE							0x000003bc
-#define  NV34TCL_TX_GEN_S(x)								(0x00000400+((x)*16))
-#define  NV34TCL_TX_GEN_S__SIZE								0x00000008
-#define   NV34TCL_TX_GEN_S_FALSE							0x00000000
-#define   NV34TCL_TX_GEN_S_EYE_LINEAR							0x00002400
-#define   NV34TCL_TX_GEN_S_OBJECT_LINEAR						0x00002401
-#define   NV34TCL_TX_GEN_S_SPHERE_MAP							0x00002402
-#define   NV34TCL_TX_GEN_S_NORMAL_MAP							0x00008511
-#define   NV34TCL_TX_GEN_S_REFLECTION_MAP						0x00008512
-#define  NV34TCL_TX_GEN_T(x)								(0x00000404+((x)*16))
-#define  NV34TCL_TX_GEN_T__SIZE								0x00000008
-#define   NV34TCL_TX_GEN_T_FALSE							0x00000000
-#define   NV34TCL_TX_GEN_T_EYE_LINEAR							0x00002400
-#define   NV34TCL_TX_GEN_T_OBJECT_LINEAR						0x00002401
-#define   NV34TCL_TX_GEN_T_SPHERE_MAP							0x00002402
-#define   NV34TCL_TX_GEN_T_NORMAL_MAP							0x00008511
-#define   NV34TCL_TX_GEN_T_REFLECTION_MAP						0x00008512
-#define  NV34TCL_TX_GEN_R(x)								(0x00000408+((x)*16))
-#define  NV34TCL_TX_GEN_R__SIZE								0x00000008
-#define   NV34TCL_TX_GEN_R_FALSE							0x00000000
-#define   NV34TCL_TX_GEN_R_EYE_LINEAR							0x00002400
-#define   NV34TCL_TX_GEN_R_OBJECT_LINEAR						0x00002401
-#define   NV34TCL_TX_GEN_R_SPHERE_MAP							0x00002402
-#define   NV34TCL_TX_GEN_R_NORMAL_MAP							0x00008511
-#define   NV34TCL_TX_GEN_R_REFLECTION_MAP						0x00008512
-#define  NV34TCL_TX_GEN_Q(x)								(0x0000040c+((x)*16))
-#define  NV34TCL_TX_GEN_Q__SIZE								0x00000008
-#define   NV34TCL_TX_GEN_Q_FALSE							0x00000000
-#define   NV34TCL_TX_GEN_Q_EYE_LINEAR							0x00002400
-#define   NV34TCL_TX_GEN_Q_OBJECT_LINEAR						0x00002401
-#define   NV34TCL_TX_GEN_Q_SPHERE_MAP							0x00002402
-#define   NV34TCL_TX_GEN_Q_NORMAL_MAP							0x00008511
-#define   NV34TCL_TX_GEN_Q_REFLECTION_MAP						0x00008512
-#define  NV34TCL_MODELVIEW_MATRIX(x)							(0x00000480+((x)*4))
-#define  NV34TCL_MODELVIEW_MATRIX__SIZE							0x00000010
-#define  NV34TCL_INVERSE_MODELVIEW_MATRIX(x)						(0x00000580+((x)*4))
-#define  NV34TCL_INVERSE_MODELVIEW_MATRIX__SIZE						0x0000000c
-#define  NV34TCL_PROJECTION_MATRIX(x)							(0x00000680+((x)*4))
-#define  NV34TCL_PROJECTION_MATRIX__SIZE						0x00000010
-#define  NV34TCL_TX0_MATRIX(x)								(0x000006c0+((x)*4))
-#define  NV34TCL_TX0_MATRIX__SIZE							0x00000010
-#define  NV34TCL_TX1_MATRIX(x)								(0x00000700+((x)*4))
-#define  NV34TCL_TX1_MATRIX__SIZE							0x00000010
-#define  NV34TCL_TX2_MATRIX(x)								(0x00000740+((x)*4))
-#define  NV34TCL_TX2_MATRIX__SIZE							0x00000010
-#define  NV34TCL_TX3_MATRIX(x)								(0x00000780+((x)*4))
-#define  NV34TCL_TX3_MATRIX__SIZE							0x00000010
-#define  NV34TCL_TX4_MATRIX(x)								(0x000007c0+((x)*4))
-#define  NV34TCL_TX4_MATRIX__SIZE							0x00000010
-#define  NV34TCL_TX5_MATRIX(x)								(0x00000800+((x)*4))
-#define  NV34TCL_TX5_MATRIX__SIZE							0x00000010
-#define  NV34TCL_TX6_MATRIX(x)								(0x00000840+((x)*4))
-#define  NV34TCL_TX6_MATRIX__SIZE							0x00000010
-#define  NV34TCL_TX7_MATRIX(x)								(0x00000880+((x)*4))
-#define  NV34TCL_TX7_MATRIX__SIZE							0x00000010
-#define  NV34TCL_SCISSOR_HORIZ								0x000008c0
-#define   NV34TCL_SCISSOR_HORIZ_X_SHIFT							0
-#define   NV34TCL_SCISSOR_HORIZ_X_MASK							0x0000ffff
-#define   NV34TCL_SCISSOR_HORIZ_W_SHIFT							16
-#define   NV34TCL_SCISSOR_HORIZ_W_MASK							0xffff0000
-#define  NV34TCL_SCISSOR_VERT								0x000008c4
-#define   NV34TCL_SCISSOR_VERT_Y_SHIFT							0
-#define   NV34TCL_SCISSOR_VERT_Y_MASK							0x0000ffff
-#define   NV34TCL_SCISSOR_VERT_H_SHIFT							16
-#define   NV34TCL_SCISSOR_VERT_H_MASK							0xffff0000
-#define  NV34TCL_FOG_COORD_DIST								0x000008c8
-#define   NV34TCL_FOG_COORD_DIST_COORD_FALSE						0x00000000
-#define   NV34TCL_FOG_COORD_DIST_COORD_FRAGMENT_DEPTH_DISTANCE_EYE_RADIAL_NV		0x00000001
-#define   NV34TCL_FOG_COORD_DIST_COORD_FRAGMENT_DEPTH_DISTANCE_EYE_PLANE_ABSOLUTE_NV	0x00000002
-#define   NV34TCL_FOG_COORD_DIST_COORD_FOG						0x00000003
-#define  NV34TCL_FOG_MODE								0x000008cc
-#define   NV34TCL_FOG_MODE_EXP								0x00000800
-#define   NV34TCL_FOG_MODE_EXP_2							0x00000802
-#define   NV34TCL_FOG_MODE_EXP2								0x00000803
-#define   NV34TCL_FOG_MODE_LINEAR							0x00000804
-#define   NV34TCL_FOG_MODE_LINEAR_2							0x00002601
-#define  NV34TCL_FOG_EQUATION_CONSTANT							0x000008d0
-#define  NV34TCL_FOG_EQUATION_LINEAR							0x000008d4
-#define  NV34TCL_FOG_EQUATION_QUADRATIC							0x000008d8
-#define  NV34TCL_FP_ACTIVE_PROGRAM							0x000008e4
-#define   NV34TCL_FP_ACTIVE_PROGRAM_DMA0						(1 <<  0)
-#define   NV34TCL_FP_ACTIVE_PROGRAM_DMA1						(1 <<  1)
-#define   NV34TCL_FP_ACTIVE_PROGRAM_OFFSET_SHIFT					2
-#define   NV34TCL_FP_ACTIVE_PROGRAM_OFFSET_MASK						0xfffffffc
-#define  NV34TCL_RC_COLOR0								0x000008ec
-#define   NV34TCL_RC_COLOR0_B_SHIFT							0
-#define   NV34TCL_RC_COLOR0_B_MASK							0x000000ff
-#define   NV34TCL_RC_COLOR0_G_SHIFT							8
-#define   NV34TCL_RC_COLOR0_G_MASK							0x0000ff00
-#define   NV34TCL_RC_COLOR0_R_SHIFT							16
-#define   NV34TCL_RC_COLOR0_R_MASK							0x00ff0000
-#define   NV34TCL_RC_COLOR0_A_SHIFT							24
-#define   NV34TCL_RC_COLOR0_A_MASK							0xff000000
-#define  NV34TCL_RC_COLOR1								0x000008f0
-#define   NV34TCL_RC_COLOR1_B_SHIFT							0
-#define   NV34TCL_RC_COLOR1_B_MASK							0x000000ff
-#define   NV34TCL_RC_COLOR1_G_SHIFT							8
-#define   NV34TCL_RC_COLOR1_G_MASK							0x0000ff00
-#define   NV34TCL_RC_COLOR1_R_SHIFT							16
-#define   NV34TCL_RC_COLOR1_R_MASK							0x00ff0000
-#define   NV34TCL_RC_COLOR1_A_SHIFT							24
-#define   NV34TCL_RC_COLOR1_A_MASK							0xff000000
-#define  NV34TCL_RC_FINAL0								0x000008f4
-#define   NV34TCL_RC_FINAL0_D_INPUT_SHIFT						0
-#define   NV34TCL_RC_FINAL0_D_INPUT_MASK						0x0000000f
-#define    NV34TCL_RC_FINAL0_D_INPUT_ZERO						0x00000000
-#define    NV34TCL_RC_FINAL0_D_INPUT_CONSTANT_COLOR0_NV					0x00000001
-#define    NV34TCL_RC_FINAL0_D_INPUT_CONSTANT_COLOR1_NV					0x00000002
-#define    NV34TCL_RC_FINAL0_D_INPUT_FOG						0x00000003
-#define    NV34TCL_RC_FINAL0_D_INPUT_PRIMARY_COLOR_NV					0x00000004
-#define    NV34TCL_RC_FINAL0_D_INPUT_SECONDARY_COLOR_NV					0x00000005
-#define    NV34TCL_RC_FINAL0_D_INPUT_TEXTURE0_ARB					0x00000008
-#define    NV34TCL_RC_FINAL0_D_INPUT_TEXTURE1_ARB					0x00000009
-#define    NV34TCL_RC_FINAL0_D_INPUT_SPARE0_NV						0x0000000c
-#define    NV34TCL_RC_FINAL0_D_INPUT_SPARE1_NV						0x0000000d
-#define    NV34TCL_RC_FINAL0_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x0000000e
-#define    NV34TCL_RC_FINAL0_D_INPUT_E_TIMES_F_NV					0x0000000f
-#define   NV34TCL_RC_FINAL0_D_COMPONENT_USAGE						(1 <<  4)
-#define    NV34TCL_RC_FINAL0_D_COMPONENT_USAGE_RGB					0x00000000
-#define    NV34TCL_RC_FINAL0_D_COMPONENT_USAGE_ALPHA					0x00000010
-#define   NV34TCL_RC_FINAL0_D_MAPPING_SHIFT						5
-#define   NV34TCL_RC_FINAL0_D_MAPPING_MASK						0x000000e0
-#define    NV34TCL_RC_FINAL0_D_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV34TCL_RC_FINAL0_D_MAPPING_UNSIGNED_INVERT_NV				0x00000020
-#define    NV34TCL_RC_FINAL0_D_MAPPING_EXPAND_NORMAL_NV					0x00000040
-#define    NV34TCL_RC_FINAL0_D_MAPPING_EXPAND_NEGATE_NV					0x00000060
-#define    NV34TCL_RC_FINAL0_D_MAPPING_HALF_BIAS_NORMAL_NV				0x00000080
-#define    NV34TCL_RC_FINAL0_D_MAPPING_HALF_BIAS_NEGATE_NV				0x000000a0
-#define    NV34TCL_RC_FINAL0_D_MAPPING_SIGNED_IDENTITY_NV				0x000000c0
-#define    NV34TCL_RC_FINAL0_D_MAPPING_SIGNED_NEGATE_NV					0x000000e0
-#define   NV34TCL_RC_FINAL0_C_INPUT_SHIFT						8
-#define   NV34TCL_RC_FINAL0_C_INPUT_MASK						0x00000f00
-#define    NV34TCL_RC_FINAL0_C_INPUT_ZERO						0x00000000
-#define    NV34TCL_RC_FINAL0_C_INPUT_CONSTANT_COLOR0_NV					0x00000100
-#define    NV34TCL_RC_FINAL0_C_INPUT_CONSTANT_COLOR1_NV					0x00000200
-#define    NV34TCL_RC_FINAL0_C_INPUT_FOG						0x00000300
-#define    NV34TCL_RC_FINAL0_C_INPUT_PRIMARY_COLOR_NV					0x00000400
-#define    NV34TCL_RC_FINAL0_C_INPUT_SECONDARY_COLOR_NV					0x00000500
-#define    NV34TCL_RC_FINAL0_C_INPUT_TEXTURE0_ARB					0x00000800
-#define    NV34TCL_RC_FINAL0_C_INPUT_TEXTURE1_ARB					0x00000900
-#define    NV34TCL_RC_FINAL0_C_INPUT_SPARE0_NV						0x00000c00
-#define    NV34TCL_RC_FINAL0_C_INPUT_SPARE1_NV						0x00000d00
-#define    NV34TCL_RC_FINAL0_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x00000e00
-#define    NV34TCL_RC_FINAL0_C_INPUT_E_TIMES_F_NV					0x00000f00
-#define   NV34TCL_RC_FINAL0_C_COMPONENT_USAGE						(1 << 12)
-#define    NV34TCL_RC_FINAL0_C_COMPONENT_USAGE_RGB					0x00000000
-#define    NV34TCL_RC_FINAL0_C_COMPONENT_USAGE_ALPHA					0x00001000
-#define   NV34TCL_RC_FINAL0_C_MAPPING_SHIFT						13
-#define   NV34TCL_RC_FINAL0_C_MAPPING_MASK						0x0000e000
-#define    NV34TCL_RC_FINAL0_C_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV34TCL_RC_FINAL0_C_MAPPING_UNSIGNED_INVERT_NV				0x00002000
-#define    NV34TCL_RC_FINAL0_C_MAPPING_EXPAND_NORMAL_NV					0x00004000
-#define    NV34TCL_RC_FINAL0_C_MAPPING_EXPAND_NEGATE_NV					0x00006000
-#define    NV34TCL_RC_FINAL0_C_MAPPING_HALF_BIAS_NORMAL_NV				0x00008000
-#define    NV34TCL_RC_FINAL0_C_MAPPING_HALF_BIAS_NEGATE_NV				0x0000a000
-#define    NV34TCL_RC_FINAL0_C_MAPPING_SIGNED_IDENTITY_NV				0x0000c000
-#define    NV34TCL_RC_FINAL0_C_MAPPING_SIGNED_NEGATE_NV					0x0000e000
-#define   NV34TCL_RC_FINAL0_B_INPUT_SHIFT						16
-#define   NV34TCL_RC_FINAL0_B_INPUT_MASK						0x000f0000
-#define    NV34TCL_RC_FINAL0_B_INPUT_ZERO						0x00000000
-#define    NV34TCL_RC_FINAL0_B_INPUT_CONSTANT_COLOR0_NV					0x00010000
-#define    NV34TCL_RC_FINAL0_B_INPUT_CONSTANT_COLOR1_NV					0x00020000
-#define    NV34TCL_RC_FINAL0_B_INPUT_FOG						0x00030000
-#define    NV34TCL_RC_FINAL0_B_INPUT_PRIMARY_COLOR_NV					0x00040000
-#define    NV34TCL_RC_FINAL0_B_INPUT_SECONDARY_COLOR_NV					0x00050000
-#define    NV34TCL_RC_FINAL0_B_INPUT_TEXTURE0_ARB					0x00080000
-#define    NV34TCL_RC_FINAL0_B_INPUT_TEXTURE1_ARB					0x00090000
-#define    NV34TCL_RC_FINAL0_B_INPUT_SPARE0_NV						0x000c0000
-#define    NV34TCL_RC_FINAL0_B_INPUT_SPARE1_NV						0x000d0000
-#define    NV34TCL_RC_FINAL0_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x000e0000
-#define    NV34TCL_RC_FINAL0_B_INPUT_E_TIMES_F_NV					0x000f0000
-#define   NV34TCL_RC_FINAL0_B_COMPONENT_USAGE						(1 << 20)
-#define    NV34TCL_RC_FINAL0_B_COMPONENT_USAGE_RGB					0x00000000
-#define    NV34TCL_RC_FINAL0_B_COMPONENT_USAGE_ALPHA					0x00100000
-#define   NV34TCL_RC_FINAL0_B_MAPPING_SHIFT						21
-#define   NV34TCL_RC_FINAL0_B_MAPPING_MASK						0x00e00000
-#define    NV34TCL_RC_FINAL0_B_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV34TCL_RC_FINAL0_B_MAPPING_UNSIGNED_INVERT_NV				0x00200000
-#define    NV34TCL_RC_FINAL0_B_MAPPING_EXPAND_NORMAL_NV					0x00400000
-#define    NV34TCL_RC_FINAL0_B_MAPPING_EXPAND_NEGATE_NV					0x00600000
-#define    NV34TCL_RC_FINAL0_B_MAPPING_HALF_BIAS_NORMAL_NV				0x00800000
-#define    NV34TCL_RC_FINAL0_B_MAPPING_HALF_BIAS_NEGATE_NV				0x00a00000
-#define    NV34TCL_RC_FINAL0_B_MAPPING_SIGNED_IDENTITY_NV				0x00c00000
-#define    NV34TCL_RC_FINAL0_B_MAPPING_SIGNED_NEGATE_NV					0x00e00000
-#define   NV34TCL_RC_FINAL0_A_INPUT_SHIFT						24
-#define   NV34TCL_RC_FINAL0_A_INPUT_MASK						0x0f000000
-#define    NV34TCL_RC_FINAL0_A_INPUT_ZERO						0x00000000
-#define    NV34TCL_RC_FINAL0_A_INPUT_CONSTANT_COLOR0_NV					0x01000000
-#define    NV34TCL_RC_FINAL0_A_INPUT_CONSTANT_COLOR1_NV					0x02000000
-#define    NV34TCL_RC_FINAL0_A_INPUT_FOG						0x03000000
-#define    NV34TCL_RC_FINAL0_A_INPUT_PRIMARY_COLOR_NV					0x04000000
-#define    NV34TCL_RC_FINAL0_A_INPUT_SECONDARY_COLOR_NV					0x05000000
-#define    NV34TCL_RC_FINAL0_A_INPUT_TEXTURE0_ARB					0x08000000
-#define    NV34TCL_RC_FINAL0_A_INPUT_TEXTURE1_ARB					0x09000000
-#define    NV34TCL_RC_FINAL0_A_INPUT_SPARE0_NV						0x0c000000
-#define    NV34TCL_RC_FINAL0_A_INPUT_SPARE1_NV						0x0d000000
-#define    NV34TCL_RC_FINAL0_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x0e000000
-#define    NV34TCL_RC_FINAL0_A_INPUT_E_TIMES_F_NV					0x0f000000
-#define   NV34TCL_RC_FINAL0_A_COMPONENT_USAGE						(1 << 28)
-#define    NV34TCL_RC_FINAL0_A_COMPONENT_USAGE_RGB					0x00000000
-#define    NV34TCL_RC_FINAL0_A_COMPONENT_USAGE_ALPHA					0x10000000
-#define   NV34TCL_RC_FINAL0_A_MAPPING_SHIFT						29
-#define   NV34TCL_RC_FINAL0_A_MAPPING_MASK						0xe0000000
-#define    NV34TCL_RC_FINAL0_A_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV34TCL_RC_FINAL0_A_MAPPING_UNSIGNED_INVERT_NV				0x20000000
-#define    NV34TCL_RC_FINAL0_A_MAPPING_EXPAND_NORMAL_NV					0x40000000
-#define    NV34TCL_RC_FINAL0_A_MAPPING_EXPAND_NEGATE_NV					0x60000000
-#define    NV34TCL_RC_FINAL0_A_MAPPING_HALF_BIAS_NORMAL_NV				0x80000000
-#define    NV34TCL_RC_FINAL0_A_MAPPING_HALF_BIAS_NEGATE_NV				0xa0000000
-#define    NV34TCL_RC_FINAL0_A_MAPPING_SIGNED_IDENTITY_NV				0xc0000000
-#define    NV34TCL_RC_FINAL0_A_MAPPING_SIGNED_NEGATE_NV					0xe0000000
-#define  NV34TCL_RC_FINAL1								0x000008f8
-#define   NV34TCL_RC_FINAL1_COLOR_SUM_CLAMP						(1 <<  7)
-#define   NV34TCL_RC_FINAL1_G_INPUT_SHIFT						8
-#define   NV34TCL_RC_FINAL1_G_INPUT_MASK						0x00000f00
-#define    NV34TCL_RC_FINAL1_G_INPUT_ZERO						0x00000000
-#define    NV34TCL_RC_FINAL1_G_INPUT_CONSTANT_COLOR0_NV					0x00000100
-#define    NV34TCL_RC_FINAL1_G_INPUT_CONSTANT_COLOR1_NV					0x00000200
-#define    NV34TCL_RC_FINAL1_G_INPUT_FOG						0x00000300
-#define    NV34TCL_RC_FINAL1_G_INPUT_PRIMARY_COLOR_NV					0x00000400
-#define    NV34TCL_RC_FINAL1_G_INPUT_SECONDARY_COLOR_NV					0x00000500
-#define    NV34TCL_RC_FINAL1_G_INPUT_TEXTURE0_ARB					0x00000800
-#define    NV34TCL_RC_FINAL1_G_INPUT_TEXTURE1_ARB					0x00000900
-#define    NV34TCL_RC_FINAL1_G_INPUT_SPARE0_NV						0x00000c00
-#define    NV34TCL_RC_FINAL1_G_INPUT_SPARE1_NV						0x00000d00
-#define    NV34TCL_RC_FINAL1_G_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x00000e00
-#define    NV34TCL_RC_FINAL1_G_INPUT_E_TIMES_F_NV					0x00000f00
-#define   NV34TCL_RC_FINAL1_G_COMPONENT_USAGE						(1 << 12)
-#define    NV34TCL_RC_FINAL1_G_COMPONENT_USAGE_RGB					0x00000000
-#define    NV34TCL_RC_FINAL1_G_COMPONENT_USAGE_ALPHA					0x00001000
-#define   NV34TCL_RC_FINAL1_G_MAPPING_SHIFT						13
-#define   NV34TCL_RC_FINAL1_G_MAPPING_MASK						0x0000e000
-#define    NV34TCL_RC_FINAL1_G_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV34TCL_RC_FINAL1_G_MAPPING_UNSIGNED_INVERT_NV				0x00002000
-#define    NV34TCL_RC_FINAL1_G_MAPPING_EXPAND_NORMAL_NV					0x00004000
-#define    NV34TCL_RC_FINAL1_G_MAPPING_EXPAND_NEGATE_NV					0x00006000
-#define    NV34TCL_RC_FINAL1_G_MAPPING_HALF_BIAS_NORMAL_NV				0x00008000
-#define    NV34TCL_RC_FINAL1_G_MAPPING_HALF_BIAS_NEGATE_NV				0x0000a000
-#define    NV34TCL_RC_FINAL1_G_MAPPING_SIGNED_IDENTITY_NV				0x0000c000
-#define    NV34TCL_RC_FINAL1_G_MAPPING_SIGNED_NEGATE_NV					0x0000e000
-#define   NV34TCL_RC_FINAL1_F_INPUT_SHIFT						16
-#define   NV34TCL_RC_FINAL1_F_INPUT_MASK						0x000f0000
-#define    NV34TCL_RC_FINAL1_F_INPUT_ZERO						0x00000000
-#define    NV34TCL_RC_FINAL1_F_INPUT_CONSTANT_COLOR0_NV					0x00010000
-#define    NV34TCL_RC_FINAL1_F_INPUT_CONSTANT_COLOR1_NV					0x00020000
-#define    NV34TCL_RC_FINAL1_F_INPUT_FOG						0x00030000
-#define    NV34TCL_RC_FINAL1_F_INPUT_PRIMARY_COLOR_NV					0x00040000
-#define    NV34TCL_RC_FINAL1_F_INPUT_SECONDARY_COLOR_NV					0x00050000
-#define    NV34TCL_RC_FINAL1_F_INPUT_TEXTURE0_ARB					0x00080000
-#define    NV34TCL_RC_FINAL1_F_INPUT_TEXTURE1_ARB					0x00090000
-#define    NV34TCL_RC_FINAL1_F_INPUT_SPARE0_NV						0x000c0000
-#define    NV34TCL_RC_FINAL1_F_INPUT_SPARE1_NV						0x000d0000
-#define    NV34TCL_RC_FINAL1_F_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x000e0000
-#define    NV34TCL_RC_FINAL1_F_INPUT_E_TIMES_F_NV					0x000f0000
-#define   NV34TCL_RC_FINAL1_F_COMPONENT_USAGE						(1 << 20)
-#define    NV34TCL_RC_FINAL1_F_COMPONENT_USAGE_RGB					0x00000000
-#define    NV34TCL_RC_FINAL1_F_COMPONENT_USAGE_ALPHA					0x00100000
-#define   NV34TCL_RC_FINAL1_F_MAPPING_SHIFT						21
-#define   NV34TCL_RC_FINAL1_F_MAPPING_MASK						0x00e00000
-#define    NV34TCL_RC_FINAL1_F_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV34TCL_RC_FINAL1_F_MAPPING_UNSIGNED_INVERT_NV				0x00200000
-#define    NV34TCL_RC_FINAL1_F_MAPPING_EXPAND_NORMAL_NV					0x00400000
-#define    NV34TCL_RC_FINAL1_F_MAPPING_EXPAND_NEGATE_NV					0x00600000
-#define    NV34TCL_RC_FINAL1_F_MAPPING_HALF_BIAS_NORMAL_NV				0x00800000
-#define    NV34TCL_RC_FINAL1_F_MAPPING_HALF_BIAS_NEGATE_NV				0x00a00000
-#define    NV34TCL_RC_FINAL1_F_MAPPING_SIGNED_IDENTITY_NV				0x00c00000
-#define    NV34TCL_RC_FINAL1_F_MAPPING_SIGNED_NEGATE_NV					0x00e00000
-#define   NV34TCL_RC_FINAL1_E_INPUT_SHIFT						24
-#define   NV34TCL_RC_FINAL1_E_INPUT_MASK						0x0f000000
-#define    NV34TCL_RC_FINAL1_E_INPUT_ZERO						0x00000000
-#define    NV34TCL_RC_FINAL1_E_INPUT_CONSTANT_COLOR0_NV					0x01000000
-#define    NV34TCL_RC_FINAL1_E_INPUT_CONSTANT_COLOR1_NV					0x02000000
-#define    NV34TCL_RC_FINAL1_E_INPUT_FOG						0x03000000
-#define    NV34TCL_RC_FINAL1_E_INPUT_PRIMARY_COLOR_NV					0x04000000
-#define    NV34TCL_RC_FINAL1_E_INPUT_SECONDARY_COLOR_NV					0x05000000
-#define    NV34TCL_RC_FINAL1_E_INPUT_TEXTURE0_ARB					0x08000000
-#define    NV34TCL_RC_FINAL1_E_INPUT_TEXTURE1_ARB					0x09000000
-#define    NV34TCL_RC_FINAL1_E_INPUT_SPARE0_NV						0x0c000000
-#define    NV34TCL_RC_FINAL1_E_INPUT_SPARE1_NV						0x0d000000
-#define    NV34TCL_RC_FINAL1_E_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x0e000000
-#define    NV34TCL_RC_FINAL1_E_INPUT_E_TIMES_F_NV					0x0f000000
-#define   NV34TCL_RC_FINAL1_E_COMPONENT_USAGE						(1 << 28)
-#define    NV34TCL_RC_FINAL1_E_COMPONENT_USAGE_RGB					0x00000000
-#define    NV34TCL_RC_FINAL1_E_COMPONENT_USAGE_ALPHA					0x10000000
-#define   NV34TCL_RC_FINAL1_E_MAPPING_SHIFT						29
-#define   NV34TCL_RC_FINAL1_E_MAPPING_MASK						0xe0000000
-#define    NV34TCL_RC_FINAL1_E_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV34TCL_RC_FINAL1_E_MAPPING_UNSIGNED_INVERT_NV				0x20000000
-#define    NV34TCL_RC_FINAL1_E_MAPPING_EXPAND_NORMAL_NV					0x40000000
-#define    NV34TCL_RC_FINAL1_E_MAPPING_EXPAND_NEGATE_NV					0x60000000
-#define    NV34TCL_RC_FINAL1_E_MAPPING_HALF_BIAS_NORMAL_NV				0x80000000
-#define    NV34TCL_RC_FINAL1_E_MAPPING_HALF_BIAS_NEGATE_NV				0xa0000000
-#define    NV34TCL_RC_FINAL1_E_MAPPING_SIGNED_IDENTITY_NV				0xc0000000
-#define    NV34TCL_RC_FINAL1_E_MAPPING_SIGNED_NEGATE_NV					0xe0000000
-#define  NV34TCL_RC_ENABLE								0x000008fc
-#define   NV34TCL_RC_ENABLE_NUM_COMBINERS_SHIFT						0
-#define   NV34TCL_RC_ENABLE_NUM_COMBINERS_MASK						0x0000000f
-#define   NV34TCL_RC_ENABLE_STAGE_CONSTANT_COLOR0_SHIFT					12
-#define   NV34TCL_RC_ENABLE_STAGE_CONSTANT_COLOR0_MASK					0x0000f000
-#define   NV34TCL_RC_ENABLE_STAGE_CONSTANT_COLOR1_SHIFT					16
-#define   NV34TCL_RC_ENABLE_STAGE_CONSTANT_COLOR1_MASK					0x000f0000
-#define  NV34TCL_RC_IN_ALPHA(x)								(0x00000900+((x)*32))
-#define  NV34TCL_RC_IN_ALPHA__SIZE							0x00000008
-#define   NV34TCL_RC_IN_ALPHA_D_INPUT_SHIFT						0
-#define   NV34TCL_RC_IN_ALPHA_D_INPUT_MASK						0x0000000f
-#define    NV34TCL_RC_IN_ALPHA_D_INPUT_ZERO						0x00000000
-#define    NV34TCL_RC_IN_ALPHA_D_INPUT_CONSTANT_COLOR0_NV				0x00000001
-#define    NV34TCL_RC_IN_ALPHA_D_INPUT_CONSTANT_COLOR1_NV				0x00000002
-#define    NV34TCL_RC_IN_ALPHA_D_INPUT_FOG						0x00000003
-#define    NV34TCL_RC_IN_ALPHA_D_INPUT_PRIMARY_COLOR_NV					0x00000004
-#define    NV34TCL_RC_IN_ALPHA_D_INPUT_SECONDARY_COLOR_NV				0x00000005
-#define    NV34TCL_RC_IN_ALPHA_D_INPUT_TEXTURE0_ARB					0x00000008
-#define    NV34TCL_RC_IN_ALPHA_D_INPUT_TEXTURE1_ARB					0x00000009
-#define    NV34TCL_RC_IN_ALPHA_D_INPUT_SPARE0_NV					0x0000000c
-#define    NV34TCL_RC_IN_ALPHA_D_INPUT_SPARE1_NV					0x0000000d
-#define    NV34TCL_RC_IN_ALPHA_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x0000000e
-#define    NV34TCL_RC_IN_ALPHA_D_INPUT_E_TIMES_F_NV					0x0000000f
-#define   NV34TCL_RC_IN_ALPHA_D_COMPONENT_USAGE						(1 <<  4)
-#define    NV34TCL_RC_IN_ALPHA_D_COMPONENT_USAGE_BLUE					0x00000000
-#define    NV34TCL_RC_IN_ALPHA_D_COMPONENT_USAGE_ALPHA					0x00000010
-#define   NV34TCL_RC_IN_ALPHA_D_MAPPING_SHIFT						5
-#define   NV34TCL_RC_IN_ALPHA_D_MAPPING_MASK						0x000000e0
-#define    NV34TCL_RC_IN_ALPHA_D_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV34TCL_RC_IN_ALPHA_D_MAPPING_UNSIGNED_INVERT_NV				0x00000020
-#define    NV34TCL_RC_IN_ALPHA_D_MAPPING_EXPAND_NORMAL_NV				0x00000040
-#define    NV34TCL_RC_IN_ALPHA_D_MAPPING_EXPAND_NEGATE_NV				0x00000060
-#define    NV34TCL_RC_IN_ALPHA_D_MAPPING_HALF_BIAS_NORMAL_NV				0x00000080
-#define    NV34TCL_RC_IN_ALPHA_D_MAPPING_HALF_BIAS_NEGATE_NV				0x000000a0
-#define    NV34TCL_RC_IN_ALPHA_D_MAPPING_SIGNED_IDENTITY_NV				0x000000c0
-#define    NV34TCL_RC_IN_ALPHA_D_MAPPING_SIGNED_NEGATE_NV				0x000000e0
-#define   NV34TCL_RC_IN_ALPHA_C_INPUT_SHIFT						8
-#define   NV34TCL_RC_IN_ALPHA_C_INPUT_MASK						0x00000f00
-#define    NV34TCL_RC_IN_ALPHA_C_INPUT_ZERO						0x00000000
-#define    NV34TCL_RC_IN_ALPHA_C_INPUT_CONSTANT_COLOR0_NV				0x00000100
-#define    NV34TCL_RC_IN_ALPHA_C_INPUT_CONSTANT_COLOR1_NV				0x00000200
-#define    NV34TCL_RC_IN_ALPHA_C_INPUT_FOG						0x00000300
-#define    NV34TCL_RC_IN_ALPHA_C_INPUT_PRIMARY_COLOR_NV					0x00000400
-#define    NV34TCL_RC_IN_ALPHA_C_INPUT_SECONDARY_COLOR_NV				0x00000500
-#define    NV34TCL_RC_IN_ALPHA_C_INPUT_TEXTURE0_ARB					0x00000800
-#define    NV34TCL_RC_IN_ALPHA_C_INPUT_TEXTURE1_ARB					0x00000900
-#define    NV34TCL_RC_IN_ALPHA_C_INPUT_SPARE0_NV					0x00000c00
-#define    NV34TCL_RC_IN_ALPHA_C_INPUT_SPARE1_NV					0x00000d00
-#define    NV34TCL_RC_IN_ALPHA_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x00000e00
-#define    NV34TCL_RC_IN_ALPHA_C_INPUT_E_TIMES_F_NV					0x00000f00
-#define   NV34TCL_RC_IN_ALPHA_C_COMPONENT_USAGE						(1 << 12)
-#define    NV34TCL_RC_IN_ALPHA_C_COMPONENT_USAGE_BLUE					0x00000000
-#define    NV34TCL_RC_IN_ALPHA_C_COMPONENT_USAGE_ALPHA					0x00001000
-#define   NV34TCL_RC_IN_ALPHA_C_MAPPING_SHIFT						13
-#define   NV34TCL_RC_IN_ALPHA_C_MAPPING_MASK						0x0000e000
-#define    NV34TCL_RC_IN_ALPHA_C_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV34TCL_RC_IN_ALPHA_C_MAPPING_UNSIGNED_INVERT_NV				0x00002000
-#define    NV34TCL_RC_IN_ALPHA_C_MAPPING_EXPAND_NORMAL_NV				0x00004000
-#define    NV34TCL_RC_IN_ALPHA_C_MAPPING_EXPAND_NEGATE_NV				0x00006000
-#define    NV34TCL_RC_IN_ALPHA_C_MAPPING_HALF_BIAS_NORMAL_NV				0x00008000
-#define    NV34TCL_RC_IN_ALPHA_C_MAPPING_HALF_BIAS_NEGATE_NV				0x0000a000
-#define    NV34TCL_RC_IN_ALPHA_C_MAPPING_SIGNED_IDENTITY_NV				0x0000c000
-#define    NV34TCL_RC_IN_ALPHA_C_MAPPING_SIGNED_NEGATE_NV				0x0000e000
-#define   NV34TCL_RC_IN_ALPHA_B_INPUT_SHIFT						16
-#define   NV34TCL_RC_IN_ALPHA_B_INPUT_MASK						0x000f0000
-#define    NV34TCL_RC_IN_ALPHA_B_INPUT_ZERO						0x00000000
-#define    NV34TCL_RC_IN_ALPHA_B_INPUT_CONSTANT_COLOR0_NV				0x00010000
-#define    NV34TCL_RC_IN_ALPHA_B_INPUT_CONSTANT_COLOR1_NV				0x00020000
-#define    NV34TCL_RC_IN_ALPHA_B_INPUT_FOG						0x00030000
-#define    NV34TCL_RC_IN_ALPHA_B_INPUT_PRIMARY_COLOR_NV					0x00040000
-#define    NV34TCL_RC_IN_ALPHA_B_INPUT_SECONDARY_COLOR_NV				0x00050000
-#define    NV34TCL_RC_IN_ALPHA_B_INPUT_TEXTURE0_ARB					0x00080000
-#define    NV34TCL_RC_IN_ALPHA_B_INPUT_TEXTURE1_ARB					0x00090000
-#define    NV34TCL_RC_IN_ALPHA_B_INPUT_SPARE0_NV					0x000c0000
-#define    NV34TCL_RC_IN_ALPHA_B_INPUT_SPARE1_NV					0x000d0000
-#define    NV34TCL_RC_IN_ALPHA_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x000e0000
-#define    NV34TCL_RC_IN_ALPHA_B_INPUT_E_TIMES_F_NV					0x000f0000
-#define   NV34TCL_RC_IN_ALPHA_B_COMPONENT_USAGE						(1 << 20)
-#define    NV34TCL_RC_IN_ALPHA_B_COMPONENT_USAGE_BLUE					0x00000000
-#define    NV34TCL_RC_IN_ALPHA_B_COMPONENT_USAGE_ALPHA					0x00100000
-#define   NV34TCL_RC_IN_ALPHA_B_MAPPING_SHIFT						21
-#define   NV34TCL_RC_IN_ALPHA_B_MAPPING_MASK						0x00e00000
-#define    NV34TCL_RC_IN_ALPHA_B_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV34TCL_RC_IN_ALPHA_B_MAPPING_UNSIGNED_INVERT_NV				0x00200000
-#define    NV34TCL_RC_IN_ALPHA_B_MAPPING_EXPAND_NORMAL_NV				0x00400000
-#define    NV34TCL_RC_IN_ALPHA_B_MAPPING_EXPAND_NEGATE_NV				0x00600000
-#define    NV34TCL_RC_IN_ALPHA_B_MAPPING_HALF_BIAS_NORMAL_NV				0x00800000
-#define    NV34TCL_RC_IN_ALPHA_B_MAPPING_HALF_BIAS_NEGATE_NV				0x00a00000
-#define    NV34TCL_RC_IN_ALPHA_B_MAPPING_SIGNED_IDENTITY_NV				0x00c00000
-#define    NV34TCL_RC_IN_ALPHA_B_MAPPING_SIGNED_NEGATE_NV				0x00e00000
-#define   NV34TCL_RC_IN_ALPHA_A_INPUT_SHIFT						24
-#define   NV34TCL_RC_IN_ALPHA_A_INPUT_MASK						0x0f000000
-#define    NV34TCL_RC_IN_ALPHA_A_INPUT_ZERO						0x00000000
-#define    NV34TCL_RC_IN_ALPHA_A_INPUT_CONSTANT_COLOR0_NV				0x01000000
-#define    NV34TCL_RC_IN_ALPHA_A_INPUT_CONSTANT_COLOR1_NV				0x02000000
-#define    NV34TCL_RC_IN_ALPHA_A_INPUT_FOG						0x03000000
-#define    NV34TCL_RC_IN_ALPHA_A_INPUT_PRIMARY_COLOR_NV					0x04000000
-#define    NV34TCL_RC_IN_ALPHA_A_INPUT_SECONDARY_COLOR_NV				0x05000000
-#define    NV34TCL_RC_IN_ALPHA_A_INPUT_TEXTURE0_ARB					0x08000000
-#define    NV34TCL_RC_IN_ALPHA_A_INPUT_TEXTURE1_ARB					0x09000000
-#define    NV34TCL_RC_IN_ALPHA_A_INPUT_SPARE0_NV					0x0c000000
-#define    NV34TCL_RC_IN_ALPHA_A_INPUT_SPARE1_NV					0x0d000000
-#define    NV34TCL_RC_IN_ALPHA_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x0e000000
-#define    NV34TCL_RC_IN_ALPHA_A_INPUT_E_TIMES_F_NV					0x0f000000
-#define   NV34TCL_RC_IN_ALPHA_A_COMPONENT_USAGE						(1 << 28)
-#define    NV34TCL_RC_IN_ALPHA_A_COMPONENT_USAGE_BLUE					0x00000000
-#define    NV34TCL_RC_IN_ALPHA_A_COMPONENT_USAGE_ALPHA					0x10000000
-#define   NV34TCL_RC_IN_ALPHA_A_MAPPING_SHIFT						29
-#define   NV34TCL_RC_IN_ALPHA_A_MAPPING_MASK						0xe0000000
-#define    NV34TCL_RC_IN_ALPHA_A_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV34TCL_RC_IN_ALPHA_A_MAPPING_UNSIGNED_INVERT_NV				0x20000000
-#define    NV34TCL_RC_IN_ALPHA_A_MAPPING_EXPAND_NORMAL_NV				0x40000000
-#define    NV34TCL_RC_IN_ALPHA_A_MAPPING_EXPAND_NEGATE_NV				0x60000000
-#define    NV34TCL_RC_IN_ALPHA_A_MAPPING_HALF_BIAS_NORMAL_NV				0x80000000
-#define    NV34TCL_RC_IN_ALPHA_A_MAPPING_HALF_BIAS_NEGATE_NV				0xa0000000
-#define    NV34TCL_RC_IN_ALPHA_A_MAPPING_SIGNED_IDENTITY_NV				0xc0000000
-#define    NV34TCL_RC_IN_ALPHA_A_MAPPING_SIGNED_NEGATE_NV				0xe0000000
-#define  NV34TCL_RC_IN_RGB(x)								(0x00000904+((x)*32))
-#define  NV34TCL_RC_IN_RGB__SIZE							0x00000008
-#define   NV34TCL_RC_IN_RGB_D_INPUT_SHIFT						0
-#define   NV34TCL_RC_IN_RGB_D_INPUT_MASK						0x0000000f
-#define    NV34TCL_RC_IN_RGB_D_INPUT_ZERO						0x00000000
-#define    NV34TCL_RC_IN_RGB_D_INPUT_CONSTANT_COLOR0_NV					0x00000001
-#define    NV34TCL_RC_IN_RGB_D_INPUT_CONSTANT_COLOR1_NV					0x00000002
-#define    NV34TCL_RC_IN_RGB_D_INPUT_FOG						0x00000003
-#define    NV34TCL_RC_IN_RGB_D_INPUT_PRIMARY_COLOR_NV					0x00000004
-#define    NV34TCL_RC_IN_RGB_D_INPUT_SECONDARY_COLOR_NV					0x00000005
-#define    NV34TCL_RC_IN_RGB_D_INPUT_TEXTURE0_ARB					0x00000008
-#define    NV34TCL_RC_IN_RGB_D_INPUT_TEXTURE1_ARB					0x00000009
-#define    NV34TCL_RC_IN_RGB_D_INPUT_SPARE0_NV						0x0000000c
-#define    NV34TCL_RC_IN_RGB_D_INPUT_SPARE1_NV						0x0000000d
-#define    NV34TCL_RC_IN_RGB_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x0000000e
-#define    NV34TCL_RC_IN_RGB_D_INPUT_E_TIMES_F_NV					0x0000000f
-#define   NV34TCL_RC_IN_RGB_D_COMPONENT_USAGE						(1 <<  4)
-#define    NV34TCL_RC_IN_RGB_D_COMPONENT_USAGE_RGB					0x00000000
-#define    NV34TCL_RC_IN_RGB_D_COMPONENT_USAGE_ALPHA					0x00000010
-#define   NV34TCL_RC_IN_RGB_D_MAPPING_SHIFT						5
-#define   NV34TCL_RC_IN_RGB_D_MAPPING_MASK						0x000000e0
-#define    NV34TCL_RC_IN_RGB_D_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV34TCL_RC_IN_RGB_D_MAPPING_UNSIGNED_INVERT_NV				0x00000020
-#define    NV34TCL_RC_IN_RGB_D_MAPPING_EXPAND_NORMAL_NV					0x00000040
-#define    NV34TCL_RC_IN_RGB_D_MAPPING_EXPAND_NEGATE_NV					0x00000060
-#define    NV34TCL_RC_IN_RGB_D_MAPPING_HALF_BIAS_NORMAL_NV				0x00000080
-#define    NV34TCL_RC_IN_RGB_D_MAPPING_HALF_BIAS_NEGATE_NV				0x000000a0
-#define    NV34TCL_RC_IN_RGB_D_MAPPING_SIGNED_IDENTITY_NV				0x000000c0
-#define    NV34TCL_RC_IN_RGB_D_MAPPING_SIGNED_NEGATE_NV					0x000000e0
-#define   NV34TCL_RC_IN_RGB_C_INPUT_SHIFT						8
-#define   NV34TCL_RC_IN_RGB_C_INPUT_MASK						0x00000f00
-#define    NV34TCL_RC_IN_RGB_C_INPUT_ZERO						0x00000000
-#define    NV34TCL_RC_IN_RGB_C_INPUT_CONSTANT_COLOR0_NV					0x00000100
-#define    NV34TCL_RC_IN_RGB_C_INPUT_CONSTANT_COLOR1_NV					0x00000200
-#define    NV34TCL_RC_IN_RGB_C_INPUT_FOG						0x00000300
-#define    NV34TCL_RC_IN_RGB_C_INPUT_PRIMARY_COLOR_NV					0x00000400
-#define    NV34TCL_RC_IN_RGB_C_INPUT_SECONDARY_COLOR_NV					0x00000500
-#define    NV34TCL_RC_IN_RGB_C_INPUT_TEXTURE0_ARB					0x00000800
-#define    NV34TCL_RC_IN_RGB_C_INPUT_TEXTURE1_ARB					0x00000900
-#define    NV34TCL_RC_IN_RGB_C_INPUT_SPARE0_NV						0x00000c00
-#define    NV34TCL_RC_IN_RGB_C_INPUT_SPARE1_NV						0x00000d00
-#define    NV34TCL_RC_IN_RGB_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x00000e00
-#define    NV34TCL_RC_IN_RGB_C_INPUT_E_TIMES_F_NV					0x00000f00
-#define   NV34TCL_RC_IN_RGB_C_COMPONENT_USAGE						(1 << 12)
-#define    NV34TCL_RC_IN_RGB_C_COMPONENT_USAGE_RGB					0x00000000
-#define    NV34TCL_RC_IN_RGB_C_COMPONENT_USAGE_ALPHA					0x00001000
-#define   NV34TCL_RC_IN_RGB_C_MAPPING_SHIFT						13
-#define   NV34TCL_RC_IN_RGB_C_MAPPING_MASK						0x0000e000
-#define    NV34TCL_RC_IN_RGB_C_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV34TCL_RC_IN_RGB_C_MAPPING_UNSIGNED_INVERT_NV				0x00002000
-#define    NV34TCL_RC_IN_RGB_C_MAPPING_EXPAND_NORMAL_NV					0x00004000
-#define    NV34TCL_RC_IN_RGB_C_MAPPING_EXPAND_NEGATE_NV					0x00006000
-#define    NV34TCL_RC_IN_RGB_C_MAPPING_HALF_BIAS_NORMAL_NV				0x00008000
-#define    NV34TCL_RC_IN_RGB_C_MAPPING_HALF_BIAS_NEGATE_NV				0x0000a000
-#define    NV34TCL_RC_IN_RGB_C_MAPPING_SIGNED_IDENTITY_NV				0x0000c000
-#define    NV34TCL_RC_IN_RGB_C_MAPPING_SIGNED_NEGATE_NV					0x0000e000
-#define   NV34TCL_RC_IN_RGB_B_INPUT_SHIFT						16
-#define   NV34TCL_RC_IN_RGB_B_INPUT_MASK						0x000f0000
-#define    NV34TCL_RC_IN_RGB_B_INPUT_ZERO						0x00000000
-#define    NV34TCL_RC_IN_RGB_B_INPUT_CONSTANT_COLOR0_NV					0x00010000
-#define    NV34TCL_RC_IN_RGB_B_INPUT_CONSTANT_COLOR1_NV					0x00020000
-#define    NV34TCL_RC_IN_RGB_B_INPUT_FOG						0x00030000
-#define    NV34TCL_RC_IN_RGB_B_INPUT_PRIMARY_COLOR_NV					0x00040000
-#define    NV34TCL_RC_IN_RGB_B_INPUT_SECONDARY_COLOR_NV					0x00050000
-#define    NV34TCL_RC_IN_RGB_B_INPUT_TEXTURE0_ARB					0x00080000
-#define    NV34TCL_RC_IN_RGB_B_INPUT_TEXTURE1_ARB					0x00090000
-#define    NV34TCL_RC_IN_RGB_B_INPUT_SPARE0_NV						0x000c0000
-#define    NV34TCL_RC_IN_RGB_B_INPUT_SPARE1_NV						0x000d0000
-#define    NV34TCL_RC_IN_RGB_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x000e0000
-#define    NV34TCL_RC_IN_RGB_B_INPUT_E_TIMES_F_NV					0x000f0000
-#define   NV34TCL_RC_IN_RGB_B_COMPONENT_USAGE						(1 << 20)
-#define    NV34TCL_RC_IN_RGB_B_COMPONENT_USAGE_RGB					0x00000000
-#define    NV34TCL_RC_IN_RGB_B_COMPONENT_USAGE_ALPHA					0x00100000
-#define   NV34TCL_RC_IN_RGB_B_MAPPING_SHIFT						21
-#define   NV34TCL_RC_IN_RGB_B_MAPPING_MASK						0x00e00000
-#define    NV34TCL_RC_IN_RGB_B_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV34TCL_RC_IN_RGB_B_MAPPING_UNSIGNED_INVERT_NV				0x00200000
-#define    NV34TCL_RC_IN_RGB_B_MAPPING_EXPAND_NORMAL_NV					0x00400000
-#define    NV34TCL_RC_IN_RGB_B_MAPPING_EXPAND_NEGATE_NV					0x00600000
-#define    NV34TCL_RC_IN_RGB_B_MAPPING_HALF_BIAS_NORMAL_NV				0x00800000
-#define    NV34TCL_RC_IN_RGB_B_MAPPING_HALF_BIAS_NEGATE_NV				0x00a00000
-#define    NV34TCL_RC_IN_RGB_B_MAPPING_SIGNED_IDENTITY_NV				0x00c00000
-#define    NV34TCL_RC_IN_RGB_B_MAPPING_SIGNED_NEGATE_NV					0x00e00000
-#define   NV34TCL_RC_IN_RGB_A_INPUT_SHIFT						24
-#define   NV34TCL_RC_IN_RGB_A_INPUT_MASK						0x0f000000
-#define    NV34TCL_RC_IN_RGB_A_INPUT_ZERO						0x00000000
-#define    NV34TCL_RC_IN_RGB_A_INPUT_CONSTANT_COLOR0_NV					0x01000000
-#define    NV34TCL_RC_IN_RGB_A_INPUT_CONSTANT_COLOR1_NV					0x02000000
-#define    NV34TCL_RC_IN_RGB_A_INPUT_FOG						0x03000000
-#define    NV34TCL_RC_IN_RGB_A_INPUT_PRIMARY_COLOR_NV					0x04000000
-#define    NV34TCL_RC_IN_RGB_A_INPUT_SECONDARY_COLOR_NV					0x05000000
-#define    NV34TCL_RC_IN_RGB_A_INPUT_TEXTURE0_ARB					0x08000000
-#define    NV34TCL_RC_IN_RGB_A_INPUT_TEXTURE1_ARB					0x09000000
-#define    NV34TCL_RC_IN_RGB_A_INPUT_SPARE0_NV						0x0c000000
-#define    NV34TCL_RC_IN_RGB_A_INPUT_SPARE1_NV						0x0d000000
-#define    NV34TCL_RC_IN_RGB_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x0e000000
-#define    NV34TCL_RC_IN_RGB_A_INPUT_E_TIMES_F_NV					0x0f000000
-#define   NV34TCL_RC_IN_RGB_A_COMPONENT_USAGE						(1 << 28)
-#define    NV34TCL_RC_IN_RGB_A_COMPONENT_USAGE_RGB					0x00000000
-#define    NV34TCL_RC_IN_RGB_A_COMPONENT_USAGE_ALPHA					0x10000000
-#define   NV34TCL_RC_IN_RGB_A_MAPPING_SHIFT						29
-#define   NV34TCL_RC_IN_RGB_A_MAPPING_MASK						0xe0000000
-#define    NV34TCL_RC_IN_RGB_A_MAPPING_UNSIGNED_IDENTITY_NV				0x00000000
-#define    NV34TCL_RC_IN_RGB_A_MAPPING_UNSIGNED_INVERT_NV				0x20000000
-#define    NV34TCL_RC_IN_RGB_A_MAPPING_EXPAND_NORMAL_NV					0x40000000
-#define    NV34TCL_RC_IN_RGB_A_MAPPING_EXPAND_NEGATE_NV					0x60000000
-#define    NV34TCL_RC_IN_RGB_A_MAPPING_HALF_BIAS_NORMAL_NV				0x80000000
-#define    NV34TCL_RC_IN_RGB_A_MAPPING_HALF_BIAS_NEGATE_NV				0xa0000000
-#define    NV34TCL_RC_IN_RGB_A_MAPPING_SIGNED_IDENTITY_NV				0xc0000000
-#define    NV34TCL_RC_IN_RGB_A_MAPPING_SIGNED_NEGATE_NV					0xe0000000
-#define  NV34TCL_RC_CONSTANT_COLOR0(x)							(0x00000908+((x)*32))
-#define  NV34TCL_RC_CONSTANT_COLOR0__SIZE						0x00000008
-#define   NV34TCL_RC_CONSTANT_COLOR0_B_SHIFT						0
-#define   NV34TCL_RC_CONSTANT_COLOR0_B_MASK						0x000000ff
-#define   NV34TCL_RC_CONSTANT_COLOR0_G_SHIFT						8
-#define   NV34TCL_RC_CONSTANT_COLOR0_G_MASK						0x0000ff00
-#define   NV34TCL_RC_CONSTANT_COLOR0_R_SHIFT						16
-#define   NV34TCL_RC_CONSTANT_COLOR0_R_MASK						0x00ff0000
-#define   NV34TCL_RC_CONSTANT_COLOR0_A_SHIFT						24
-#define   NV34TCL_RC_CONSTANT_COLOR0_A_MASK						0xff000000
-#define  NV34TCL_RC_CONSTANT_COLOR1(x)							(0x0000090c+((x)*32))
-#define  NV34TCL_RC_CONSTANT_COLOR1__SIZE						0x00000008
-#define   NV34TCL_RC_CONSTANT_COLOR1_B_SHIFT						0
-#define   NV34TCL_RC_CONSTANT_COLOR1_B_MASK						0x000000ff
-#define   NV34TCL_RC_CONSTANT_COLOR1_G_SHIFT						8
-#define   NV34TCL_RC_CONSTANT_COLOR1_G_MASK						0x0000ff00
-#define   NV34TCL_RC_CONSTANT_COLOR1_R_SHIFT						16
-#define   NV34TCL_RC_CONSTANT_COLOR1_R_MASK						0x00ff0000
-#define   NV34TCL_RC_CONSTANT_COLOR1_A_SHIFT						24
-#define   NV34TCL_RC_CONSTANT_COLOR1_A_MASK						0xff000000
-#define  NV34TCL_RC_OUT_ALPHA(x)							(0x00000910+((x)*32))
-#define  NV34TCL_RC_OUT_ALPHA__SIZE							0x00000008
-#define   NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_SHIFT						0
-#define   NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_MASK						0x0000000f
-#define    NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_ZERO						0x00000000
-#define    NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_CONSTANT_COLOR0_NV				0x00000001
-#define    NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_CONSTANT_COLOR1_NV				0x00000002
-#define    NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_FOG						0x00000003
-#define    NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_PRIMARY_COLOR_NV				0x00000004
-#define    NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_SECONDARY_COLOR_NV				0x00000005
-#define    NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE0_ARB					0x00000008
-#define    NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE1_ARB					0x00000009
-#define    NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE0_NV					0x0000000c
-#define    NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE1_NV					0x0000000d
-#define    NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV		0x0000000e
-#define    NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_E_TIMES_F_NV					0x0000000f
-#define   NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_SHIFT						4
-#define   NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_MASK						0x000000f0
-#define    NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_ZERO						0x00000000
-#define    NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_CONSTANT_COLOR0_NV				0x00000010
-#define    NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_CONSTANT_COLOR1_NV				0x00000020
-#define    NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_FOG						0x00000030
-#define    NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_PRIMARY_COLOR_NV				0x00000040
-#define    NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_SECONDARY_COLOR_NV				0x00000050
-#define    NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE0_ARB					0x00000080
-#define    NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE1_ARB					0x00000090
-#define    NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE0_NV					0x000000c0
-#define    NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE1_NV					0x000000d0
-#define    NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV		0x000000e0
-#define    NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_E_TIMES_F_NV					0x000000f0
-#define   NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_SHIFT						8
-#define   NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_MASK						0x00000f00
-#define    NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_ZERO						0x00000000
-#define    NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_CONSTANT_COLOR0_NV				0x00000100
-#define    NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_CONSTANT_COLOR1_NV				0x00000200
-#define    NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_FOG						0x00000300
-#define    NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_PRIMARY_COLOR_NV				0x00000400
-#define    NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_SECONDARY_COLOR_NV				0x00000500
-#define    NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE0_ARB					0x00000800
-#define    NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE1_ARB					0x00000900
-#define    NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE0_NV					0x00000c00
-#define    NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE1_NV					0x00000d00
-#define    NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV		0x00000e00
-#define    NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_E_TIMES_F_NV					0x00000f00
-#define   NV34TCL_RC_OUT_ALPHA_CD_DOT_PRODUCT						(1 << 12)
-#define   NV34TCL_RC_OUT_ALPHA_AB_DOT_PRODUCT						(1 << 13)
-#define   NV34TCL_RC_OUT_ALPHA_MUX_SUM							(1 << 14)
-#define   NV34TCL_RC_OUT_ALPHA_BIAS							(1 << 15)
-#define    NV34TCL_RC_OUT_ALPHA_BIAS_NONE						0x00000000
-#define    NV34TCL_RC_OUT_ALPHA_BIAS_BIAS_BY_NEGATIVE_ONE_HALF_NV			0x00008000
-#define   NV34TCL_RC_OUT_ALPHA_SCALE_SHIFT						17
-#define   NV34TCL_RC_OUT_ALPHA_SCALE_MASK						0x00000000
-#define    NV34TCL_RC_OUT_ALPHA_SCALE_NONE						0x00000000
-#define    NV34TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_TWO_NV					0x00020000
-#define    NV34TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_FOUR_NV					0x00040000
-#define    NV34TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_ONE_HALF_NV				0x00060000
-#define  NV34TCL_RC_OUT_RGB(x)								(0x00000914+((x)*32))
-#define  NV34TCL_RC_OUT_RGB__SIZE							0x00000008
-#define   NV34TCL_RC_OUT_RGB_CD_OUTPUT_SHIFT						0
-#define   NV34TCL_RC_OUT_RGB_CD_OUTPUT_MASK						0x0000000f
-#define    NV34TCL_RC_OUT_RGB_CD_OUTPUT_ZERO						0x00000000
-#define    NV34TCL_RC_OUT_RGB_CD_OUTPUT_CONSTANT_COLOR0_NV				0x00000001
-#define    NV34TCL_RC_OUT_RGB_CD_OUTPUT_CONSTANT_COLOR1_NV				0x00000002
-#define    NV34TCL_RC_OUT_RGB_CD_OUTPUT_FOG						0x00000003
-#define    NV34TCL_RC_OUT_RGB_CD_OUTPUT_PRIMARY_COLOR_NV				0x00000004
-#define    NV34TCL_RC_OUT_RGB_CD_OUTPUT_SECONDARY_COLOR_NV				0x00000005
-#define    NV34TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE0_ARB					0x00000008
-#define    NV34TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE1_ARB					0x00000009
-#define    NV34TCL_RC_OUT_RGB_CD_OUTPUT_SPARE0_NV					0x0000000c
-#define    NV34TCL_RC_OUT_RGB_CD_OUTPUT_SPARE1_NV					0x0000000d
-#define    NV34TCL_RC_OUT_RGB_CD_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x0000000e
-#define    NV34TCL_RC_OUT_RGB_CD_OUTPUT_E_TIMES_F_NV					0x0000000f
-#define   NV34TCL_RC_OUT_RGB_AB_OUTPUT_SHIFT						4
-#define   NV34TCL_RC_OUT_RGB_AB_OUTPUT_MASK						0x000000f0
-#define    NV34TCL_RC_OUT_RGB_AB_OUTPUT_ZERO						0x00000000
-#define    NV34TCL_RC_OUT_RGB_AB_OUTPUT_CONSTANT_COLOR0_NV				0x00000010
-#define    NV34TCL_RC_OUT_RGB_AB_OUTPUT_CONSTANT_COLOR1_NV				0x00000020
-#define    NV34TCL_RC_OUT_RGB_AB_OUTPUT_FOG						0x00000030
-#define    NV34TCL_RC_OUT_RGB_AB_OUTPUT_PRIMARY_COLOR_NV				0x00000040
-#define    NV34TCL_RC_OUT_RGB_AB_OUTPUT_SECONDARY_COLOR_NV				0x00000050
-#define    NV34TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE0_ARB					0x00000080
-#define    NV34TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE1_ARB					0x00000090
-#define    NV34TCL_RC_OUT_RGB_AB_OUTPUT_SPARE0_NV					0x000000c0
-#define    NV34TCL_RC_OUT_RGB_AB_OUTPUT_SPARE1_NV					0x000000d0
-#define    NV34TCL_RC_OUT_RGB_AB_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x000000e0
-#define    NV34TCL_RC_OUT_RGB_AB_OUTPUT_E_TIMES_F_NV					0x000000f0
-#define   NV34TCL_RC_OUT_RGB_SUM_OUTPUT_SHIFT						8
-#define   NV34TCL_RC_OUT_RGB_SUM_OUTPUT_MASK						0x00000f00
-#define    NV34TCL_RC_OUT_RGB_SUM_OUTPUT_ZERO						0x00000000
-#define    NV34TCL_RC_OUT_RGB_SUM_OUTPUT_CONSTANT_COLOR0_NV				0x00000100
-#define    NV34TCL_RC_OUT_RGB_SUM_OUTPUT_CONSTANT_COLOR1_NV				0x00000200
-#define    NV34TCL_RC_OUT_RGB_SUM_OUTPUT_FOG						0x00000300
-#define    NV34TCL_RC_OUT_RGB_SUM_OUTPUT_PRIMARY_COLOR_NV				0x00000400
-#define    NV34TCL_RC_OUT_RGB_SUM_OUTPUT_SECONDARY_COLOR_NV				0x00000500
-#define    NV34TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE0_ARB					0x00000800
-#define    NV34TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE1_ARB					0x00000900
-#define    NV34TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE0_NV					0x00000c00
-#define    NV34TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE1_NV					0x00000d00
-#define    NV34TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV			0x00000e00
-#define    NV34TCL_RC_OUT_RGB_SUM_OUTPUT_E_TIMES_F_NV					0x00000f00
-#define   NV34TCL_RC_OUT_RGB_CD_DOT_PRODUCT						(1 << 12)
-#define   NV34TCL_RC_OUT_RGB_AB_DOT_PRODUCT						(1 << 13)
-#define   NV34TCL_RC_OUT_RGB_MUX_SUM							(1 << 14)
-#define   NV34TCL_RC_OUT_RGB_BIAS							(1 << 15)
-#define    NV34TCL_RC_OUT_RGB_BIAS_NONE							0x00000000
-#define    NV34TCL_RC_OUT_RGB_BIAS_BIAS_BY_NEGATIVE_ONE_HALF_NV				0x00008000
-#define   NV34TCL_RC_OUT_RGB_SCALE_SHIFT						17
-#define   NV34TCL_RC_OUT_RGB_SCALE_MASK							0x00000000
-#define    NV34TCL_RC_OUT_RGB_SCALE_NONE						0x00000000
-#define    NV34TCL_RC_OUT_RGB_SCALE_SCALE_BY_TWO_NV					0x00020000
-#define    NV34TCL_RC_OUT_RGB_SCALE_SCALE_BY_FOUR_NV					0x00040000
-#define    NV34TCL_RC_OUT_RGB_SCALE_SCALE_BY_ONE_HALF_NV				0x00060000
-#define  NV34TCL_VIEWPORT_HORIZ								0x00000a00
-#define   NV34TCL_VIEWPORT_HORIZ_X_SHIFT						0
-#define   NV34TCL_VIEWPORT_HORIZ_X_MASK							0x0000ffff
-#define   NV34TCL_VIEWPORT_HORIZ_W_SHIFT						16
-#define   NV34TCL_VIEWPORT_HORIZ_W_MASK							0xffff0000
-#define  NV34TCL_VIEWPORT_VERT								0x00000a04
-#define   NV34TCL_VIEWPORT_VERT_Y_SHIFT							0
-#define   NV34TCL_VIEWPORT_VERT_Y_MASK							0x0000ffff
-#define   NV34TCL_VIEWPORT_VERT_H_SHIFT							16
-#define   NV34TCL_VIEWPORT_VERT_H_MASK							0xffff0000
-#define  NV34TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_R			0x00000a10
-#define  NV34TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_G			0x00000a14
-#define  NV34TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_B			0x00000a18
-#define  NV34TCL_VIEWPORT_TRANSLATE_X							0x00000a20
-#define  NV34TCL_VIEWPORT_TRANSLATE_Y							0x00000a24
-#define  NV34TCL_VIEWPORT_TRANSLATE_Z							0x00000a28
-#define  NV34TCL_VIEWPORT_TRANSLATE_W							0x00000a2c
-#define  NV34TCL_VIEWPORT_SCALE_X							0x00000a30
-#define  NV34TCL_VIEWPORT_SCALE_Y							0x00000a34
-#define  NV34TCL_VIEWPORT_SCALE_Z							0x00000a38
-#define  NV34TCL_VIEWPORT_SCALE_W							0x00000a3c
-#define  NV34TCL_POLYGON_OFFSET_POINT_ENABLE						0x00000a60
-#define  NV34TCL_POLYGON_OFFSET_LINE_ENABLE						0x00000a64
-#define  NV34TCL_POLYGON_OFFSET_FILL_ENABLE						0x00000a68
-#define  NV34TCL_DEPTH_FUNC								0x00000a6c
-#define   NV34TCL_DEPTH_FUNC_NEVER							0x00000200
-#define   NV34TCL_DEPTH_FUNC_LESS							0x00000201
-#define   NV34TCL_DEPTH_FUNC_EQUAL							0x00000202
-#define   NV34TCL_DEPTH_FUNC_LEQUAL							0x00000203
-#define   NV34TCL_DEPTH_FUNC_GREATER							0x00000204
-#define   NV34TCL_DEPTH_FUNC_GREATER							0x00000204
-#define   NV34TCL_DEPTH_FUNC_NOTEQUAL							0x00000205
-#define   NV34TCL_DEPTH_FUNC_GEQUAL							0x00000206
-#define   NV34TCL_DEPTH_FUNC_ALWAYS							0x00000207
-#define  NV34TCL_DEPTH_WRITE_ENABLE							0x00000a70
-#define  NV34TCL_DEPTH_TEST_ENABLE							0x00000a74
-#define  NV34TCL_POLYGON_OFFSET_FACTOR							0x00000a78
-#define  NV34TCL_POLYGON_OFFSET_UNITS							0x00000a7c
-#define  NV34TCL_VTX_ATTR_3I_XY(x)							(0x00000a80+((x)*8))
-#define  NV34TCL_VTX_ATTR_3I_XY__SIZE							0x00000010
-#define   NV34TCL_VTX_ATTR_3I_XY_X_SHIFT						0
-#define   NV34TCL_VTX_ATTR_3I_XY_X_MASK							0x0000ffff
-#define   NV34TCL_VTX_ATTR_3I_XY_Y_SHIFT						16
-#define   NV34TCL_VTX_ATTR_3I_XY_Y_MASK							0xffff0000
-#define  NV34TCL_VTX_ATTR_3I_Z(x)							(0x00000a84+((x)*8))
-#define  NV34TCL_VTX_ATTR_3I_Z__SIZE							0x00000010
-#define   NV34TCL_VTX_ATTR_3I_Z_Z_SHIFT							0
-#define   NV34TCL_VTX_ATTR_3I_Z_Z_MASK							0x0000ffff
-#define  NV34TCL_VP_UPLOAD_INST(x)							(0x00000b80+((x)*4))
-#define  NV34TCL_VP_UPLOAD_INST__SIZE							0x00000004
-#define  NV34TCL_TX0_CLIP_PLANE_A(x)							(0x00000e00+((x)*16))
-#define  NV34TCL_TX0_CLIP_PLANE_A__SIZE							0x00000004
-#define  NV34TCL_TX0_CLIP_PLANE_B(x)							(0x00000e04+((x)*16))
-#define  NV34TCL_TX0_CLIP_PLANE_B__SIZE							0x00000004
-#define  NV34TCL_TX0_CLIP_PLANE_C(x)							(0x00000e08+((x)*16))
-#define  NV34TCL_TX0_CLIP_PLANE_C__SIZE							0x00000004
-#define  NV34TCL_TX0_CLIP_PLANE_D(x)							(0x00000e0c+((x)*16))
-#define  NV34TCL_TX0_CLIP_PLANE_D__SIZE							0x00000004
-#define  NV34TCL_TX1_CLIP_PLANE_A(x)							(0x00000e40+((x)*16))
-#define  NV34TCL_TX1_CLIP_PLANE_A__SIZE							0x00000004
-#define  NV34TCL_TX1_CLIP_PLANE_B(x)							(0x00000e44+((x)*16))
-#define  NV34TCL_TX1_CLIP_PLANE_B__SIZE							0x00000004
-#define  NV34TCL_TX1_CLIP_PLANE_C(x)							(0x00000e48+((x)*16))
-#define  NV34TCL_TX1_CLIP_PLANE_C__SIZE							0x00000004
-#define  NV34TCL_TX1_CLIP_PLANE_D(x)							(0x00000e4c+((x)*16))
-#define  NV34TCL_TX1_CLIP_PLANE_D__SIZE							0x00000004
-#define  NV34TCL_TX2_CLIP_PLANE_A(x)							(0x00000e80+((x)*16))
-#define  NV34TCL_TX2_CLIP_PLANE_A__SIZE							0x00000004
-#define  NV34TCL_TX2_CLIP_PLANE_B(x)							(0x00000e84+((x)*16))
-#define  NV34TCL_TX2_CLIP_PLANE_B__SIZE							0x00000004
-#define  NV34TCL_TX2_CLIP_PLANE_C(x)							(0x00000e88+((x)*16))
-#define  NV34TCL_TX2_CLIP_PLANE_C__SIZE							0x00000004
-#define  NV34TCL_TX2_CLIP_PLANE_D(x)							(0x00000e8c+((x)*16))
-#define  NV34TCL_TX2_CLIP_PLANE_D__SIZE							0x00000004
-#define  NV34TCL_TX3_CLIP_PLANE_A(x)							(0x00000ec0+((x)*16))
-#define  NV34TCL_TX3_CLIP_PLANE_A__SIZE							0x00000004
-#define  NV34TCL_TX3_CLIP_PLANE_B(x)							(0x00000ec4+((x)*16))
-#define  NV34TCL_TX3_CLIP_PLANE_B__SIZE							0x00000004
-#define  NV34TCL_TX3_CLIP_PLANE_C(x)							(0x00000ec8+((x)*16))
-#define  NV34TCL_TX3_CLIP_PLANE_C__SIZE							0x00000004
-#define  NV34TCL_TX3_CLIP_PLANE_D(x)							(0x00000ecc+((x)*16))
-#define  NV34TCL_TX3_CLIP_PLANE_D__SIZE							0x00000004
-#define  NV34TCL_TX4_CLIP_PLANE_A(x)							(0x00000f00+((x)*16))
-#define  NV34TCL_TX4_CLIP_PLANE_A__SIZE							0x00000004
-#define  NV34TCL_TX4_CLIP_PLANE_B(x)							(0x00000f04+((x)*16))
-#define  NV34TCL_TX4_CLIP_PLANE_B__SIZE							0x00000004
-#define  NV34TCL_TX4_CLIP_PLANE_C(x)							(0x00000f08+((x)*16))
-#define  NV34TCL_TX4_CLIP_PLANE_C__SIZE							0x00000004
-#define  NV34TCL_TX4_CLIP_PLANE_D(x)							(0x00000f0c+((x)*16))
-#define  NV34TCL_TX4_CLIP_PLANE_D__SIZE							0x00000004
-#define  NV34TCL_TX5_CLIP_PLANE_A(x)							(0x00000f40+((x)*16))
-#define  NV34TCL_TX5_CLIP_PLANE_A__SIZE							0x00000004
-#define  NV34TCL_TX5_CLIP_PLANE_B(x)							(0x00000f44+((x)*16))
-#define  NV34TCL_TX5_CLIP_PLANE_B__SIZE							0x00000004
-#define  NV34TCL_TX5_CLIP_PLANE_C(x)							(0x00000f48+((x)*16))
-#define  NV34TCL_TX5_CLIP_PLANE_C__SIZE							0x00000004
-#define  NV34TCL_TX5_CLIP_PLANE_D(x)							(0x00000f4c+((x)*16))
-#define  NV34TCL_TX5_CLIP_PLANE_D__SIZE							0x00000004
-#define  NV34TCL_TX6_CLIP_PLANE_A(x)							(0x00000f80+((x)*16))
-#define  NV34TCL_TX6_CLIP_PLANE_A__SIZE							0x00000004
-#define  NV34TCL_TX6_CLIP_PLANE_B(x)							(0x00000f84+((x)*16))
-#define  NV34TCL_TX6_CLIP_PLANE_B__SIZE							0x00000004
-#define  NV34TCL_TX6_CLIP_PLANE_C(x)							(0x00000f88+((x)*16))
-#define  NV34TCL_TX6_CLIP_PLANE_C__SIZE							0x00000004
-#define  NV34TCL_TX6_CLIP_PLANE_D(x)							(0x00000f8c+((x)*16))
-#define  NV34TCL_TX6_CLIP_PLANE_D__SIZE							0x00000004
-#define  NV34TCL_TX7_CLIP_PLANE_A(x)							(0x00000fc0+((x)*16))
-#define  NV34TCL_TX7_CLIP_PLANE_A__SIZE							0x00000004
-#define  NV34TCL_TX7_CLIP_PLANE_B(x)							(0x00000fc4+((x)*16))
-#define  NV34TCL_TX7_CLIP_PLANE_B__SIZE							0x00000004
-#define  NV34TCL_TX7_CLIP_PLANE_C(x)							(0x00000fc8+((x)*16))
-#define  NV34TCL_TX7_CLIP_PLANE_C__SIZE							0x00000004
-#define  NV34TCL_TX7_CLIP_PLANE_D(x)							(0x00000fcc+((x)*16))
-#define  NV34TCL_TX7_CLIP_PLANE_D__SIZE							0x00000004
-#define  NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_R(x)					(0x00001000+((x)*64))
-#define  NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_R__SIZE				0x00000008
-#define  NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_G(x)					(0x00001004+((x)*64))
-#define  NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_G__SIZE				0x00000008
-#define  NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_B(x)					(0x00001008+((x)*64))
-#define  NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_B__SIZE				0x00000008
-#define  NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_R(x)					(0x0000100c+((x)*64))
-#define  NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_R__SIZE				0x00000008
-#define  NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_G(x)					(0x00001010+((x)*64))
-#define  NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_G__SIZE				0x00000008
-#define  NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_B(x)					(0x00001014+((x)*64))
-#define  NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_B__SIZE				0x00000008
-#define  NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_R(x)					(0x00001018+((x)*64))
-#define  NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_R__SIZE				0x00000008
-#define  NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_G(x)					(0x0000101c+((x)*64))
-#define  NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_G__SIZE				0x00000008
-#define  NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_B(x)					(0x00001020+((x)*64))
-#define  NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_B__SIZE				0x00000008
-#define  NV34TCL_LIGHT_HALF_VECTOR_X(x)							(0x00001028+((x)*64))
-#define  NV34TCL_LIGHT_HALF_VECTOR_X__SIZE						0x00000008
-#define  NV34TCL_LIGHT_HALF_VECTOR_Y(x)							(0x0000102c+((x)*64))
-#define  NV34TCL_LIGHT_HALF_VECTOR_Y__SIZE						0x00000008
-#define  NV34TCL_LIGHT_HALF_VECTOR_Z(x)							(0x00001030+((x)*64))
-#define  NV34TCL_LIGHT_HALF_VECTOR_Z__SIZE						0x00000008
-#define  NV34TCL_LIGHT_DIRECTION_X(x)							(0x00001034+((x)*64))
-#define  NV34TCL_LIGHT_DIRECTION_X__SIZE						0x00000008
-#define  NV34TCL_LIGHT_DIRECTION_Y(x)							(0x00001038+((x)*64))
-#define  NV34TCL_LIGHT_DIRECTION_Y__SIZE						0x00000008
-#define  NV34TCL_LIGHT_DIRECTION_Z(x)							(0x0000103c+((x)*64))
-#define  NV34TCL_LIGHT_DIRECTION_Z__SIZE						0x00000008
-#define  NV34TCL_LIGHT_SPOT_CUTOFF_A(x)							(0x00001200+((x)*64))
-#define  NV34TCL_LIGHT_SPOT_CUTOFF_A__SIZE						0x00000008
-#define  NV34TCL_LIGHT_SPOT_CUTOFF_B(x)							(0x00001204+((x)*64))
-#define  NV34TCL_LIGHT_SPOT_CUTOFF_B__SIZE						0x00000008
-#define  NV34TCL_LIGHT_SPOT_CUTOFF_C(x)							(0x00001208+((x)*64))
-#define  NV34TCL_LIGHT_SPOT_CUTOFF_C__SIZE						0x00000008
-#define  NV34TCL_LIGHT_SPOT_DIR_X(x)							(0x0000120c+((x)*64))
-#define  NV34TCL_LIGHT_SPOT_DIR_X__SIZE							0x00000008
-#define  NV34TCL_LIGHT_SPOT_DIR_Y(x)							(0x00001210+((x)*64))
-#define  NV34TCL_LIGHT_SPOT_DIR_Y__SIZE							0x00000008
-#define  NV34TCL_LIGHT_SPOT_DIR_Z(x)							(0x00001214+((x)*64))
-#define  NV34TCL_LIGHT_SPOT_DIR_Z__SIZE							0x00000008
-#define  NV34TCL_LIGHT_SPOT_CUTOFF_D(x)							(0x00001218+((x)*64))
-#define  NV34TCL_LIGHT_SPOT_CUTOFF_D__SIZE						0x00000008
-#define  NV34TCL_LIGHT_POSITION_X(x)							(0x0000121c+((x)*64))
-#define  NV34TCL_LIGHT_POSITION_X__SIZE							0x00000008
-#define  NV34TCL_LIGHT_POSITION_Y(x)							(0x00001220+((x)*64))
-#define  NV34TCL_LIGHT_POSITION_Y__SIZE							0x00000008
-#define  NV34TCL_LIGHT_POSITION_Z(x)							(0x00001224+((x)*64))
-#define  NV34TCL_LIGHT_POSITION_Z__SIZE							0x00000008
-#define  NV34TCL_LIGHT_ATTENUATION_CONSTANT(x)						(0x00001228+((x)*64))
-#define  NV34TCL_LIGHT_ATTENUATION_CONSTANT__SIZE					0x00000008
-#define  NV34TCL_LIGHT_ATTENUATION_LINEAR(x)						(0x0000122c+((x)*64))
-#define  NV34TCL_LIGHT_ATTENUATION_LINEAR__SIZE						0x00000008
-#define  NV34TCL_LIGHT_ATTENUATION_QUADRATIC(x)						(0x00001230+((x)*64))
-#define  NV34TCL_LIGHT_ATTENUATION_QUADRATIC__SIZE					0x00000008
-#define  NV34TCL_FRONT_MATERIAL_SHININESS(x)						(0x00001400+((x)*4))
-#define  NV34TCL_FRONT_MATERIAL_SHININESS__SIZE						0x00000006
-#define  NV34TCL_ENABLED_LIGHTS								0x00001420
-#define  NV34TCL_FP_REG_CONTROL								0x00001450
-#define   NV34TCL_FP_REG_CONTROL_UNK1_SHIFT						16
-#define   NV34TCL_FP_REG_CONTROL_UNK1_MASK						0xffff0000
-#define   NV34TCL_FP_REG_CONTROL_UNK0_SHIFT						0
-#define   NV34TCL_FP_REG_CONTROL_UNK0_MASK						0x0000ffff
-#define  NV34TCL_VP_CLIP_PLANES_ENABLE							0x00001478
-#define   NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE0						(1 <<  1)
-#define   NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE1						(1 <<  5)
-#define   NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE2						(1 <<  9)
-#define   NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE3						(1 << 13)
-#define   NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE4						(1 << 17)
-#define   NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE5						(1 << 21)
-#define   NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE6						(1 << 25)
-#define   NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE7						(1 << 29)
-#define  NV34TCL_POLYGON_STIPPLE_ENABLE							0x0000147c
-#define  NV34TCL_POLYGON_STIPPLE_PATTERN(x)						(0x00001480+((x)*4))
-#define  NV34TCL_POLYGON_STIPPLE_PATTERN__SIZE						0x00000020
-#define  NV34TCL_VTX_ATTR_3F_X(x)							(0x00001500+((x)*16))
-#define  NV34TCL_VTX_ATTR_3F_X__SIZE							0x00000010
-#define  NV34TCL_VTX_ATTR_3F_Y(x)							(0x00001504+((x)*16))
-#define  NV34TCL_VTX_ATTR_3F_Y__SIZE							0x00000010
-#define  NV34TCL_VTX_ATTR_3F_Z(x)							(0x00001508+((x)*16))
-#define  NV34TCL_VTX_ATTR_3F_Z__SIZE							0x00000010
-#define  NV34TCL_VP_CLIP_PLANE_A(x)							(0x00001600+((x)*16))
-#define  NV34TCL_VP_CLIP_PLANE_A__SIZE							0x00000006
-#define  NV34TCL_VP_CLIP_PLANE_B(x)							(0x00001604+((x)*16))
-#define  NV34TCL_VP_CLIP_PLANE_B__SIZE							0x00000006
-#define  NV34TCL_VP_CLIP_PLANE_C(x)							(0x00001608+((x)*16))
-#define  NV34TCL_VP_CLIP_PLANE_C__SIZE							0x00000006
-#define  NV34TCL_VP_CLIP_PLANE_D(x)							(0x0000160c+((x)*16))
-#define  NV34TCL_VP_CLIP_PLANE_D__SIZE							0x00000006
-#define  NV34TCL_VTXBUF_ADDRESS(x)							(0x00001680+((x)*4))
-#define  NV34TCL_VTXBUF_ADDRESS__SIZE							0x00000010
-#define   NV34TCL_VTXBUF_ADDRESS_DMA1							(1 << 31)
-#define   NV34TCL_VTXBUF_ADDRESS_OFFSET_SHIFT						0
-#define   NV34TCL_VTXBUF_ADDRESS_OFFSET_MASK						0x0fffffff
-#define  NV34TCL_VTXFMT(x)								(0x00001740+((x)*4))
-#define  NV34TCL_VTXFMT__SIZE								0x00000010
-#define   NV34TCL_VTXFMT_TYPE_SHIFT							0
-#define   NV34TCL_VTXFMT_TYPE_MASK							0x0000000f
-#define    NV34TCL_VTXFMT_TYPE_FLOAT							0x00000002
-#define    NV34TCL_VTXFMT_TYPE_UBYTE							0x00000004
-#define    NV34TCL_VTXFMT_TYPE_USHORT							0x00000005
-#define   NV34TCL_VTXFMT_SIZE_SHIFT							4
-#define   NV34TCL_VTXFMT_SIZE_MASK							0x000000f0
-#define   NV34TCL_VTXFMT_STRIDE_SHIFT							8
-#define   NV34TCL_VTXFMT_STRIDE_MASK							0x0000ff00
-#define  NV34TCL_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_R			0x000017a0
-#define  NV34TCL_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_G			0x000017a4
-#define  NV34TCL_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_B			0x000017a8
-#define  NV34TCL_COLOR_MATERIAL_BACK_R							0x000017b0
-#define  NV34TCL_COLOR_MATERIAL_BACK_G							0x000017b4
-#define  NV34TCL_COLOR_MATERIAL_BACK_B							0x000017b8
-#define  NV34TCL_COLOR_MATERIAL_BACK_A							0x000017c0
-#define  NV34TCL_QUERY_RESET								0x000017c8
-#define  NV34TCL_QUERY_UNK17CC								0x000017cc
-#define  NV34TCL_QUERY_GET								0x00001800
-#define   NV34TCL_QUERY_GET_UNK24_SHIFT							24
-#define   NV34TCL_QUERY_GET_UNK24_MASK							0xff000000
-#define   NV34TCL_QUERY_GET_OFFSET_SHIFT						0
-#define   NV34TCL_QUERY_GET_OFFSET_MASK							0x00ffffff
-#define  NV34TCL_VERTEX_BEGIN_END							0x00001808
-#define   NV34TCL_VERTEX_BEGIN_END_STOP							0x00000000
-#define   NV34TCL_VERTEX_BEGIN_END_POINTS						0x00000001
-#define   NV34TCL_VERTEX_BEGIN_END_LINES						0x00000002
-#define   NV34TCL_VERTEX_BEGIN_END_LINE_LOOP						0x00000003
-#define   NV34TCL_VERTEX_BEGIN_END_LINE_STRIP						0x00000004
-#define   NV34TCL_VERTEX_BEGIN_END_TRIANGLES						0x00000005
-#define   NV34TCL_VERTEX_BEGIN_END_TRIANGLE_STRIP					0x00000006
-#define   NV34TCL_VERTEX_BEGIN_END_TRIANGLE_FAN						0x00000007
-#define   NV34TCL_VERTEX_BEGIN_END_QUADS						0x00000008
-#define   NV34TCL_VERTEX_BEGIN_END_QUAD_STRIP						0x00000009
-#define   NV34TCL_VERTEX_BEGIN_END_POLYGON						0x0000000a
-#define  NV34TCL_VB_ELEMENT_U16								0x0000180c
-#define   NV34TCL_VB_ELEMENT_U16_I0_SHIFT						0
-#define   NV34TCL_VB_ELEMENT_U16_I0_MASK						0x0000ffff
-#define   NV34TCL_VB_ELEMENT_U16_I1_SHIFT						16
-#define   NV34TCL_VB_ELEMENT_U16_I1_MASK						0xffff0000
-#define  NV34TCL_VB_ELEMENT_U32								0x00001810
-#define  NV34TCL_VB_VERTEX_BATCH							0x00001814
-#define   NV34TCL_VB_VERTEX_BATCH_OFFSET_SHIFT						0
-#define   NV34TCL_VB_VERTEX_BATCH_OFFSET_MASK						0x00ffffff
-#define   NV34TCL_VB_VERTEX_BATCH_COUNT_SHIFT						24
-#define   NV34TCL_VB_VERTEX_BATCH_COUNT_MASK						0xff000000
-#define  NV34TCL_VERTEX_DATA								0x00001818
-#define  NV34TCL_IDXBUF_ADDRESS								0x0000181c
-#define  NV34TCL_IDXBUF_FORMAT								0x00001820
-#define   NV34TCL_IDXBUF_FORMAT_TYPE_SHIFT						4
-#define   NV34TCL_IDXBUF_FORMAT_TYPE_MASK						0x000000f0
-#define    NV34TCL_IDXBUF_FORMAT_TYPE_U32						0x00000000
-#define    NV34TCL_IDXBUF_FORMAT_TYPE_U16						0x00000010
-#define   NV34TCL_IDXBUF_FORMAT_DMA1							(1 <<  0)
-#define  NV34TCL_VB_INDEX_BATCH								0x00001824
-#define   NV34TCL_VB_INDEX_BATCH_COUNT_SHIFT						24
-#define   NV34TCL_VB_INDEX_BATCH_COUNT_MASK						0xff000000
-#define   NV34TCL_VB_INDEX_BATCH_START_SHIFT						0
-#define   NV34TCL_VB_INDEX_BATCH_START_MASK						0x00ffffff
-#define  NV34TCL_POLYGON_MODE_FRONT							0x00001828
-#define   NV34TCL_POLYGON_MODE_FRONT_POINT						0x00001b00
-#define   NV34TCL_POLYGON_MODE_FRONT_LINE						0x00001b01
-#define   NV34TCL_POLYGON_MODE_FRONT_FILL						0x00001b02
-#define  NV34TCL_POLYGON_MODE_BACK							0x0000182c
-#define   NV34TCL_POLYGON_MODE_BACK_POINT						0x00001b00
-#define   NV34TCL_POLYGON_MODE_BACK_LINE						0x00001b01
-#define   NV34TCL_POLYGON_MODE_BACK_FILL						0x00001b02
-#define  NV34TCL_CULL_FACE								0x00001830
-#define   NV34TCL_CULL_FACE_FRONT							0x00000404
-#define   NV34TCL_CULL_FACE_BACK							0x00000405
-#define   NV34TCL_CULL_FACE_FRONT_AND_BACK						0x00000408
-#define  NV34TCL_FRONT_FACE								0x00001834
-#define   NV34TCL_FRONT_FACE_CW								0x00000900
-#define   NV34TCL_FRONT_FACE_CCW							0x00000901
-#define  NV34TCL_POLYGON_SMOOTH_ENABLE							0x00001838
-#define  NV34TCL_CULL_FACE_ENABLE							0x0000183c
-#define  NV34TCL_TX_PALETTE_OFFSET(x)							(0x00001840+((x)*4))
-#define  NV34TCL_TX_PALETTE_OFFSET__SIZE						0x00000004
-#define  NV34TCL_VTX_ATTR_2F_X(x)							(0x00001880+((x)*8))
-#define  NV34TCL_VTX_ATTR_2F_X__SIZE							0x00000010
-#define  NV34TCL_VTX_ATTR_2F_Y(x)							(0x00001884+((x)*8))
-#define  NV34TCL_VTX_ATTR_2F_Y__SIZE							0x00000010
-#define  NV34TCL_VTX_ATTR_2I(x)								(0x00001900+((x)*4))
-#define  NV34TCL_VTX_ATTR_2I__SIZE							0x00000010
-#define   NV34TCL_VTX_ATTR_2I_X_SHIFT							0
-#define   NV34TCL_VTX_ATTR_2I_X_MASK							0x0000ffff
-#define   NV34TCL_VTX_ATTR_2I_Y_SHIFT							16
-#define   NV34TCL_VTX_ATTR_2I_Y_MASK							0xffff0000
-#define  NV34TCL_VTX_ATTR_4UB(x)							(0x00001940+((x)*4))
-#define  NV34TCL_VTX_ATTR_4UB__SIZE							0x00000010
-#define   NV34TCL_VTX_ATTR_4UB_X_SHIFT							0
-#define   NV34TCL_VTX_ATTR_4UB_X_MASK							0x000000ff
-#define   NV34TCL_VTX_ATTR_4UB_Y_SHIFT							8
-#define   NV34TCL_VTX_ATTR_4UB_Y_MASK							0x0000ff00
-#define   NV34TCL_VTX_ATTR_4UB_Z_SHIFT							16
-#define   NV34TCL_VTX_ATTR_4UB_Z_MASK							0x00ff0000
-#define   NV34TCL_VTX_ATTR_4UB_W_SHIFT							24
-#define   NV34TCL_VTX_ATTR_4UB_W_MASK							0xff000000
-#define  NV34TCL_VTX_ATTR_4I_XY(x)							(0x00001980+((x)*8))
-#define  NV34TCL_VTX_ATTR_4I_XY__SIZE							0x00000010
-#define   NV34TCL_VTX_ATTR_4I_XY_X_SHIFT						0
-#define   NV34TCL_VTX_ATTR_4I_XY_X_MASK							0x0000ffff
-#define   NV34TCL_VTX_ATTR_4I_XY_Y_SHIFT						16
-#define   NV34TCL_VTX_ATTR_4I_XY_Y_MASK							0xffff0000
-#define  NV34TCL_VTX_ATTR_4I_ZW(x)							(0x00001984+((x)*8))
-#define  NV34TCL_VTX_ATTR_4I_ZW__SIZE							0x00000010
-#define   NV34TCL_VTX_ATTR_4I_ZW_Z_SHIFT						0
-#define   NV34TCL_VTX_ATTR_4I_ZW_Z_MASK							0x0000ffff
-#define   NV34TCL_VTX_ATTR_4I_ZW_W_SHIFT						16
-#define   NV34TCL_VTX_ATTR_4I_ZW_W_MASK							0xffff0000
-#define  NV34TCL_TX_OFFSET(x)								(0x00001a00+((x)*32))
-#define  NV34TCL_TX_OFFSET__SIZE							0x00000004
-#define  NV34TCL_TX_FORMAT(x)								(0x00001a04+((x)*32))
-#define  NV34TCL_TX_FORMAT__SIZE							0x00000004
-#define   NV34TCL_TX_FORMAT_DMA0							(1 <<  0)
-#define   NV34TCL_TX_FORMAT_DMA1							(1 <<  1)
-#define   NV34TCL_TX_FORMAT_CUBIC							(1 <<  2)
-#define   NV34TCL_TX_FORMAT_NO_BORDER							(1 <<  3)
-#define   NV34TCL_TX_FORMAT_DIMS_SHIFT							4
-#define   NV34TCL_TX_FORMAT_DIMS_MASK							0x000000f0
-#define    NV34TCL_TX_FORMAT_DIMS_1D							0x00000010
-#define    NV34TCL_TX_FORMAT_DIMS_2D							0x00000020
-#define    NV34TCL_TX_FORMAT_DIMS_3D							0x00000030
-#define   NV34TCL_TX_FORMAT_FORMAT_SHIFT						8
-#define   NV34TCL_TX_FORMAT_FORMAT_MASK							0x0000ff00
-#define    NV34TCL_TX_FORMAT_FORMAT_L8							0x00000000
-#define    NV34TCL_TX_FORMAT_FORMAT_A8							0x00000100
-#define    NV34TCL_TX_FORMAT_FORMAT_A1R5G5B5						0x00000200
-#define    NV34TCL_TX_FORMAT_FORMAT_A8_RECT						0x00000300
-#define    NV34TCL_TX_FORMAT_FORMAT_A4R4G4B4						0x00000400
-#define    NV34TCL_TX_FORMAT_FORMAT_R5G6B5						0x00000500
-#define    NV34TCL_TX_FORMAT_FORMAT_A8R8G8B8						0x00000600
-#define    NV34TCL_TX_FORMAT_FORMAT_X8R8G8B8						0x00000700
-#define    NV34TCL_TX_FORMAT_FORMAT_INDEX8						0x00000b00
-#define    NV34TCL_TX_FORMAT_FORMAT_DXT1						0x00000c00
-#define    NV34TCL_TX_FORMAT_FORMAT_DXT3						0x00000e00
-#define    NV34TCL_TX_FORMAT_FORMAT_DXT5						0x00000f00
-#define    NV34TCL_TX_FORMAT_FORMAT_A1R5G5B5_RECT					0x00001000
-#define    NV34TCL_TX_FORMAT_FORMAT_R5G6B5_RECT						0x00001100
-#define    NV34TCL_TX_FORMAT_FORMAT_A8R8G8B8_RECT					0x00001200
-#define    NV34TCL_TX_FORMAT_FORMAT_L8_RECT						0x00001300
-#define    NV34TCL_TX_FORMAT_FORMAT_A8L8						0x00001a00
-#define    NV34TCL_TX_FORMAT_FORMAT_A8_RECT2						0x00001b00
-#define    NV34TCL_TX_FORMAT_FORMAT_A4R4G4B4_RECT					0x00001d00
-#define    NV34TCL_TX_FORMAT_FORMAT_R8G8B8_RECT						0x00001e00
-#define    NV34TCL_TX_FORMAT_FORMAT_L8A8_RECT						0x00002000
-#define    NV34TCL_TX_FORMAT_FORMAT_DSDT						0x00002800
-#define    NV34TCL_TX_FORMAT_FORMAT_A16							0x00003200
-#define    NV34TCL_TX_FORMAT_FORMAT_HILO16						0x00003300
-#define    NV34TCL_TX_FORMAT_FORMAT_A16_RECT						0x00003500
-#define    NV34TCL_TX_FORMAT_FORMAT_HILO16_RECT						0x00003600
-#define    NV34TCL_TX_FORMAT_FORMAT_HILO8						0x00004400
-#define    NV34TCL_TX_FORMAT_FORMAT_SIGNED_HILO8					0x00004500
-#define    NV34TCL_TX_FORMAT_FORMAT_HILO8_RECT						0x00004600
-#define    NV34TCL_TX_FORMAT_FORMAT_SIGNED_HILO8_RECT					0x00004700
-#define    NV34TCL_TX_FORMAT_FORMAT_FLOAT_RGBA16_NV					0x00004a00
-#define    NV34TCL_TX_FORMAT_FORMAT_FLOAT_RGBA32_NV					0x00004b00
-#define    NV34TCL_TX_FORMAT_FORMAT_FLOAT_R32_NV					0x00004c00
-#define   NV34TCL_TX_FORMAT_MIPMAP							(1 << 19)
-#define   NV34TCL_TX_FORMAT_BASE_SIZE_U_SHIFT						20
-#define   NV34TCL_TX_FORMAT_BASE_SIZE_U_MASK						0x00f00000
-#define   NV34TCL_TX_FORMAT_BASE_SIZE_V_SHIFT						24
-#define   NV34TCL_TX_FORMAT_BASE_SIZE_V_MASK						0x0f000000
-#define   NV34TCL_TX_FORMAT_BASE_SIZE_W_SHIFT						28
-#define   NV34TCL_TX_FORMAT_BASE_SIZE_W_MASK						0xf0000000
-#define  NV34TCL_TX_WRAP(x)								(0x00001a08+((x)*32))
-#define  NV34TCL_TX_WRAP__SIZE								0x00000004
-#define   NV34TCL_TX_WRAP_S_SHIFT							0
-#define   NV34TCL_TX_WRAP_S_MASK							0x000000ff
-#define    NV34TCL_TX_WRAP_S_REPEAT							0x00000001
-#define    NV34TCL_TX_WRAP_S_MIRRORED_REPEAT						0x00000002
-#define    NV34TCL_TX_WRAP_S_CLAMP_TO_EDGE						0x00000003
-#define    NV34TCL_TX_WRAP_S_CLAMP_TO_BORDER						0x00000004
-#define    NV34TCL_TX_WRAP_S_CLAMP							0x00000005
-#define   NV34TCL_TX_WRAP_T_SHIFT							8
-#define   NV34TCL_TX_WRAP_T_MASK							0x00000f00
-#define    NV34TCL_TX_WRAP_T_REPEAT							0x00000100
-#define    NV34TCL_TX_WRAP_T_MIRRORED_REPEAT						0x00000200
-#define    NV34TCL_TX_WRAP_T_CLAMP_TO_EDGE						0x00000300
-#define    NV34TCL_TX_WRAP_T_CLAMP_TO_BORDER						0x00000400
-#define    NV34TCL_TX_WRAP_T_CLAMP							0x00000500
-#define   NV34TCL_TX_WRAP_EXPAND_NORMAL_SHIFT						12
-#define   NV34TCL_TX_WRAP_EXPAND_NORMAL_MASK						0x0000f000
-#define   NV34TCL_TX_WRAP_R_SHIFT							16
-#define   NV34TCL_TX_WRAP_R_MASK							0x000f0000
-#define    NV34TCL_TX_WRAP_R_REPEAT							0x00010000
-#define    NV34TCL_TX_WRAP_R_MIRRORED_REPEAT						0x00020000
-#define    NV34TCL_TX_WRAP_R_CLAMP_TO_EDGE						0x00030000
-#define    NV34TCL_TX_WRAP_R_CLAMP_TO_BORDER						0x00040000
-#define    NV34TCL_TX_WRAP_R_CLAMP							0x00050000
-#define   NV34TCL_TX_WRAP_RCOMP_SHIFT							28
-#define   NV34TCL_TX_WRAP_RCOMP_MASK							0xf0000000
-#define    NV34TCL_TX_WRAP_RCOMP_NEVER							0x00000000
-#define    NV34TCL_TX_WRAP_RCOMP_GREATER						0x10000000
-#define    NV34TCL_TX_WRAP_RCOMP_EQUAL							0x20000000
-#define    NV34TCL_TX_WRAP_RCOMP_GEQUAL							0x30000000
-#define    NV34TCL_TX_WRAP_RCOMP_LESS							0x40000000
-#define    NV34TCL_TX_WRAP_RCOMP_NOTEQUAL						0x50000000
-#define    NV34TCL_TX_WRAP_RCOMP_LEQUAL							0x60000000
-#define    NV34TCL_TX_WRAP_RCOMP_ALWAYS							0x70000000
-#define  NV34TCL_TX_ENABLE(x)								(0x00001a0c+((x)*32))
-#define  NV34TCL_TX_ENABLE__SIZE							0x00000004
-#define   NV34TCL_TX_ENABLE_ANISO_SHIFT							4
-#define   NV34TCL_TX_ENABLE_ANISO_MASK							0x00000030
-#define    NV34TCL_TX_ENABLE_ANISO_NONE							0x00000000
-#define    NV34TCL_TX_ENABLE_ANISO_2X							0x00000010
-#define    NV34TCL_TX_ENABLE_ANISO_4X							0x00000020
-#define    NV34TCL_TX_ENABLE_ANISO_8X							0x00000030
-#define   NV34TCL_TX_ENABLE_MIPMAP_MAX_LOD_SHIFT					14
-#define   NV34TCL_TX_ENABLE_MIPMAP_MAX_LOD_MASK						0x0003c000
-#define   NV34TCL_TX_ENABLE_MIPMAP_MIN_LOD_SHIFT					26
-#define   NV34TCL_TX_ENABLE_MIPMAP_MIN_LOD_MASK						0x3c000000
-#define   NV34TCL_TX_ENABLE_ENABLE							(1 << 30)
-#define  NV34TCL_TX_SWIZZLE(x)								(0x00001a10+((x)*32))
-#define  NV34TCL_TX_SWIZZLE__SIZE							0x00000004
-#define   NV34TCL_TX_SWIZZLE_S0_X_SHIFT							14
-#define   NV34TCL_TX_SWIZZLE_S0_X_MASK							0x0000c000
-#define    NV34TCL_TX_SWIZZLE_S0_X_ZERO							0x00000000
-#define    NV34TCL_TX_SWIZZLE_S0_X_ONE							0x00004000
-#define    NV34TCL_TX_SWIZZLE_S0_X_S1							0x00008000
-#define   NV34TCL_TX_SWIZZLE_S0_Y_SHIFT							12
-#define   NV34TCL_TX_SWIZZLE_S0_Y_MASK							0x00003000
-#define    NV34TCL_TX_SWIZZLE_S0_Y_ZERO							0x00000000
-#define    NV34TCL_TX_SWIZZLE_S0_Y_ONE							0x00001000
-#define    NV34TCL_TX_SWIZZLE_S0_Y_S1							0x00002000
-#define   NV34TCL_TX_SWIZZLE_S0_Z_SHIFT							10
-#define   NV34TCL_TX_SWIZZLE_S0_Z_MASK							0x00000c00
-#define    NV34TCL_TX_SWIZZLE_S0_Z_ZERO							0x00000000
-#define    NV34TCL_TX_SWIZZLE_S0_Z_ONE							0x00000400
-#define    NV34TCL_TX_SWIZZLE_S0_Z_S1							0x00000800
-#define   NV34TCL_TX_SWIZZLE_S0_W_SHIFT							8
-#define   NV34TCL_TX_SWIZZLE_S0_W_MASK							0x00000300
-#define    NV34TCL_TX_SWIZZLE_S0_W_ZERO							0x00000000
-#define    NV34TCL_TX_SWIZZLE_S0_W_ONE							0x00000100
-#define    NV34TCL_TX_SWIZZLE_S0_W_S1							0x00000200
-#define   NV34TCL_TX_SWIZZLE_S1_X_SHIFT							6
-#define   NV34TCL_TX_SWIZZLE_S1_X_MASK							0x000000c0
-#define    NV34TCL_TX_SWIZZLE_S1_X_W							0x00000000
-#define    NV34TCL_TX_SWIZZLE_S1_X_Z							0x00000040
-#define    NV34TCL_TX_SWIZZLE_S1_X_Y							0x00000080
-#define    NV34TCL_TX_SWIZZLE_S1_X_X							0x000000c0
-#define   NV34TCL_TX_SWIZZLE_S1_Y_SHIFT							4
-#define   NV34TCL_TX_SWIZZLE_S1_Y_MASK							0x00000030
-#define    NV34TCL_TX_SWIZZLE_S1_Y_W							0x00000000
-#define    NV34TCL_TX_SWIZZLE_S1_Y_Z							0x00000010
-#define    NV34TCL_TX_SWIZZLE_S1_Y_Y							0x00000020
-#define    NV34TCL_TX_SWIZZLE_S1_Y_X							0x00000030
-#define   NV34TCL_TX_SWIZZLE_S1_Z_SHIFT							2
-#define   NV34TCL_TX_SWIZZLE_S1_Z_MASK							0x0000000c
-#define    NV34TCL_TX_SWIZZLE_S1_Z_W							0x00000000
-#define    NV34TCL_TX_SWIZZLE_S1_Z_Z							0x00000004
-#define    NV34TCL_TX_SWIZZLE_S1_Z_Y							0x00000008
-#define    NV34TCL_TX_SWIZZLE_S1_Z_X							0x0000000c
-#define   NV34TCL_TX_SWIZZLE_S1_W_SHIFT							0
-#define   NV34TCL_TX_SWIZZLE_S1_W_MASK							0x00000003
-#define    NV34TCL_TX_SWIZZLE_S1_W_W							0x00000000
-#define    NV34TCL_TX_SWIZZLE_S1_W_Z							0x00000001
-#define    NV34TCL_TX_SWIZZLE_S1_W_Y							0x00000002
-#define    NV34TCL_TX_SWIZZLE_S1_W_X							0x00000003
-#define   NV34TCL_TX_SWIZZLE_RECT_PITCH_SHIFT						16
-#define   NV34TCL_TX_SWIZZLE_RECT_PITCH_MASK						0xffff0000
-#define  NV34TCL_TX_FILTER(x)								(0x00001a14+((x)*32))
-#define  NV34TCL_TX_FILTER__SIZE							0x00000004
-#define   NV34TCL_TX_FILTER_LOD_BIAS_SHIFT						8
-#define   NV34TCL_TX_FILTER_LOD_BIAS_MASK						0x00000f00
-#define   NV34TCL_TX_FILTER_MINIFY_SHIFT						16
-#define   NV34TCL_TX_FILTER_MINIFY_MASK							0x000f0000
-#define    NV34TCL_TX_FILTER_MINIFY_NEAREST						0x00010000
-#define    NV34TCL_TX_FILTER_MINIFY_LINEAR						0x00020000
-#define    NV34TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST				0x00030000
-#define    NV34TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST				0x00040000
-#define    NV34TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR				0x00050000
-#define    NV34TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR				0x00060000
-#define   NV34TCL_TX_FILTER_MAGNIFY_SHIFT						24
-#define   NV34TCL_TX_FILTER_MAGNIFY_MASK						0x0f000000
-#define    NV34TCL_TX_FILTER_MAGNIFY_NEAREST						0x01000000
-#define    NV34TCL_TX_FILTER_MAGNIFY_LINEAR						0x02000000
-#define   NV34TCL_TX_FILTER_SIGNED_BLUE							(1 << 28)
-#define   NV34TCL_TX_FILTER_SIGNED_GREEN						(1 << 29)
-#define   NV34TCL_TX_FILTER_SIGNED_RED							(1 << 30)
-#define   NV34TCL_TX_FILTER_SIGNED_ALPHA						(1 << 31)
-#define  NV34TCL_TX_NPOT_SIZE(x)							(0x00001a18+((x)*32))
-#define  NV34TCL_TX_NPOT_SIZE__SIZE							0x00000004
-#define   NV34TCL_TX_NPOT_SIZE_H_SHIFT							0
-#define   NV34TCL_TX_NPOT_SIZE_H_MASK							0x0000ffff
-#define   NV34TCL_TX_NPOT_SIZE_W_SHIFT							16
-#define   NV34TCL_TX_NPOT_SIZE_W_MASK							0xffff0000
-#define  NV34TCL_TX_BORDER_COLOR(x)							(0x00001a1c+((x)*32))
-#define  NV34TCL_TX_BORDER_COLOR__SIZE							0x00000004
-#define   NV34TCL_TX_BORDER_COLOR_B_SHIFT						0
-#define   NV34TCL_TX_BORDER_COLOR_B_MASK						0x000000ff
-#define   NV34TCL_TX_BORDER_COLOR_G_SHIFT						8
-#define   NV34TCL_TX_BORDER_COLOR_G_MASK						0x0000ff00
-#define   NV34TCL_TX_BORDER_COLOR_R_SHIFT						16
-#define   NV34TCL_TX_BORDER_COLOR_R_MASK						0x00ff0000
-#define   NV34TCL_TX_BORDER_COLOR_A_SHIFT						24
-#define   NV34TCL_TX_BORDER_COLOR_A_MASK						0xff000000
-#define  NV34TCL_VTX_ATTR_4F_X(x)							(0x00001c00+((x)*16))
-#define  NV34TCL_VTX_ATTR_4F_X__SIZE							0x00000010
-#define  NV34TCL_VTX_ATTR_4F_Y(x)							(0x00001c04+((x)*16))
-#define  NV34TCL_VTX_ATTR_4F_Y__SIZE							0x00000010
-#define  NV34TCL_VTX_ATTR_4F_Z(x)							(0x00001c08+((x)*16))
-#define  NV34TCL_VTX_ATTR_4F_Z__SIZE							0x00000010
-#define  NV34TCL_VTX_ATTR_4F_W(x)							(0x00001c0c+((x)*16))
-#define  NV34TCL_VTX_ATTR_4F_W__SIZE							0x00000010
-#define  NV34TCL_FP_CONTROL								0x00001d60
-#define   NV34TCL_FP_CONTROL_USES_KIL							(1 <<  7)
-#define   NV34TCL_FP_CONTROL_USED_REGS_MINUS1_DIV2_SHIFT				0
-#define   NV34TCL_FP_CONTROL_USED_REGS_MINUS1_DIV2_MASK					0x0000000f
-#define  NV34TCL_DEPTH_UNK17D8								0x00001d78
-#define   NV34TCL_DEPTH_UNK17D8_CLAMP_SHIFT						4
-#define   NV34TCL_DEPTH_UNK17D8_CLAMP_MASK						0x000000f0
-#define  NV34TCL_MULTISAMPLE_CONTROL							0x00001d7c
-#define   NV34TCL_MULTISAMPLE_CONTROL_ENABLE						(1 <<  0)
-#define   NV34TCL_MULTISAMPLE_CONTROL_SAMPLE_ALPHA_TO_COVERAGE				(1 <<  4)
-#define   NV34TCL_MULTISAMPLE_CONTROL_SAMPLE_ALPHA_TO_ONE				(1 <<  8)
-#define   NV34TCL_MULTISAMPLE_CONTROL_SAMPLE_COVERAGE_SHIFT				16
-#define   NV34TCL_MULTISAMPLE_CONTROL_SAMPLE_COVERAGE_MASK				0xffff0000
-#define  NV34TCL_CLEAR_DEPTH_VALUE							0x00001d8c
-#define  NV34TCL_CLEAR_COLOR_VALUE							0x00001d90
-#define   NV34TCL_CLEAR_COLOR_VALUE_B_SHIFT						0
-#define   NV34TCL_CLEAR_COLOR_VALUE_B_MASK						0x000000ff
-#define   NV34TCL_CLEAR_COLOR_VALUE_G_SHIFT						8
-#define   NV34TCL_CLEAR_COLOR_VALUE_G_MASK						0x0000ff00
-#define   NV34TCL_CLEAR_COLOR_VALUE_R_SHIFT						16
-#define   NV34TCL_CLEAR_COLOR_VALUE_R_MASK						0x00ff0000
-#define   NV34TCL_CLEAR_COLOR_VALUE_A_SHIFT						24
-#define   NV34TCL_CLEAR_COLOR_VALUE_A_MASK						0xff000000
-#define  NV34TCL_CLEAR_BUFFERS								0x00001d94
-#define   NV34TCL_CLEAR_BUFFERS_COLOR_A							(1 <<  7)
-#define   NV34TCL_CLEAR_BUFFERS_COLOR_B							(1 <<  6)
-#define   NV34TCL_CLEAR_BUFFERS_COLOR_G							(1 <<  5)
-#define   NV34TCL_CLEAR_BUFFERS_COLOR_R							(1 <<  4)
-#define   NV34TCL_CLEAR_BUFFERS_STENCIL							(1 <<  1)
-#define   NV34TCL_CLEAR_BUFFERS_DEPTH							(1 <<  0)
-#define  NV34TCL_DO_VERTICES								0x00001dac
-#define  NV34TCL_LINE_STIPPLE_ENABLE							0x00001db4
-#define  NV34TCL_LINE_STIPPLE_PATTERN							0x00001db8
-#define   NV34TCL_LINE_STIPPLE_PATTERN_FACTOR_SHIFT					0
-#define   NV34TCL_LINE_STIPPLE_PATTERN_FACTOR_MASK					0x0000ffff
-#define   NV34TCL_LINE_STIPPLE_PATTERN_PATTERN_SHIFT					16
-#define   NV34TCL_LINE_STIPPLE_PATTERN_PATTERN_MASK					0xffff0000
-#define  NV34TCL_BACK_MATERIAL_SHININESS(x)						(0x00001e20+((x)*4))
-#define  NV34TCL_BACK_MATERIAL_SHININESS__SIZE						0x00000006
-#define  NV34TCL_VTX_ATTR_1F(x)								(0x00001e40+((x)*4))
-#define  NV34TCL_VTX_ATTR_1F__SIZE							0x00000010
-#define  NV34TCL_ENGINE									0x00001e94
-#define   NV34TCL_ENGINE_FP								(1 <<  0)
-#define   NV34TCL_ENGINE_VP								(1 <<  1)
-#define   NV34TCL_ENGINE_FIXED								(1 <<  2)
-#define  NV34TCL_VP_UPLOAD_FROM_ID							0x00001e9c
-#define  NV34TCL_VP_START_FROM_ID							0x00001ea0
-#define  NV34TCL_POINT_PARAMETERS(x)							(0x00001ec0+((x)*4))
-#define  NV34TCL_POINT_PARAMETERS__SIZE							0x00000008
-#define  NV34TCL_POINT_SIZE								0x00001ee0
-#define  NV34TCL_POINT_PARAMETERS_ENABLE						0x00001ee4
-#define  NV34TCL_POINT_SPRITE								0x00001ee8
-#define   NV34TCL_POINT_SPRITE_ENABLE							(1 <<  0)
-#define   NV34TCL_POINT_SPRITE_R_MODE_SHIFT						1
-#define   NV34TCL_POINT_SPRITE_R_MODE_MASK						0x00000006
-#define    NV34TCL_POINT_SPRITE_R_MODE_ZERO						0x00000000
-#define    NV34TCL_POINT_SPRITE_R_MODE_R						0x00000002
-#define    NV34TCL_POINT_SPRITE_R_MODE_S						0x00000004
-#define   NV34TCL_POINT_SPRITE_COORD_REPLACE						(1 << 11)
-#define  NV34TCL_VP_UPLOAD_CONST_ID							0x00001efc
-#define  NV34TCL_VP_UPLOAD_CONST_X(x)							(0x00001f00+((x)*16))
-#define  NV34TCL_VP_UPLOAD_CONST_X__SIZE						0x00000004
-#define  NV34TCL_VP_UPLOAD_CONST_Y(x)							(0x00001f04+((x)*16))
-#define  NV34TCL_VP_UPLOAD_CONST_Y__SIZE						0x00000004
-#define  NV34TCL_VP_UPLOAD_CONST_Z(x)							(0x00001f08+((x)*16))
-#define  NV34TCL_VP_UPLOAD_CONST_Z__SIZE						0x00000004
-#define  NV34TCL_VP_UPLOAD_CONST_W(x)							(0x00001f0c+((x)*16))
-#define  NV34TCL_VP_UPLOAD_CONST_W__SIZE						0x00000004
-#define  NV34TCL_UNK1f80(x)								(0x00001f80+((x)*4))
-#define  NV34TCL_UNK1f80__SIZE								0x00000010
-
-
-#define NV40_CONTEXT_SURFACES_2D							0x00003062
-
-
-
-#define NV40_STRETCHED_IMAGE_FROM_CPU							0x00003066
-
-
-
-#define NV40_TEXTURE_FROM_CPU								0x0000307b
-
-
-
-#define NV40_SCALED_IMAGE_FROM_MEMORY							0x00003089
-
-
-
-#define NV40_IMAGE_FROM_CPU								0x0000308a
-
-
-
-#define NV40_SWIZZLED_SURFACE								0x0000309e
-
-
-
-#define NV40TCL										0x00004097
-
-#define  NV40TCL_REF_CNT								0x00000050
-#define  NV40TCL_NOP									0x00000100
-#define  NV40TCL_NOTIFY									0x00000104
-#define  NV40TCL_DMA_NOTIFY								0x00000180
-#define  NV40TCL_DMA_TEXTURE0								0x00000184
-#define  NV40TCL_DMA_TEXTURE1								0x00000188
-#define  NV40TCL_DMA_COLOR1								0x0000018c
-#define  NV40TCL_DMA_COLOR0								0x00000194
-#define  NV40TCL_DMA_ZETA								0x00000198
-#define  NV40TCL_DMA_VTXBUF0								0x0000019c
-#define  NV40TCL_DMA_VTXBUF1								0x000001a0
-#define  NV40TCL_DMA_FENCE								0x000001a4
-#define  NV40TCL_DMA_QUERY								0x000001a8
-#define  NV40TCL_DMA_UNK01AC								0x000001ac
-#define  NV40TCL_DMA_UNK01B0								0x000001b0
-#define  NV40TCL_DMA_COLOR2								0x000001b4
-#define  NV40TCL_DMA_COLOR3								0x000001b8
-#define  NV40TCL_RT_HORIZ								0x00000200
-#define   NV40TCL_RT_HORIZ_W_SHIFT							16
-#define   NV40TCL_RT_HORIZ_W_MASK							0xffff0000
-#define   NV40TCL_RT_HORIZ_X_SHIFT							0
-#define   NV40TCL_RT_HORIZ_X_MASK							0x0000ffff
-#define  NV40TCL_RT_VERT								0x00000204
-#define   NV40TCL_RT_VERT_H_SHIFT							16
-#define   NV40TCL_RT_VERT_H_MASK							0xffff0000
-#define   NV40TCL_RT_VERT_Y_SHIFT							0
-#define   NV40TCL_RT_VERT_Y_MASK							0x0000ffff
-#define  NV40TCL_RT_FORMAT								0x00000208
-#define   NV40TCL_RT_FORMAT_LOG2_HEIGHT_SHIFT						24
-#define   NV40TCL_RT_FORMAT_LOG2_HEIGHT_MASK						0xff000000
-#define   NV40TCL_RT_FORMAT_LOG2_WIDTH_SHIFT						16
-#define   NV40TCL_RT_FORMAT_LOG2_WIDTH_MASK						0x00ff0000
-#define   NV40TCL_RT_FORMAT_TYPE_SHIFT							8
-#define   NV40TCL_RT_FORMAT_TYPE_MASK							0x00000f00
-#define    NV40TCL_RT_FORMAT_TYPE_LINEAR						0x00000100
-#define    NV40TCL_RT_FORMAT_TYPE_SWIZZLED						0x00000200
-#define   NV40TCL_RT_FORMAT_ZETA_SHIFT							5
-#define   NV40TCL_RT_FORMAT_ZETA_MASK							0x000000e0
-#define    NV40TCL_RT_FORMAT_ZETA_Z16							0x00000020
-#define    NV40TCL_RT_FORMAT_ZETA_Z24S8							0x00000040
-#define   NV40TCL_RT_FORMAT_COLOR_SHIFT							0
-#define   NV40TCL_RT_FORMAT_COLOR_MASK							0x0000001f
-#define    NV40TCL_RT_FORMAT_COLOR_R5G6B5						0x00000003
-#define    NV40TCL_RT_FORMAT_COLOR_X8R8G8B8						0x00000005
-#define    NV40TCL_RT_FORMAT_COLOR_A8R8G8B8						0x00000008
-#define    NV40TCL_RT_FORMAT_COLOR_B8							0x00000009
-#define    NV40TCL_RT_FORMAT_COLOR_UNKNOWN						0x0000000d
-#define    NV40TCL_RT_FORMAT_COLOR_X8B8G8R8						0x0000000f
-#define    NV40TCL_RT_FORMAT_COLOR_A8B8G8R8						0x00000010
-#define  NV40TCL_COLOR0_PITCH								0x0000020c
-#define  NV40TCL_COLOR0_OFFSET								0x00000210
-#define  NV40TCL_ZETA_OFFSET								0x00000214
-#define  NV40TCL_COLOR1_OFFSET								0x00000218
-#define  NV40TCL_COLOR1_PITCH								0x0000021c
-#define  NV40TCL_RT_ENABLE								0x00000220
-#define   NV40TCL_RT_ENABLE_MRT								(1 <<  4)
-#define   NV40TCL_RT_ENABLE_COLOR3							(1 <<  3)
-#define   NV40TCL_RT_ENABLE_COLOR2							(1 <<  2)
-#define   NV40TCL_RT_ENABLE_COLOR1							(1 <<  1)
-#define   NV40TCL_RT_ENABLE_COLOR0							(1 <<  0)
-#define  NV40TCL_ZETA_PITCH								0x0000022c
-#define  NV40TCL_COLOR2_PITCH								0x00000280
-#define  NV40TCL_COLOR3_PITCH								0x00000284
-#define  NV40TCL_COLOR2_OFFSET								0x00000288
-#define  NV40TCL_COLOR3_OFFSET								0x0000028c
-#define  NV40TCL_VIEWPORT_CLIP_HORIZ(x)							(0x000002c0+((x)*8))
-#define  NV40TCL_VIEWPORT_CLIP_HORIZ__SIZE						0x00000008
-#define  NV40TCL_VIEWPORT_CLIP_VERT(x)							(0x000002c4+((x)*8))
-#define  NV40TCL_VIEWPORT_CLIP_VERT__SIZE						0x00000008
-#define  NV40TCL_DITHER_ENABLE								0x00000300
-#define  NV40TCL_ALPHA_TEST_ENABLE							0x00000304
-#define  NV40TCL_ALPHA_TEST_FUNC							0x00000308
-#define   NV40TCL_ALPHA_TEST_FUNC_NEVER							0x00000200
-#define   NV40TCL_ALPHA_TEST_FUNC_LESS							0x00000201
-#define   NV40TCL_ALPHA_TEST_FUNC_EQUAL							0x00000202
-#define   NV40TCL_ALPHA_TEST_FUNC_LEQUAL						0x00000203
-#define   NV40TCL_ALPHA_TEST_FUNC_GREATER						0x00000204
-#define   NV40TCL_ALPHA_TEST_FUNC_GREATER						0x00000204
-#define   NV40TCL_ALPHA_TEST_FUNC_NOTEQUAL						0x00000205
-#define   NV40TCL_ALPHA_TEST_FUNC_GEQUAL						0x00000206
-#define   NV40TCL_ALPHA_TEST_FUNC_ALWAYS						0x00000207
-#define  NV40TCL_ALPHA_TEST_REF								0x0000030c
-#define  NV40TCL_BLEND_ENABLE								0x00000310
-#define  NV40TCL_BLEND_FUNC_SRC								0x00000314
-#define   NV40TCL_BLEND_FUNC_SRC_RGB_SHIFT						0
-#define   NV40TCL_BLEND_FUNC_SRC_RGB_MASK						0x0000ffff
-#define    NV40TCL_BLEND_FUNC_SRC_RGB_ZERO						0x00000000
-#define    NV40TCL_BLEND_FUNC_SRC_RGB_ONE						0x00000001
-#define    NV40TCL_BLEND_FUNC_SRC_RGB_SRC_COLOR						0x00000300
-#define    NV40TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_SRC_COLOR				0x00000301
-#define    NV40TCL_BLEND_FUNC_SRC_RGB_SRC_ALPHA						0x00000302
-#define    NV40TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_SRC_ALPHA				0x00000303
-#define    NV40TCL_BLEND_FUNC_SRC_RGB_DST_ALPHA						0x00000304
-#define    NV40TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_DST_ALPHA				0x00000305
-#define    NV40TCL_BLEND_FUNC_SRC_RGB_DST_COLOR						0x00000306
-#define    NV40TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_DST_COLOR				0x00000307
-#define    NV40TCL_BLEND_FUNC_SRC_RGB_SRC_ALPHA_SATURATE				0x00000308
-#define    NV40TCL_BLEND_FUNC_SRC_RGB_CONSTANT_COLOR					0x00008001
-#define    NV40TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_CONSTANT_COLOR				0x00008002
-#define    NV40TCL_BLEND_FUNC_SRC_RGB_CONSTANT_ALPHA					0x00008003
-#define    NV40TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_CONSTANT_ALPHA				0x00008004
-#define   NV40TCL_BLEND_FUNC_SRC_ALPHA_SHIFT						16
-#define   NV40TCL_BLEND_FUNC_SRC_ALPHA_MASK						0xffff0000
-#define    NV40TCL_BLEND_FUNC_SRC_ALPHA_ZERO						0x00000000
-#define    NV40TCL_BLEND_FUNC_SRC_ALPHA_ONE						0x00010000
-#define    NV40TCL_BLEND_FUNC_SRC_ALPHA_SRC_COLOR					0x03000000
-#define    NV40TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_SRC_COLOR				0x03010000
-#define    NV40TCL_BLEND_FUNC_SRC_ALPHA_SRC_ALPHA					0x03020000
-#define    NV40TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_SRC_ALPHA				0x03030000
-#define    NV40TCL_BLEND_FUNC_SRC_ALPHA_DST_ALPHA					0x03040000
-#define    NV40TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_DST_ALPHA				0x03050000
-#define    NV40TCL_BLEND_FUNC_SRC_ALPHA_DST_COLOR					0x03060000
-#define    NV40TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_DST_COLOR				0x03070000
-#define    NV40TCL_BLEND_FUNC_SRC_ALPHA_SRC_ALPHA_SATURATE				0x03080000
-#define    NV40TCL_BLEND_FUNC_SRC_ALPHA_CONSTANT_COLOR					0x80010000
-#define    NV40TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_CONSTANT_COLOR			0x80020000
-#define    NV40TCL_BLEND_FUNC_SRC_ALPHA_CONSTANT_ALPHA					0x80030000
-#define    NV40TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_CONSTANT_ALPHA			0x80040000
-#define  NV40TCL_BLEND_FUNC_DST								0x00000318
-#define   NV40TCL_BLEND_FUNC_DST_RGB_SHIFT						0
-#define   NV40TCL_BLEND_FUNC_DST_RGB_MASK						0x0000ffff
-#define    NV40TCL_BLEND_FUNC_DST_RGB_ZERO						0x00000000
-#define    NV40TCL_BLEND_FUNC_DST_RGB_ONE						0x00000001
-#define    NV40TCL_BLEND_FUNC_DST_RGB_SRC_COLOR						0x00000300
-#define    NV40TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_SRC_COLOR				0x00000301
-#define    NV40TCL_BLEND_FUNC_DST_RGB_SRC_ALPHA						0x00000302
-#define    NV40TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_SRC_ALPHA				0x00000303
-#define    NV40TCL_BLEND_FUNC_DST_RGB_DST_ALPHA						0x00000304
-#define    NV40TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_DST_ALPHA				0x00000305
-#define    NV40TCL_BLEND_FUNC_DST_RGB_DST_COLOR						0x00000306
-#define    NV40TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_DST_COLOR				0x00000307
-#define    NV40TCL_BLEND_FUNC_DST_RGB_SRC_ALPHA_SATURATE				0x00000308
-#define    NV40TCL_BLEND_FUNC_DST_RGB_CONSTANT_COLOR					0x00008001
-#define    NV40TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_CONSTANT_COLOR				0x00008002
-#define    NV40TCL_BLEND_FUNC_DST_RGB_CONSTANT_ALPHA					0x00008003
-#define    NV40TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_CONSTANT_ALPHA				0x00008004
-#define   NV40TCL_BLEND_FUNC_DST_ALPHA_SHIFT						16
-#define   NV40TCL_BLEND_FUNC_DST_ALPHA_MASK						0xffff0000
-#define    NV40TCL_BLEND_FUNC_DST_ALPHA_ZERO						0x00000000
-#define    NV40TCL_BLEND_FUNC_DST_ALPHA_ONE						0x00010000
-#define    NV40TCL_BLEND_FUNC_DST_ALPHA_SRC_COLOR					0x03000000
-#define    NV40TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_SRC_COLOR				0x03010000
-#define    NV40TCL_BLEND_FUNC_DST_ALPHA_SRC_ALPHA					0x03020000
-#define    NV40TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_SRC_ALPHA				0x03030000
-#define    NV40TCL_BLEND_FUNC_DST_ALPHA_DST_ALPHA					0x03040000
-#define    NV40TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_DST_ALPHA				0x03050000
-#define    NV40TCL_BLEND_FUNC_DST_ALPHA_DST_COLOR					0x03060000
-#define    NV40TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_DST_COLOR				0x03070000
-#define    NV40TCL_BLEND_FUNC_DST_ALPHA_SRC_ALPHA_SATURATE				0x03080000
-#define    NV40TCL_BLEND_FUNC_DST_ALPHA_CONSTANT_COLOR					0x80010000
-#define    NV40TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_CONSTANT_COLOR			0x80020000
-#define    NV40TCL_BLEND_FUNC_DST_ALPHA_CONSTANT_ALPHA					0x80030000
-#define    NV40TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_CONSTANT_ALPHA			0x80040000
-#define  NV40TCL_BLEND_COLOR								0x0000031c
-#define   NV40TCL_BLEND_COLOR_B_SHIFT							0
-#define   NV40TCL_BLEND_COLOR_B_MASK							0x000000ff
-#define   NV40TCL_BLEND_COLOR_G_SHIFT							8
-#define   NV40TCL_BLEND_COLOR_G_MASK							0x0000ff00
-#define   NV40TCL_BLEND_COLOR_R_SHIFT							16
-#define   NV40TCL_BLEND_COLOR_R_MASK							0x00ff0000
-#define   NV40TCL_BLEND_COLOR_A_SHIFT							24
-#define   NV40TCL_BLEND_COLOR_A_MASK							0xff000000
-#define  NV40TCL_BLEND_EQUATION								0x00000320
-#define   NV40TCL_BLEND_EQUATION_RGB_SHIFT						0
-#define   NV40TCL_BLEND_EQUATION_RGB_MASK						0x0000ffff
-#define    NV40TCL_BLEND_EQUATION_RGB_FUNC_ADD						0x00008006
-#define    NV40TCL_BLEND_EQUATION_RGB_MIN						0x00008007
-#define    NV40TCL_BLEND_EQUATION_RGB_MAX						0x00008008
-#define    NV40TCL_BLEND_EQUATION_RGB_FUNC_SUBTRACT					0x0000800a
-#define    NV40TCL_BLEND_EQUATION_RGB_FUNC_REVERSE_SUBTRACT				0x0000800b
-#define   NV40TCL_BLEND_EQUATION_ALPHA_SHIFT						16
-#define   NV40TCL_BLEND_EQUATION_ALPHA_MASK						0xffff0000
-#define    NV40TCL_BLEND_EQUATION_ALPHA_FUNC_ADD					0x80060000
-#define    NV40TCL_BLEND_EQUATION_ALPHA_MIN						0x80070000
-#define    NV40TCL_BLEND_EQUATION_ALPHA_MAX						0x80080000
-#define    NV40TCL_BLEND_EQUATION_ALPHA_FUNC_SUBTRACT					0x800a0000
-#define    NV40TCL_BLEND_EQUATION_ALPHA_FUNC_REVERSE_SUBTRACT				0x800b0000
-#define  NV40TCL_COLOR_MASK								0x00000324
-#define   NV40TCL_COLOR_MASK_BUFFER0_B_SHIFT						0
-#define   NV40TCL_COLOR_MASK_BUFFER0_B_MASK						0x000000ff
-#define   NV40TCL_COLOR_MASK_BUFFER0_G_SHIFT						8
-#define   NV40TCL_COLOR_MASK_BUFFER0_G_MASK						0x0000ff00
-#define   NV40TCL_COLOR_MASK_BUFFER0_R_SHIFT						16
-#define   NV40TCL_COLOR_MASK_BUFFER0_R_MASK						0x00ff0000
-#define   NV40TCL_COLOR_MASK_BUFFER0_A_SHIFT						24
-#define   NV40TCL_COLOR_MASK_BUFFER0_A_MASK						0xff000000
-#define  NV40TCL_STENCIL_FRONT_ENABLE							0x00000328
-#define  NV40TCL_STENCIL_FRONT_MASK							0x0000032c
-#define  NV40TCL_STENCIL_FRONT_FUNC_FUNC						0x00000330
-#define   NV40TCL_STENCIL_FRONT_FUNC_FUNC_NEVER						0x00000200
-#define   NV40TCL_STENCIL_FRONT_FUNC_FUNC_LESS						0x00000201
-#define   NV40TCL_STENCIL_FRONT_FUNC_FUNC_EQUAL						0x00000202
-#define   NV40TCL_STENCIL_FRONT_FUNC_FUNC_LEQUAL					0x00000203
-#define   NV40TCL_STENCIL_FRONT_FUNC_FUNC_GREATER					0x00000204
-#define   NV40TCL_STENCIL_FRONT_FUNC_FUNC_GREATER					0x00000204
-#define   NV40TCL_STENCIL_FRONT_FUNC_FUNC_NOTEQUAL					0x00000205
-#define   NV40TCL_STENCIL_FRONT_FUNC_FUNC_GEQUAL					0x00000206
-#define   NV40TCL_STENCIL_FRONT_FUNC_FUNC_ALWAYS					0x00000207
-#define  NV40TCL_STENCIL_FRONT_FUNC_REF							0x00000334
-#define  NV40TCL_STENCIL_FRONT_FUNC_MASK						0x00000338
-#define  NV40TCL_STENCIL_FRONT_OP_FAIL							0x0000033c
-#define   NV40TCL_STENCIL_FRONT_OP_FAIL_ZERO						0x00000000
-#define   NV40TCL_STENCIL_FRONT_OP_FAIL_INVERT						0x0000150a
-#define   NV40TCL_STENCIL_FRONT_OP_FAIL_KEEP						0x00001e00
-#define   NV40TCL_STENCIL_FRONT_OP_FAIL_REPLACE						0x00001e01
-#define   NV40TCL_STENCIL_FRONT_OP_FAIL_INCR						0x00001e02
-#define   NV40TCL_STENCIL_FRONT_OP_FAIL_DECR						0x00001e03
-#define   NV40TCL_STENCIL_FRONT_OP_FAIL_INCR_WRAP					0x00008507
-#define   NV40TCL_STENCIL_FRONT_OP_FAIL_DECR_WRAP					0x00008508
-#define  NV40TCL_STENCIL_FRONT_OP_ZFAIL							0x00000340
-#define   NV40TCL_STENCIL_FRONT_OP_ZFAIL_ZERO						0x00000000
-#define   NV40TCL_STENCIL_FRONT_OP_ZFAIL_INVERT						0x0000150a
-#define   NV40TCL_STENCIL_FRONT_OP_ZFAIL_KEEP						0x00001e00
-#define   NV40TCL_STENCIL_FRONT_OP_ZFAIL_REPLACE					0x00001e01
-#define   NV40TCL_STENCIL_FRONT_OP_ZFAIL_INCR						0x00001e02
-#define   NV40TCL_STENCIL_FRONT_OP_ZFAIL_DECR						0x00001e03
-#define   NV40TCL_STENCIL_FRONT_OP_ZFAIL_INCR_WRAP					0x00008507
-#define   NV40TCL_STENCIL_FRONT_OP_ZFAIL_DECR_WRAP					0x00008508
-#define  NV40TCL_STENCIL_FRONT_OP_ZPASS							0x00000344
-#define   NV40TCL_STENCIL_FRONT_OP_ZPASS_ZERO						0x00000000
-#define   NV40TCL_STENCIL_FRONT_OP_ZPASS_INVERT						0x0000150a
-#define   NV40TCL_STENCIL_FRONT_OP_ZPASS_KEEP						0x00001e00
-#define   NV40TCL_STENCIL_FRONT_OP_ZPASS_REPLACE					0x00001e01
-#define   NV40TCL_STENCIL_FRONT_OP_ZPASS_INCR						0x00001e02
-#define   NV40TCL_STENCIL_FRONT_OP_ZPASS_DECR						0x00001e03
-#define   NV40TCL_STENCIL_FRONT_OP_ZPASS_INCR_WRAP					0x00008507
-#define   NV40TCL_STENCIL_FRONT_OP_ZPASS_DECR_WRAP					0x00008508
-#define  NV40TCL_STENCIL_BACK_ENABLE							0x00000348
-#define  NV40TCL_STENCIL_BACK_MASK							0x0000034c
-#define  NV40TCL_STENCIL_BACK_FUNC_FUNC							0x00000350
-#define   NV40TCL_STENCIL_BACK_FUNC_FUNC_NEVER						0x00000200
-#define   NV40TCL_STENCIL_BACK_FUNC_FUNC_LESS						0x00000201
-#define   NV40TCL_STENCIL_BACK_FUNC_FUNC_EQUAL						0x00000202
-#define   NV40TCL_STENCIL_BACK_FUNC_FUNC_LEQUAL						0x00000203
-#define   NV40TCL_STENCIL_BACK_FUNC_FUNC_GREATER					0x00000204
-#define   NV40TCL_STENCIL_BACK_FUNC_FUNC_GREATER					0x00000204
-#define   NV40TCL_STENCIL_BACK_FUNC_FUNC_NOTEQUAL					0x00000205
-#define   NV40TCL_STENCIL_BACK_FUNC_FUNC_GEQUAL						0x00000206
-#define   NV40TCL_STENCIL_BACK_FUNC_FUNC_ALWAYS						0x00000207
-#define  NV40TCL_STENCIL_BACK_FUNC_REF							0x00000354
-#define  NV40TCL_STENCIL_BACK_FUNC_MASK							0x00000358
-#define  NV40TCL_STENCIL_BACK_OP_FAIL							0x0000035c
-#define   NV40TCL_STENCIL_BACK_OP_FAIL_ZERO						0x00000000
-#define   NV40TCL_STENCIL_BACK_OP_FAIL_INVERT						0x0000150a
-#define   NV40TCL_STENCIL_BACK_OP_FAIL_KEEP						0x00001e00
-#define   NV40TCL_STENCIL_BACK_OP_FAIL_REPLACE						0x00001e01
-#define   NV40TCL_STENCIL_BACK_OP_FAIL_INCR						0x00001e02
-#define   NV40TCL_STENCIL_BACK_OP_FAIL_DECR						0x00001e03
-#define   NV40TCL_STENCIL_BACK_OP_FAIL_INCR_WRAP					0x00008507
-#define   NV40TCL_STENCIL_BACK_OP_FAIL_DECR_WRAP					0x00008508
-#define  NV40TCL_STENCIL_BACK_OP_ZFAIL							0x00000360
-#define   NV40TCL_STENCIL_BACK_OP_ZFAIL_ZERO						0x00000000
-#define   NV40TCL_STENCIL_BACK_OP_ZFAIL_INVERT						0x0000150a
-#define   NV40TCL_STENCIL_BACK_OP_ZFAIL_KEEP						0x00001e00
-#define   NV40TCL_STENCIL_BACK_OP_ZFAIL_REPLACE						0x00001e01
-#define   NV40TCL_STENCIL_BACK_OP_ZFAIL_INCR						0x00001e02
-#define   NV40TCL_STENCIL_BACK_OP_ZFAIL_DECR						0x00001e03
-#define   NV40TCL_STENCIL_BACK_OP_ZFAIL_INCR_WRAP					0x00008507
-#define   NV40TCL_STENCIL_BACK_OP_ZFAIL_DECR_WRAP					0x00008508
-#define  NV40TCL_STENCIL_BACK_OP_ZPASS							0x00000364
-#define   NV40TCL_STENCIL_BACK_OP_ZPASS_ZERO						0x00000000
-#define   NV40TCL_STENCIL_BACK_OP_ZPASS_INVERT						0x0000150a
-#define   NV40TCL_STENCIL_BACK_OP_ZPASS_KEEP						0x00001e00
-#define   NV40TCL_STENCIL_BACK_OP_ZPASS_REPLACE						0x00001e01
-#define   NV40TCL_STENCIL_BACK_OP_ZPASS_INCR						0x00001e02
-#define   NV40TCL_STENCIL_BACK_OP_ZPASS_DECR						0x00001e03
-#define   NV40TCL_STENCIL_BACK_OP_ZPASS_INCR_WRAP					0x00008507
-#define   NV40TCL_STENCIL_BACK_OP_ZPASS_DECR_WRAP					0x00008508
-#define  NV40TCL_SHADE_MODEL								0x00000368
-#define   NV40TCL_SHADE_MODEL_FLAT							0x00001d00
-#define   NV40TCL_SHADE_MODEL_SMOOTH							0x00001d01
-#define  NV40TCL_MRT_COLOR_MASK								0x00000370
-#define   NV40TCL_MRT_COLOR_MASK_BUFFER1_A						(1 <<  4)
-#define   NV40TCL_MRT_COLOR_MASK_BUFFER1_R						(1 <<  5)
-#define   NV40TCL_MRT_COLOR_MASK_BUFFER1_G						(1 <<  6)
-#define   NV40TCL_MRT_COLOR_MASK_BUFFER1_B						(1 <<  7)
-#define   NV40TCL_MRT_COLOR_MASK_BUFFER2_A						(1 <<  8)
-#define   NV40TCL_MRT_COLOR_MASK_BUFFER2_R						(1 <<  9)
-#define   NV40TCL_MRT_COLOR_MASK_BUFFER2_G						(1 << 10)
-#define   NV40TCL_MRT_COLOR_MASK_BUFFER2_B						(1 << 11)
-#define   NV40TCL_MRT_COLOR_MASK_BUFFER3_A						(1 << 12)
-#define   NV40TCL_MRT_COLOR_MASK_BUFFER3_R						(1 << 13)
-#define   NV40TCL_MRT_COLOR_MASK_BUFFER3_G						(1 << 14)
-#define   NV40TCL_MRT_COLOR_MASK_BUFFER3_B						(1 << 15)
-#define  NV40TCL_COLOR_LOGIC_OP_ENABLE							0x00000374
-#define  NV40TCL_COLOR_LOGIC_OP								0x00000378
-#define   NV40TCL_COLOR_LOGIC_OP_CLEAR							0x00001500
-#define   NV40TCL_COLOR_LOGIC_OP_AND							0x00001501
-#define   NV40TCL_COLOR_LOGIC_OP_AND_REVERSE						0x00001502
-#define   NV40TCL_COLOR_LOGIC_OP_COPY							0x00001503
-#define   NV40TCL_COLOR_LOGIC_OP_AND_INVERTED						0x00001504
-#define   NV40TCL_COLOR_LOGIC_OP_NOOP							0x00001505
-#define   NV40TCL_COLOR_LOGIC_OP_XOR							0x00001506
-#define   NV40TCL_COLOR_LOGIC_OP_OR							0x00001507
-#define   NV40TCL_COLOR_LOGIC_OP_NOR							0x00001508
-#define   NV40TCL_COLOR_LOGIC_OP_EQUIV							0x00001509
-#define   NV40TCL_COLOR_LOGIC_OP_INVERT							0x0000150a
-#define   NV40TCL_COLOR_LOGIC_OP_OR_REVERSE						0x0000150b
-#define   NV40TCL_COLOR_LOGIC_OP_COPY_INVERTED						0x0000150c
-#define   NV40TCL_COLOR_LOGIC_OP_OR_INVERTED						0x0000150d
-#define   NV40TCL_COLOR_LOGIC_OP_NAND							0x0000150e
-#define   NV40TCL_COLOR_LOGIC_OP_SET							0x0000150f
-#define  NV40TCL_DEPTH_RANGE_NEAR							0x00000394
-#define  NV40TCL_DEPTH_RANGE_FAR							0x00000398
-#define  NV40TCL_LINE_WIDTH								0x000003b8
-#define  NV40TCL_LINE_SMOOTH_ENABLE							0x000003bc
-#define  NV40TCL_UNK03C0(x)								(0x000003c0+((x)*4))
-#define  NV40TCL_UNK03C0__SIZE								0x00000010
-#define  NV40TCL_UNK0400(x)								(0x00000400+((x)*4))
-#define  NV40TCL_UNK0400__SIZE								0x00000010
-#define  NV40TCL_UNK0440(x)								(0x00000440+((x)*4))
-#define  NV40TCL_UNK0440__SIZE								0x00000020
-#define  NV40TCL_SCISSOR_HORIZ								0x000008c0
-#define   NV40TCL_SCISSOR_HORIZ_X_SHIFT							0
-#define   NV40TCL_SCISSOR_HORIZ_X_MASK							0x0000ffff
-#define   NV40TCL_SCISSOR_HORIZ_W_SHIFT							16
-#define   NV40TCL_SCISSOR_HORIZ_W_MASK							0xffff0000
-#define  NV40TCL_SCISSOR_VERT								0x000008c4
-#define   NV40TCL_SCISSOR_VERT_Y_SHIFT							0
-#define   NV40TCL_SCISSOR_VERT_Y_MASK							0x0000ffff
-#define   NV40TCL_SCISSOR_VERT_H_SHIFT							16
-#define   NV40TCL_SCISSOR_VERT_H_MASK							0xffff0000
-#define  NV40TCL_FOG_MODE								0x000008cc
-#define  NV40TCL_FOG_EQUATION_CONSTANT							0x000008d0
-#define  NV40TCL_FOG_EQUATION_LINEAR							0x000008d4
-#define  NV40TCL_FOG_EQUATION_QUADRATIC							0x000008d8
-#define  NV40TCL_FP_ADDRESS								0x000008e4
-#define   NV40TCL_FP_ADDRESS_OFFSET_SHIFT						8
-#define   NV40TCL_FP_ADDRESS_OFFSET_MASK						0xffffff00
-#define   NV40TCL_FP_ADDRESS_DMA1							(1 <<  1)
-#define   NV40TCL_FP_ADDRESS_DMA0							(1 <<  0)
-#define  NV40TCL_VIEWPORT_HORIZ								0x00000a00
-#define   NV40TCL_VIEWPORT_HORIZ_W_SHIFT						16
-#define   NV40TCL_VIEWPORT_HORIZ_W_MASK							0xffff0000
-#define   NV40TCL_VIEWPORT_HORIZ_X_SHIFT						0
-#define   NV40TCL_VIEWPORT_HORIZ_X_MASK							0x0000ffff
-#define  NV40TCL_VIEWPORT_VERT								0x00000a04
-#define   NV40TCL_VIEWPORT_VERT_H_SHIFT							16
-#define   NV40TCL_VIEWPORT_VERT_H_MASK							0xffff0000
-#define   NV40TCL_VIEWPORT_VERT_Y_SHIFT							0
-#define   NV40TCL_VIEWPORT_VERT_Y_MASK							0x0000ffff
-#define  NV40TCL_VIEWPORT_TRANSLATE_X							0x00000a20
-#define  NV40TCL_VIEWPORT_TRANSLATE_Y							0x00000a24
-#define  NV40TCL_VIEWPORT_TRANSLATE_Z							0x00000a28
-#define  NV40TCL_VIEWPORT_TRANSLATE_W							0x00000a2c
-#define  NV40TCL_VIEWPORT_SCALE_X							0x00000a30
-#define  NV40TCL_VIEWPORT_SCALE_Y							0x00000a34
-#define  NV40TCL_VIEWPORT_SCALE_Z							0x00000a38
-#define  NV40TCL_VIEWPORT_SCALE_W							0x00000a3c
-#define  NV40TCL_POLYGON_OFFSET_POINT_ENABLE						0x00000a60
-#define  NV40TCL_POLYGON_OFFSET_LINE_ENABLE						0x00000a64
-#define  NV40TCL_POLYGON_OFFSET_FILL_ENABLE						0x00000a68
-#define  NV40TCL_DEPTH_FUNC								0x00000a6c
-#define   NV40TCL_DEPTH_FUNC_NEVER							0x00000200
-#define   NV40TCL_DEPTH_FUNC_LESS							0x00000201
-#define   NV40TCL_DEPTH_FUNC_EQUAL							0x00000202
-#define   NV40TCL_DEPTH_FUNC_LEQUAL							0x00000203
-#define   NV40TCL_DEPTH_FUNC_GREATER							0x00000204
-#define   NV40TCL_DEPTH_FUNC_GREATER							0x00000204
-#define   NV40TCL_DEPTH_FUNC_NOTEQUAL							0x00000205
-#define   NV40TCL_DEPTH_FUNC_GEQUAL							0x00000206
-#define   NV40TCL_DEPTH_FUNC_ALWAYS							0x00000207
-#define  NV40TCL_DEPTH_WRITE_ENABLE							0x00000a70
-#define  NV40TCL_DEPTH_TEST_ENABLE							0x00000a74
-#define  NV40TCL_POLYGON_OFFSET_FACTOR							0x00000a78
-#define  NV40TCL_POLYGON_OFFSET_UNITS							0x00000a7c
-#define  NV40TCL_VTX_ATTR_3I_XY(x)							(0x00000a80+((x)*8))
-#define  NV40TCL_VTX_ATTR_3I_XY__SIZE							0x00000010
-#define   NV40TCL_VTX_ATTR_3I_XY_X_SHIFT						0
-#define   NV40TCL_VTX_ATTR_3I_XY_X_MASK							0x0000ffff
-#define   NV40TCL_VTX_ATTR_3I_XY_Y_SHIFT						16
-#define   NV40TCL_VTX_ATTR_3I_XY_Y_MASK							0xffff0000
-#define  NV40TCL_VTX_ATTR_3I_Z(x)							(0x00000a84+((x)*8))
-#define  NV40TCL_VTX_ATTR_3I_Z__SIZE							0x00000010
-#define   NV40TCL_VTX_ATTR_3I_Z_Z_SHIFT							0
-#define   NV40TCL_VTX_ATTR_3I_Z_Z_MASK							0x0000ffff
-#define  NV40TCL_TEX_FILTER_OPTIMIZATION						0x00000b00
-#define   NV40TCL_TEX_FILTER_OPTIMIZATION_TRILINEAR_SHIFT				0
-#define   NV40TCL_TEX_FILTER_OPTIMIZATION_TRILINEAR_MASK				0x0000001f
-#define    NV40TCL_TEX_FILTER_OPTIMIZATION_TRILINEAR_OFF				0x00000000
-#define    NV40TCL_TEX_FILTER_OPTIMIZATION_TRILINEAR_HIGH_QUALITY			0x00000004
-#define    NV40TCL_TEX_FILTER_OPTIMIZATION_TRILINEAR_QUALITY				0x00000006
-#define    NV40TCL_TEX_FILTER_OPTIMIZATION_TRILINEAR_PERFORMANCE			0x00000008
-#define    NV40TCL_TEX_FILTER_OPTIMIZATION_TRILINEAR_HIGH_PERFORMANCE			0x00000018
-#define   NV40TCL_TEX_FILTER_OPTIMIZATION_ANISO_SAMPLE_SHIFT				6
-#define   NV40TCL_TEX_FILTER_OPTIMIZATION_ANISO_SAMPLE_MASK				0x000001c0
-#define    NV40TCL_TEX_FILTER_OPTIMIZATION_ANISO_SAMPLE_OFF				0x00000000
-#define    NV40TCL_TEX_FILTER_OPTIMIZATION_ANISO_SAMPLE_HIGH_QUALITY			0x000000c0
-#define    NV40TCL_TEX_FILTER_OPTIMIZATION_ANISO_SAMPLE_QUALITY				0x000001c0
-#define    NV40TCL_TEX_FILTER_OPTIMIZATION_ANISO_SAMPLE_PERFORMANCE			0x00000140
-#define   NV40TCL_TEX_FILTER_OPTIMIZATION_UNKNOWN_SHIFT					10
-#define   NV40TCL_TEX_FILTER_OPTIMIZATION_UNKNOWN_MASK					0x00007c00
-#define    NV40TCL_TEX_FILTER_OPTIMIZATION_UNKNOWN_OFF					0x00000000
-#define    NV40TCL_TEX_FILTER_OPTIMIZATION_UNKNOWN_PARTIAL				0x00002c00
-#define    NV40TCL_TEX_FILTER_OPTIMIZATION_UNKNOWN_FULL					0x00007c00
-#define  NV40TCL_UNK0B40(x)								(0x00000b40+((x)*4))
-#define  NV40TCL_UNK0B40__SIZE								0x00000008
-#define  NV40TCL_VP_UPLOAD_INST(x)							(0x00000b80+((x)*4))
-#define  NV40TCL_VP_UPLOAD_INST__SIZE							0x00000004
-#define  NV40TCL_CLIP_PLANE_ENABLE							0x00001478
-#define   NV40TCL_CLIP_PLANE_ENABLE_PLANE0						(1 <<  1)
-#define   NV40TCL_CLIP_PLANE_ENABLE_PLANE1						(1 <<  5)
-#define   NV40TCL_CLIP_PLANE_ENABLE_PLANE2						(1 <<  9)
-#define   NV40TCL_CLIP_PLANE_ENABLE_PLANE3						(1 << 13)
-#define   NV40TCL_CLIP_PLANE_ENABLE_PLANE4						(1 << 17)
-#define   NV40TCL_CLIP_PLANE_ENABLE_PLANE5						(1 << 21)
-#define  NV40TCL_POLYGON_STIPPLE_ENABLE							0x0000147c
-#define  NV40TCL_POLYGON_STIPPLE_PATTERN(x)						(0x00001480+((x)*4))
-#define  NV40TCL_POLYGON_STIPPLE_PATTERN__SIZE						0x00000020
-#define  NV40TCL_VTX_ATTR_3F_X(x)							(0x00001500+((x)*16))
-#define  NV40TCL_VTX_ATTR_3F_X__SIZE							0x00000010
-#define  NV40TCL_VTX_ATTR_3F_Y(x)							(0x00001504+((x)*16))
-#define  NV40TCL_VTX_ATTR_3F_Y__SIZE							0x00000010
-#define  NV40TCL_VTX_ATTR_3F_Z(x)							(0x00001508+((x)*16))
-#define  NV40TCL_VTX_ATTR_3F_Z__SIZE							0x00000010
-#define  NV40TCL_VTXBUF_ADDRESS(x)							(0x00001680+((x)*4))
-#define  NV40TCL_VTXBUF_ADDRESS__SIZE							0x00000010
-#define   NV40TCL_VTXBUF_ADDRESS_DMA1							(1 << 31)
-#define   NV40TCL_VTXBUF_ADDRESS_OFFSET_SHIFT						0
-#define   NV40TCL_VTXBUF_ADDRESS_OFFSET_MASK						0x0fffffff
-#define  NV40TCL_VTX_CACHE_INVALIDATE							0x00001714
-#define  NV40TCL_VTXFMT(x)								(0x00001740+((x)*4))
-#define  NV40TCL_VTXFMT__SIZE								0x00000010
-#define   NV40TCL_VTXFMT_TYPE_SHIFT							0
-#define   NV40TCL_VTXFMT_TYPE_MASK							0x0000000f
-#define    NV40TCL_VTXFMT_TYPE_FLOAT							0x00000002
-#define    NV40TCL_VTXFMT_TYPE_UBYTE							0x00000004
-#define    NV40TCL_VTXFMT_TYPE_USHORT							0x00000005
-#define   NV40TCL_VTXFMT_SIZE_SHIFT							4
-#define   NV40TCL_VTXFMT_SIZE_MASK							0x000000f0
-#define   NV40TCL_VTXFMT_STRIDE_SHIFT							8
-#define   NV40TCL_VTXFMT_STRIDE_MASK							0x0000ff00
-#define  NV40TCL_QUERY_RESET								0x000017c8
-#define  NV40TCL_QUERY_UNK17CC								0x000017cc
-#define  NV40TCL_QUERY_GET								0x00001800
-#define   NV40TCL_QUERY_GET_UNK24_SHIFT							24
-#define   NV40TCL_QUERY_GET_UNK24_MASK							0xff000000
-#define   NV40TCL_QUERY_GET_OFFSET_SHIFT						0
-#define   NV40TCL_QUERY_GET_OFFSET_MASK							0x00ffffff
-#define  NV40TCL_BEGIN_END								0x00001808
-#define   NV40TCL_BEGIN_END_STOP							0x00000000
-#define   NV40TCL_BEGIN_END_POINTS							0x00000001
-#define   NV40TCL_BEGIN_END_LINES							0x00000002
-#define   NV40TCL_BEGIN_END_LINE_LOOP							0x00000003
-#define   NV40TCL_BEGIN_END_LINE_STRIP							0x00000004
-#define   NV40TCL_BEGIN_END_TRIANGLES							0x00000005
-#define   NV40TCL_BEGIN_END_TRIANGLE_STRIP						0x00000006
-#define   NV40TCL_BEGIN_END_TRIANGLE_FAN						0x00000007
-#define   NV40TCL_BEGIN_END_QUADS							0x00000008
-#define   NV40TCL_BEGIN_END_QUAD_STRIP							0x00000009
-#define   NV40TCL_BEGIN_END_POLYGON							0x0000000a
-#define  NV40TCL_VB_ELEMENT_U16								0x0000180c
-#define   NV40TCL_VB_ELEMENT_U16_1_SHIFT						16
-#define   NV40TCL_VB_ELEMENT_U16_1_MASK							0xffff0000
-#define   NV40TCL_VB_ELEMENT_U16_0_SHIFT						0
-#define   NV40TCL_VB_ELEMENT_U16_0_MASK							0x0000ffff
-#define  NV40TCL_VB_ELEMENT_U32								0x00001810
-#define  NV40TCL_VB_VERTEX_BATCH							0x00001814
-#define   NV40TCL_VB_VERTEX_BATCH_COUNT_SHIFT						24
-#define   NV40TCL_VB_VERTEX_BATCH_COUNT_MASK						0xff000000
-#define   NV40TCL_VB_VERTEX_BATCH_START_SHIFT						0
-#define   NV40TCL_VB_VERTEX_BATCH_START_MASK						0x00ffffff
-#define  NV40TCL_VERTEX_DATA								0x00001818
-#define  NV40TCL_IDXBUF_ADDRESS								0x0000181c
-#define  NV40TCL_IDXBUF_FORMAT								0x00001820
-#define   NV40TCL_IDXBUF_FORMAT_TYPE_SHIFT						4
-#define   NV40TCL_IDXBUF_FORMAT_TYPE_MASK						0x000000f0
-#define    NV40TCL_IDXBUF_FORMAT_TYPE_U32						0x00000000
-#define    NV40TCL_IDXBUF_FORMAT_TYPE_U16						0x00000010
-#define   NV40TCL_IDXBUF_FORMAT_DMA1							(1 <<  0)
-#define  NV40TCL_VB_INDEX_BATCH								0x00001824
-#define   NV40TCL_VB_INDEX_BATCH_COUNT_SHIFT						24
-#define   NV40TCL_VB_INDEX_BATCH_COUNT_MASK						0xff000000
-#define   NV40TCL_VB_INDEX_BATCH_START_SHIFT						0
-#define   NV40TCL_VB_INDEX_BATCH_START_MASK						0x00ffffff
-#define  NV40TCL_POLYGON_MODE_FRONT							0x00001828
-#define   NV40TCL_POLYGON_MODE_FRONT_POINT						0x00001b00
-#define   NV40TCL_POLYGON_MODE_FRONT_LINE						0x00001b01
-#define   NV40TCL_POLYGON_MODE_FRONT_FILL						0x00001b02
-#define  NV40TCL_POLYGON_MODE_BACK							0x0000182c
-#define   NV40TCL_POLYGON_MODE_BACK_POINT						0x00001b00
-#define   NV40TCL_POLYGON_MODE_BACK_LINE						0x00001b01
-#define   NV40TCL_POLYGON_MODE_BACK_FILL						0x00001b02
-#define  NV40TCL_CULL_FACE								0x00001830
-#define   NV40TCL_CULL_FACE_FRONT							0x00000404
-#define   NV40TCL_CULL_FACE_BACK							0x00000405
-#define   NV40TCL_CULL_FACE_FRONT_AND_BACK						0x00000408
-#define  NV40TCL_FRONT_FACE								0x00001834
-#define   NV40TCL_FRONT_FACE_CW								0x00000900
-#define   NV40TCL_FRONT_FACE_CCW							0x00000901
-#define  NV40TCL_POLYGON_SMOOTH_ENABLE							0x00001838
-#define  NV40TCL_CULL_FACE_ENABLE							0x0000183c
-#define  NV40TCL_TEX_SIZE1(x)								(0x00001840+((x)*4))
-#define  NV40TCL_TEX_SIZE1__SIZE							0x00000008
-#define   NV40TCL_TEX_SIZE1_DEPTH_SHIFT							20
-#define   NV40TCL_TEX_SIZE1_DEPTH_MASK							0xfff00000
-#define   NV40TCL_TEX_SIZE1_PITCH_SHIFT							0
-#define   NV40TCL_TEX_SIZE1_PITCH_MASK							0x0000ffff
-#define  NV40TCL_VTX_ATTR_2F_X(x)							(0x00001880+((x)*8))
-#define  NV40TCL_VTX_ATTR_2F_X__SIZE							0x00000010
-#define  NV40TCL_VTX_ATTR_2F_Y(x)							(0x00001884+((x)*8))
-#define  NV40TCL_VTX_ATTR_2F_Y__SIZE							0x00000010
-#define  NV40TCL_VTX_ATTR_2I(x)								(0x00001900+((x)*4))
-#define  NV40TCL_VTX_ATTR_2I__SIZE							0x00000010
-#define   NV40TCL_VTX_ATTR_2I_X_SHIFT							0
-#define   NV40TCL_VTX_ATTR_2I_X_MASK							0x0000ffff
-#define   NV40TCL_VTX_ATTR_2I_Y_SHIFT							16
-#define   NV40TCL_VTX_ATTR_2I_Y_MASK							0xffff0000
-#define  NV40TCL_VTX_ATTR_4UB(x)							(0x00001940+((x)*4))
-#define  NV40TCL_VTX_ATTR_4UB__SIZE							0x00000010
-#define   NV40TCL_VTX_ATTR_4UB_X_SHIFT							0
-#define   NV40TCL_VTX_ATTR_4UB_X_MASK							0x000000ff
-#define   NV40TCL_VTX_ATTR_4UB_Y_SHIFT							8
-#define   NV40TCL_VTX_ATTR_4UB_Y_MASK							0x0000ff00
-#define   NV40TCL_VTX_ATTR_4UB_Z_SHIFT							16
-#define   NV40TCL_VTX_ATTR_4UB_Z_MASK							0x00ff0000
-#define   NV40TCL_VTX_ATTR_4UB_W_SHIFT							24
-#define   NV40TCL_VTX_ATTR_4UB_W_MASK							0xff000000
-#define  NV40TCL_VTX_ATTR_4I_XY(x)							(0x00001980+((x)*8))
-#define  NV40TCL_VTX_ATTR_4I_XY__SIZE							0x00000010
-#define   NV40TCL_VTX_ATTR_4I_XY_X_SHIFT						0
-#define   NV40TCL_VTX_ATTR_4I_XY_X_MASK							0x0000ffff
-#define   NV40TCL_VTX_ATTR_4I_XY_Y_SHIFT						16
-#define   NV40TCL_VTX_ATTR_4I_XY_Y_MASK							0xffff0000
-#define  NV40TCL_VTX_ATTR_4I_ZW(x)							(0x00001984+((x)*8))
-#define  NV40TCL_VTX_ATTR_4I_ZW__SIZE							0x00000010
-#define   NV40TCL_VTX_ATTR_4I_ZW_Z_SHIFT						0
-#define   NV40TCL_VTX_ATTR_4I_ZW_Z_MASK							0x0000ffff
-#define   NV40TCL_VTX_ATTR_4I_ZW_W_SHIFT						16
-#define   NV40TCL_VTX_ATTR_4I_ZW_W_MASK							0xffff0000
-#define  NV40TCL_TEX_OFFSET(x)								(0x00001a00+((x)*32))
-#define  NV40TCL_TEX_OFFSET__SIZE							0x00000010
-#define  NV40TCL_TEX_FORMAT(x)								(0x00001a04+((x)*32))
-#define  NV40TCL_TEX_FORMAT__SIZE							0x00000010
-#define   NV40TCL_TEX_FORMAT_MIPMAP_COUNT_SHIFT						16
-#define   NV40TCL_TEX_FORMAT_MIPMAP_COUNT_MASK						0x000f0000
-#define   NV40TCL_TEX_FORMAT_RECT							(1 << 14)
-#define   NV40TCL_TEX_FORMAT_LINEAR							(1 << 13)
-#define   NV40TCL_TEX_FORMAT_FORMAT_SHIFT						8
-#define   NV40TCL_TEX_FORMAT_FORMAT_MASK						0x00001f00
-#define    NV40TCL_TEX_FORMAT_FORMAT_L8							0x00000100
-#define    NV40TCL_TEX_FORMAT_FORMAT_A1R5G5B5						0x00000200
-#define    NV40TCL_TEX_FORMAT_FORMAT_A4R4G4B4						0x00000300
-#define    NV40TCL_TEX_FORMAT_FORMAT_R5G6B5						0x00000400
-#define    NV40TCL_TEX_FORMAT_FORMAT_A8R8G8B8						0x00000500
-#define    NV40TCL_TEX_FORMAT_FORMAT_DXT1						0x00000600
-#define    NV40TCL_TEX_FORMAT_FORMAT_DXT3						0x00000700
-#define    NV40TCL_TEX_FORMAT_FORMAT_DXT5						0x00000800
-#define    NV40TCL_TEX_FORMAT_FORMAT_A8L8						0x00000b00
-#define    NV40TCL_TEX_FORMAT_FORMAT_Z24						0x00001000
-#define    NV40TCL_TEX_FORMAT_FORMAT_Z16						0x00001200
-#define    NV40TCL_TEX_FORMAT_FORMAT_A16						0x00001400
-#define    NV40TCL_TEX_FORMAT_FORMAT_A16L16						0x00001500
-#define    NV40TCL_TEX_FORMAT_FORMAT_HILO8						0x00001800
-#define    NV40TCL_TEX_FORMAT_FORMAT_RGBA16F						0x00001a00
-#define    NV40TCL_TEX_FORMAT_FORMAT_RGBA32F						0x00001b00
-#define   NV40TCL_TEX_FORMAT_DIMS_SHIFT							4
-#define   NV40TCL_TEX_FORMAT_DIMS_MASK							0x000000f0
-#define    NV40TCL_TEX_FORMAT_DIMS_1D							0x00000010
-#define    NV40TCL_TEX_FORMAT_DIMS_2D							0x00000020
-#define    NV40TCL_TEX_FORMAT_DIMS_3D							0x00000030
-#define   NV40TCL_TEX_FORMAT_NO_BORDER							(1 <<  3)
-#define   NV40TCL_TEX_FORMAT_CUBIC							(1 <<  2)
-#define   NV40TCL_TEX_FORMAT_DMA1							(1 <<  1)
-#define   NV40TCL_TEX_FORMAT_DMA0							(1 <<  0)
-#define  NV40TCL_TEX_WRAP(x)								(0x00001a08+((x)*32))
-#define  NV40TCL_TEX_WRAP__SIZE								0x00000010
-#define   NV40TCL_TEX_WRAP_S_SHIFT							0
-#define   NV40TCL_TEX_WRAP_S_MASK							0x0000000f
-#define    NV40TCL_TEX_WRAP_S_REPEAT							0x00000001
-#define    NV40TCL_TEX_WRAP_S_MIRRORED_REPEAT						0x00000002
-#define    NV40TCL_TEX_WRAP_S_CLAMP_TO_EDGE						0x00000003
-#define    NV40TCL_TEX_WRAP_S_CLAMP_TO_BORDER						0x00000004
-#define    NV40TCL_TEX_WRAP_S_CLAMP							0x00000005
-#define    NV40TCL_TEX_WRAP_S_MIRROR_CLAMP_TO_EDGE					0x00000006
-#define    NV40TCL_TEX_WRAP_S_MIRROR_CLAMP_TO_BORDER					0x00000007
-#define    NV40TCL_TEX_WRAP_S_MIRROR_CLAMP						0x00000008
-#define   NV40TCL_TEX_WRAP_ANISO_MIP_FILTER_OPTIMIZATION_SHIFT				4
-#define   NV40TCL_TEX_WRAP_ANISO_MIP_FILTER_OPTIMIZATION_MASK				0x00000070
-#define    NV40TCL_TEX_WRAP_ANISO_MIP_FILTER_OPTIMIZATION_OFF				0x00000000
-#define    NV40TCL_TEX_WRAP_ANISO_MIP_FILTER_OPTIMIZATION_QUALITY			0x00000020
-#define    NV40TCL_TEX_WRAP_ANISO_MIP_FILTER_OPTIMIZATION_PERFORMANCE			0x00000030
-#define    NV40TCL_TEX_WRAP_ANISO_MIP_FILTER_OPTIMIZATION_HIGH_PERFORMANCE		0x00000070
-#define   NV40TCL_TEX_WRAP_T_SHIFT							8
-#define   NV40TCL_TEX_WRAP_T_MASK							0x00000f00
-#define    NV40TCL_TEX_WRAP_T_REPEAT							0x00000100
-#define    NV40TCL_TEX_WRAP_T_MIRRORED_REPEAT						0x00000200
-#define    NV40TCL_TEX_WRAP_T_CLAMP_TO_EDGE						0x00000300
-#define    NV40TCL_TEX_WRAP_T_CLAMP_TO_BORDER						0x00000400
-#define    NV40TCL_TEX_WRAP_T_CLAMP							0x00000500
-#define    NV40TCL_TEX_WRAP_T_MIRROR_CLAMP_TO_EDGE					0x00000600
-#define    NV40TCL_TEX_WRAP_T_MIRROR_CLAMP_TO_BORDER					0x00000700
-#define    NV40TCL_TEX_WRAP_T_MIRROR_CLAMP						0x00000800
-#define   NV40TCL_TEX_WRAP_EXPAND_NORMAL_SHIFT						12
-#define   NV40TCL_TEX_WRAP_EXPAND_NORMAL_MASK						0x0000f000
-#define   NV40TCL_TEX_WRAP_R_SHIFT							16
-#define   NV40TCL_TEX_WRAP_R_MASK							0x000f0000
-#define    NV40TCL_TEX_WRAP_R_REPEAT							0x00010000
-#define    NV40TCL_TEX_WRAP_R_MIRRORED_REPEAT						0x00020000
-#define    NV40TCL_TEX_WRAP_R_CLAMP_TO_EDGE						0x00030000
-#define    NV40TCL_TEX_WRAP_R_CLAMP_TO_BORDER						0x00040000
-#define    NV40TCL_TEX_WRAP_R_CLAMP							0x00050000
-#define    NV40TCL_TEX_WRAP_R_MIRROR_CLAMP_TO_EDGE					0x00060000
-#define    NV40TCL_TEX_WRAP_R_MIRROR_CLAMP_TO_BORDER					0x00070000
-#define    NV40TCL_TEX_WRAP_R_MIRROR_CLAMP						0x00080000
-#define   NV40TCL_TEX_WRAP_GAMMA_DECREASE_FILTER_SHIFT					20
-#define   NV40TCL_TEX_WRAP_GAMMA_DECREASE_FILTER_MASK					0x00f00000
-#define    NV40TCL_TEX_WRAP_GAMMA_DECREASE_FILTER_NONE					0x00000000
-#define    NV40TCL_TEX_WRAP_GAMMA_DECREASE_FILTER_RED					0x00100000
-#define    NV40TCL_TEX_WRAP_GAMMA_DECREASE_FILTER_GREEN					0x00200000
-#define    NV40TCL_TEX_WRAP_GAMMA_DECREASE_FILTER_BLUE					0x00400000
-#define    NV40TCL_TEX_WRAP_GAMMA_DECREASE_FILTER_ALL					0x00f00000
-#define   NV40TCL_TEX_WRAP_RCOMP_SHIFT							28
-#define   NV40TCL_TEX_WRAP_RCOMP_MASK							0xf0000000
-#define    NV40TCL_TEX_WRAP_RCOMP_NEVER							0x00000000
-#define    NV40TCL_TEX_WRAP_RCOMP_GREATER						0x10000000
-#define    NV40TCL_TEX_WRAP_RCOMP_EQUAL							0x20000000
-#define    NV40TCL_TEX_WRAP_RCOMP_GEQUAL						0x30000000
-#define    NV40TCL_TEX_WRAP_RCOMP_LESS							0x40000000
-#define    NV40TCL_TEX_WRAP_RCOMP_NOTEQUAL						0x50000000
-#define    NV40TCL_TEX_WRAP_RCOMP_LEQUAL						0x60000000
-#define    NV40TCL_TEX_WRAP_RCOMP_ALWAYS						0x70000000
-#define  NV40TCL_TEX_ENABLE(x)								(0x00001a0c+((x)*32))
-#define  NV40TCL_TEX_ENABLE__SIZE							0x00000010
-#define   NV40TCL_TEX_ENABLE_ENABLE							(1 << 31)
-#define   NV40TCL_TEX_ENABLE_MIPMAP_MIN_LOD_SHIFT					27
-#define   NV40TCL_TEX_ENABLE_MIPMAP_MIN_LOD_MASK					0x38000000
-#define   NV40TCL_TEX_ENABLE_MIPMAP_MAX_LOD_SHIFT					15
-#define   NV40TCL_TEX_ENABLE_MIPMAP_MAX_LOD_MASK					0x00038000
-#define   NV40TCL_TEX_ENABLE_ANISO_SHIFT						4
-#define   NV40TCL_TEX_ENABLE_ANISO_MASK							0x000000f0
-#define    NV40TCL_TEX_ENABLE_ANISO_NONE						0x00000000
-#define    NV40TCL_TEX_ENABLE_ANISO_2X							0x00000010
-#define    NV40TCL_TEX_ENABLE_ANISO_4X							0x00000020
-#define    NV40TCL_TEX_ENABLE_ANISO_6X							0x00000030
-#define    NV40TCL_TEX_ENABLE_ANISO_8X							0x00000040
-#define    NV40TCL_TEX_ENABLE_ANISO_10X							0x00000050
-#define    NV40TCL_TEX_ENABLE_ANISO_12X							0x00000060
-#define    NV40TCL_TEX_ENABLE_ANISO_16X							0x00000070
-#define  NV40TCL_TEX_SWIZZLE(x)								(0x00001a10+((x)*32))
-#define  NV40TCL_TEX_SWIZZLE__SIZE							0x00000010
-#define   NV40TCL_TEX_SWIZZLE_S0_X_SHIFT						14
-#define   NV40TCL_TEX_SWIZZLE_S0_X_MASK							0x0000c000
-#define    NV40TCL_TEX_SWIZZLE_S0_X_ZERO						0x00000000
-#define    NV40TCL_TEX_SWIZZLE_S0_X_ONE							0x00004000
-#define    NV40TCL_TEX_SWIZZLE_S0_X_S1							0x00008000
-#define   NV40TCL_TEX_SWIZZLE_S0_Y_SHIFT						12
-#define   NV40TCL_TEX_SWIZZLE_S0_Y_MASK							0x00003000
-#define    NV40TCL_TEX_SWIZZLE_S0_Y_ZERO						0x00000000
-#define    NV40TCL_TEX_SWIZZLE_S0_Y_ONE							0x00001000
-#define    NV40TCL_TEX_SWIZZLE_S0_Y_S1							0x00002000
-#define   NV40TCL_TEX_SWIZZLE_S0_Z_SHIFT						10
-#define   NV40TCL_TEX_SWIZZLE_S0_Z_MASK							0x00000c00
-#define    NV40TCL_TEX_SWIZZLE_S0_Z_ZERO						0x00000000
-#define    NV40TCL_TEX_SWIZZLE_S0_Z_ONE							0x00000400
-#define    NV40TCL_TEX_SWIZZLE_S0_Z_S1							0x00000800
-#define   NV40TCL_TEX_SWIZZLE_S0_W_SHIFT						8
-#define   NV40TCL_TEX_SWIZZLE_S0_W_MASK							0x00000300
-#define    NV40TCL_TEX_SWIZZLE_S0_W_ZERO						0x00000000
-#define    NV40TCL_TEX_SWIZZLE_S0_W_ONE							0x00000100
-#define    NV40TCL_TEX_SWIZZLE_S0_W_S1							0x00000200
-#define   NV40TCL_TEX_SWIZZLE_S1_X_SHIFT						6
-#define   NV40TCL_TEX_SWIZZLE_S1_X_MASK							0x000000c0
-#define    NV40TCL_TEX_SWIZZLE_S1_X_W							0x00000000
-#define    NV40TCL_TEX_SWIZZLE_S1_X_Z							0x00000040
-#define    NV40TCL_TEX_SWIZZLE_S1_X_Y							0x00000080
-#define    NV40TCL_TEX_SWIZZLE_S1_X_X							0x000000c0
-#define   NV40TCL_TEX_SWIZZLE_S1_Y_SHIFT						4
-#define   NV40TCL_TEX_SWIZZLE_S1_Y_MASK							0x00000030
-#define    NV40TCL_TEX_SWIZZLE_S1_Y_W							0x00000000
-#define    NV40TCL_TEX_SWIZZLE_S1_Y_Z							0x00000010
-#define    NV40TCL_TEX_SWIZZLE_S1_Y_Y							0x00000020
-#define    NV40TCL_TEX_SWIZZLE_S1_Y_X							0x00000030
-#define   NV40TCL_TEX_SWIZZLE_S1_Z_SHIFT						2
-#define   NV40TCL_TEX_SWIZZLE_S1_Z_MASK							0x0000000c
-#define    NV40TCL_TEX_SWIZZLE_S1_Z_W							0x00000000
-#define    NV40TCL_TEX_SWIZZLE_S1_Z_Z							0x00000004
-#define    NV40TCL_TEX_SWIZZLE_S1_Z_Y							0x00000008
-#define    NV40TCL_TEX_SWIZZLE_S1_Z_X							0x0000000c
-#define   NV40TCL_TEX_SWIZZLE_S1_W_SHIFT						0
-#define   NV40TCL_TEX_SWIZZLE_S1_W_MASK							0x00000003
-#define    NV40TCL_TEX_SWIZZLE_S1_W_W							0x00000000
-#define    NV40TCL_TEX_SWIZZLE_S1_W_Z							0x00000001
-#define    NV40TCL_TEX_SWIZZLE_S1_W_Y							0x00000002
-#define    NV40TCL_TEX_SWIZZLE_S1_W_X							0x00000003
-#define  NV40TCL_TEX_FILTER(x)								(0x00001a14+((x)*32))
-#define  NV40TCL_TEX_FILTER__SIZE							0x00000010
-#define   NV40TCL_TEX_FILTER_SIGNED_ALPHA						(1 << 31)
-#define   NV40TCL_TEX_FILTER_SIGNED_RED							(1 << 30)
-#define   NV40TCL_TEX_FILTER_SIGNED_GREEN						(1 << 29)
-#define   NV40TCL_TEX_FILTER_SIGNED_BLUE						(1 << 28)
-#define   NV40TCL_TEX_FILTER_MIN_SHIFT							16
-#define   NV40TCL_TEX_FILTER_MIN_MASK							0x000f0000
-#define    NV40TCL_TEX_FILTER_MIN_NEAREST						0x00010000
-#define    NV40TCL_TEX_FILTER_MIN_LINEAR						0x00020000
-#define    NV40TCL_TEX_FILTER_MIN_NEAREST_MIPMAP_NEAREST				0x00030000
-#define    NV40TCL_TEX_FILTER_MIN_LINEAR_MIPMAP_NEAREST					0x00040000
-#define    NV40TCL_TEX_FILTER_MIN_NEAREST_MIPMAP_LINEAR					0x00050000
-#define    NV40TCL_TEX_FILTER_MIN_LINEAR_MIPMAP_LINEAR					0x00060000
-#define   NV40TCL_TEX_FILTER_MAG_SHIFT							24
-#define   NV40TCL_TEX_FILTER_MAG_MASK							0x0f000000
-#define    NV40TCL_TEX_FILTER_MAG_NEAREST						0x01000000
-#define    NV40TCL_TEX_FILTER_MAG_LINEAR						0x02000000
-#define  NV40TCL_TEX_SIZE0(x)								(0x00001a18+((x)*32))
-#define  NV40TCL_TEX_SIZE0__SIZE							0x00000010
-#define   NV40TCL_TEX_SIZE0_H_SHIFT							0
-#define   NV40TCL_TEX_SIZE0_H_MASK							0x0000ffff
-#define   NV40TCL_TEX_SIZE0_W_SHIFT							16
-#define   NV40TCL_TEX_SIZE0_W_MASK							0xffff0000
-#define  NV40TCL_TEX_BORDER_COLOR(x)							(0x00001a1c+((x)*32))
-#define  NV40TCL_TEX_BORDER_COLOR__SIZE							0x00000010
-#define   NV40TCL_TEX_BORDER_COLOR_B_SHIFT						0
-#define   NV40TCL_TEX_BORDER_COLOR_B_MASK						0x000000ff
-#define   NV40TCL_TEX_BORDER_COLOR_G_SHIFT						8
-#define   NV40TCL_TEX_BORDER_COLOR_G_MASK						0x0000ff00
-#define   NV40TCL_TEX_BORDER_COLOR_R_SHIFT						16
-#define   NV40TCL_TEX_BORDER_COLOR_R_MASK						0x00ff0000
-#define   NV40TCL_TEX_BORDER_COLOR_A_SHIFT						24
-#define   NV40TCL_TEX_BORDER_COLOR_A_MASK						0xff000000
-#define  NV40TCL_VTX_ATTR_4F_X(x)							(0x00001c00+((x)*16))
-#define  NV40TCL_VTX_ATTR_4F_X__SIZE							0x00000010
-#define  NV40TCL_VTX_ATTR_4F_Y(x)							(0x00001c04+((x)*16))
-#define  NV40TCL_VTX_ATTR_4F_Y__SIZE							0x00000010
-#define  NV40TCL_VTX_ATTR_4F_Z(x)							(0x00001c08+((x)*16))
-#define  NV40TCL_VTX_ATTR_4F_Z__SIZE							0x00000010
-#define  NV40TCL_VTX_ATTR_4F_W(x)							(0x00001c0c+((x)*16))
-#define  NV40TCL_VTX_ATTR_4F_W__SIZE							0x00000010
-#define  NV40TCL_FP_CONTROL								0x00001d60
-#define   NV40TCL_FP_CONTROL_TEMP_COUNT_SHIFT						24
-#define   NV40TCL_FP_CONTROL_TEMP_COUNT_MASK						0xff000000
-#define   NV40TCL_FP_CONTROL_KIL							(1 <<  7)
-#define  NV40TCL_MULTISAMPLE_CONTROL							0x00001d7c
-#define  NV40TCL_CLEAR_VALUE_DEPTH							0x00001d8c
-#define  NV40TCL_CLEAR_VALUE_COLOR							0x00001d90
-#define  NV40TCL_CLEAR_BUFFERS								0x00001d94
-#define   NV40TCL_CLEAR_BUFFERS_COLOR_A							(1 <<  7)
-#define   NV40TCL_CLEAR_BUFFERS_COLOR_B							(1 <<  6)
-#define   NV40TCL_CLEAR_BUFFERS_COLOR_G							(1 <<  5)
-#define   NV40TCL_CLEAR_BUFFERS_COLOR_R							(1 <<  4)
-#define   NV40TCL_CLEAR_BUFFERS_STENCIL							(1 <<  1)
-#define   NV40TCL_CLEAR_BUFFERS_DEPTH							(1 <<  0)
-#define  NV40TCL_LINE_STIPPLE_ENABLE							0x00001db4
-#define  NV40TCL_LINE_STIPPLE_PATTERN							0x00001db8
-#define   NV40TCL_LINE_STIPPLE_PATTERN_FACTOR_SHIFT					0
-#define   NV40TCL_LINE_STIPPLE_PATTERN_FACTOR_MASK					0x0000ffff
-#define   NV40TCL_LINE_STIPPLE_PATTERN_PATTERN_SHIFT					16
-#define   NV40TCL_LINE_STIPPLE_PATTERN_PATTERN_MASK					0xffff0000
-#define  NV40TCL_VTX_ATTR_1F(x)								(0x00001e40+((x)*4))
-#define  NV40TCL_VTX_ATTR_1F__SIZE							0x00000010
-#define  NV40TCL_VP_UPLOAD_FROM_ID							0x00001e9c
-#define  NV40TCL_VP_START_FROM_ID							0x00001ea0
-#define  NV40TCL_POINT_SIZE								0x00001ee0
-#define  NV40TCL_POINT_SPRITE								0x00001ee8
-#define  NV40TCL_VP_UPLOAD_CONST_ID							0x00001efc
-#define  NV40TCL_VP_UPLOAD_CONST_X(x)							(0x00001f00+((x)*16))
-#define  NV40TCL_VP_UPLOAD_CONST_X__SIZE						0x00000004
-#define  NV40TCL_VP_UPLOAD_CONST_Y(x)							(0x00001f04+((x)*16))
-#define  NV40TCL_VP_UPLOAD_CONST_Y__SIZE						0x00000004
-#define  NV40TCL_VP_UPLOAD_CONST_Z(x)							(0x00001f08+((x)*16))
-#define  NV40TCL_VP_UPLOAD_CONST_Z__SIZE						0x00000004
-#define  NV40TCL_VP_UPLOAD_CONST_W(x)							(0x00001f0c+((x)*16))
-#define  NV40TCL_VP_UPLOAD_CONST_W__SIZE						0x00000004
-#define  NV40TCL_TEX_CACHE_CTL								0x00001fd8
-#define  NV40TCL_VP_ATTRIB_EN								0x00001ff0
-#define  NV40TCL_VP_RESULT_EN								0x00001ff4
-
-
-#define NV44TCL										0x00004497
-
-
-
-#define NV50_2D										0x0000502d
-
-#define  NV50_2D_NOP									0x00000100
-#define  NV50_2D_NOTIFY									0x00000104
-#define  NV50_2D_DMA_NOTIFY								0x00000180
-#define  NV50_2D_DMA_IN_MEMORY0								0x00000184
-#define  NV50_2D_DMA_IN_MEMORY1								0x00000188
-#define  NV50_2D_DMA_IN_MEMORY2								0x0000018c
-#define  NV50_2D_DST_FORMAT								0x00000200
-#define   NV50_2D_DST_FORMAT_R32G32B32A32_FLOAT						0x000000c0
-#define   NV50_2D_DST_FORMAT_R32G32B32_FLOAT						0x000000c3
-#define   NV50_2D_DST_FORMAT_R16G16B16A16_UNORM						0x000000c6
-#define   NV50_2D_DST_FORMAT_R16G16B16A16_SNORM						0x000000c7
-#define   NV50_2D_DST_FORMAT_R16G16B16A16_FLOAT						0x000000ca
-#define   NV50_2D_DST_FORMAT_R32G32_FLOAT						0x000000cb
-#define   NV50_2D_DST_FORMAT_R16G16B16X16_FLOAT						0x000000ce
-#define   NV50_2D_DST_FORMAT_A8R8G8B8_UNORM						0x000000cf
-#define   NV50_2D_DST_FORMAT_A2B10G10R10_UNORM						0x000000d1
-#define   NV50_2D_DST_FORMAT_A8B8G8R8_UNORM						0x000000d6
-#define   NV50_2D_DST_FORMAT_A8B8G8R8_SNORM						0x000000d7
-#define   NV50_2D_DST_FORMAT_R16G16_UNORM						0x000000da
-#define   NV50_2D_DST_FORMAT_R16G16_SNORM						0x000000db
-#define   NV50_2D_DST_FORMAT_R16G16_FLOAT						0x000000de
-#define   NV50_2D_DST_FORMAT_A2R10G10B10_UNORM						0x000000df
-#define   NV50_2D_DST_FORMAT_B10G11R11_FLOAT						0x000000e0
-#define   NV50_2D_DST_FORMAT_R32_FLOAT							0x000000e5
-#define   NV50_2D_DST_FORMAT_X8R8G8B8_UNORM						0x000000e6
-#define   NV50_2D_DST_FORMAT_R5G6B5_UNORM						0x000000e8
-#define   NV50_2D_DST_FORMAT_R16_FLOAT							0x000000e9
-#define   NV50_2D_DST_FORMAT_R8G8_UNORM							0x000000ea
-#define   NV50_2D_DST_FORMAT_R8G8_SNORM							0x000000eb
-#define   NV50_2D_DST_FORMAT_R16_UNORM							0x000000ee
-#define   NV50_2D_DST_FORMAT_R16_SNORM							0x000000ef
-#define   NV50_2D_DST_FORMAT_R8_UNORM							0x000000f3
-#define   NV50_2D_DST_FORMAT_R32_BOOLEAN						0x000000f6
-#define   NV50_2D_DST_FORMAT_A8_UNORM							0x000000f7
-#define   NV50_2D_DST_FORMAT_X1B5G5R5_UNORM						0x000000f8
-#define   NV50_2D_DST_FORMAT_X8B8G8R8_UNORM						0x000000f9
-#define  NV50_2D_DST_LINEAR								0x00000204
-#define  NV50_2D_DST_TILE_MODE								0x00000208
-#define  NV50_2D_DST_PITCH								0x00000214
-#define  NV50_2D_DST_WIDTH								0x00000218
-#define  NV50_2D_DST_HEIGHT								0x0000021c
-#define  NV50_2D_DST_ADDRESS_HIGH							0x00000220
-#define  NV50_2D_DST_ADDRESS_LOW							0x00000224
-#define  NV50_2D_SRC_FORMAT								0x00000230
-#define   NV50_2D_SRC_FORMAT_R32G32B32A32_FLOAT						0x000000c0
-#define   NV50_2D_SRC_FORMAT_R32G32B32_FLOAT						0x000000c3
-#define   NV50_2D_SRC_FORMAT_R16G16B16A16_UNORM						0x000000c6
-#define   NV50_2D_SRC_FORMAT_R16G16B16A16_SNORM						0x000000c7
-#define   NV50_2D_SRC_FORMAT_R16G16B16A16_FLOAT						0x000000ca
-#define   NV50_2D_SRC_FORMAT_R32G32_FLOAT						0x000000cb
-#define   NV50_2D_SRC_FORMAT_R16G16B16X16_FLOAT						0x000000ce
-#define   NV50_2D_SRC_FORMAT_A8R8G8B8_UNORM						0x000000cf
-#define   NV50_2D_SRC_FORMAT_A2B10G10R10_UNORM						0x000000d1
-#define   NV50_2D_SRC_FORMAT_A8B8G8R8_UNORM						0x000000d6
-#define   NV50_2D_SRC_FORMAT_A8B8G8R8_SNORM						0x000000d7
-#define   NV50_2D_SRC_FORMAT_R16G16_UNORM						0x000000da
-#define   NV50_2D_SRC_FORMAT_R16G16_SNORM						0x000000db
-#define   NV50_2D_SRC_FORMAT_R16G16_FLOAT						0x000000de
-#define   NV50_2D_SRC_FORMAT_A2R10G10B10_UNORM						0x000000df
-#define   NV50_2D_SRC_FORMAT_B10G11R11_FLOAT						0x000000e0
-#define   NV50_2D_SRC_FORMAT_R32_FLOAT							0x000000e5
-#define   NV50_2D_SRC_FORMAT_X8R8G8B8_UNORM						0x000000e6
-#define   NV50_2D_SRC_FORMAT_R5G6B5_UNORM						0x000000e8
-#define   NV50_2D_SRC_FORMAT_R16_FLOAT							0x000000e9
-#define   NV50_2D_SRC_FORMAT_R8G8_UNORM							0x000000ea
-#define   NV50_2D_SRC_FORMAT_R8G8_SNORM							0x000000eb
-#define   NV50_2D_SRC_FORMAT_R16_UNORM							0x000000ee
-#define   NV50_2D_SRC_FORMAT_R16_SNORM							0x000000ef
-#define   NV50_2D_SRC_FORMAT_R8_UNORM							0x000000f3
-#define   NV50_2D_SRC_FORMAT_R32_BOOLEAN						0x000000f6
-#define   NV50_2D_SRC_FORMAT_A8_UNORM							0x000000f7
-#define   NV50_2D_SRC_FORMAT_X1B5G5R5_UNORM						0x000000f8
-#define   NV50_2D_SRC_FORMAT_X8B8G8R8_UNORM						0x000000f9
-#define  NV50_2D_SRC_LINEAR								0x00000234
-#define  NV50_2D_SRC_TILE_MODE								0x00000238
-#define  NV50_2D_SRC_PITCH								0x00000244
-#define  NV50_2D_SRC_WIDTH								0x00000248
-#define  NV50_2D_SRC_HEIGHT								0x0000024c
-#define  NV50_2D_SRC_ADDRESS_HIGH							0x00000250
-#define  NV50_2D_SRC_ADDRESS_LOW							0x00000254
-#define  NV50_2D_CLIP_X									0x00000280
-#define  NV50_2D_CLIP_Y									0x00000284
-#define  NV50_2D_CLIP_Z									0x00000288
-#define  NV50_2D_CLIP_W									0x0000028c
-#define  NV50_2D_ROP									0x000002a0
-#define  NV50_2D_OPERATION								0x000002ac
-#define   NV50_2D_OPERATION_SRCCOPY_AND							0x00000000
-#define   NV50_2D_OPERATION_ROP_AND							0x00000001
-#define   NV50_2D_OPERATION_BLEND_AND							0x00000002
-#define   NV50_2D_OPERATION_SRCCOPY							0x00000003
-#define   NV50_2D_OPERATION_SRCCOPY_PREMULT						0x00000004
-#define   NV50_2D_OPERATION_BLEND_PREMULT						0x00000005
-#define  NV50_2D_PATTERN_FORMAT								0x000002e8
-#define   NV50_2D_PATTERN_FORMAT_16BPP							0x00000000
-#define   NV50_2D_PATTERN_FORMAT_15BPP							0x00000001
-#define   NV50_2D_PATTERN_FORMAT_32BPP							0x00000002
-#define   NV50_2D_PATTERN_FORMAT_8BPP							0x00000003
-#define  NV50_2D_PATTERN_COLOR(x)							(0x000002f0+((x)*4))
-#define  NV50_2D_PATTERN_COLOR__SIZE							0x00000002
-#define  NV50_2D_PATTERN_BITMAP(x)							(0x000002f8+((x)*4))
-#define  NV50_2D_PATTERN_BITMAP__SIZE							0x00000002
-#define  NV50_2D_RECT_FORMAT								0x00000584
-#define   NV50_2D_RECT_FORMAT_R32G32B32A32_FLOAT					0x000000c0
-#define   NV50_2D_RECT_FORMAT_R32G32B32_FLOAT						0x000000c3
-#define   NV50_2D_RECT_FORMAT_R16G16B16A16_UNORM					0x000000c6
-#define   NV50_2D_RECT_FORMAT_R16G16B16A16_SNORM					0x000000c7
-#define   NV50_2D_RECT_FORMAT_R16G16B16A16_FLOAT					0x000000ca
-#define   NV50_2D_RECT_FORMAT_R32G32_FLOAT						0x000000cb
-#define   NV50_2D_RECT_FORMAT_R16G16B16X16_FLOAT					0x000000ce
-#define   NV50_2D_RECT_FORMAT_A8R8G8B8_UNORM						0x000000cf
-#define   NV50_2D_RECT_FORMAT_A2B10G10R10_UNORM						0x000000d1
-#define   NV50_2D_RECT_FORMAT_A8B8G8R8_UNORM						0x000000d6
-#define   NV50_2D_RECT_FORMAT_A8B8G8R8_SNORM						0x000000d7
-#define   NV50_2D_RECT_FORMAT_R16G16_UNORM						0x000000da
-#define   NV50_2D_RECT_FORMAT_R16G16_SNORM						0x000000db
-#define   NV50_2D_RECT_FORMAT_R16G16_FLOAT						0x000000de
-#define   NV50_2D_RECT_FORMAT_A2R10G10B10_UNORM						0x000000df
-#define   NV50_2D_RECT_FORMAT_B10G11R11_FLOAT						0x000000e0
-#define   NV50_2D_RECT_FORMAT_R32_FLOAT							0x000000e5
-#define   NV50_2D_RECT_FORMAT_X8R8G8B8_UNORM						0x000000e6
-#define   NV50_2D_RECT_FORMAT_R5G6B5_UNORM						0x000000e8
-#define   NV50_2D_RECT_FORMAT_R16_FLOAT							0x000000e9
-#define   NV50_2D_RECT_FORMAT_R8G8_UNORM						0x000000ea
-#define   NV50_2D_RECT_FORMAT_R8G8_SNORM						0x000000eb
-#define   NV50_2D_RECT_FORMAT_R16_UNORM							0x000000ee
-#define   NV50_2D_RECT_FORMAT_R16_SNORM							0x000000ef
-#define   NV50_2D_RECT_FORMAT_R8_UNORM							0x000000f3
-#define   NV50_2D_RECT_FORMAT_R32_BOOLEAN						0x000000f6
-#define   NV50_2D_RECT_FORMAT_A8_UNORM							0x000000f7
-#define   NV50_2D_RECT_FORMAT_X1B5G5R5_UNORM						0x000000f8
-#define   NV50_2D_RECT_FORMAT_X8B8G8R8_UNORM						0x000000f9
-#define  NV50_2D_RECT_COLOR								0x00000588
-#define  NV50_2D_RECT_X1								0x00000600
-#define  NV50_2D_RECT_Y1								0x00000604
-#define  NV50_2D_RECT_X2								0x00000608
-#define  NV50_2D_RECT_Y2								0x0000060c
-#define  NV50_2D_SIFC_UNK0800								0x00000800
-#define  NV50_2D_SIFC_FORMAT								0x00000804
-#define   NV50_2D_SIFC_FORMAT_R32G32B32A32_FLOAT					0x000000c0
-#define   NV50_2D_SIFC_FORMAT_R32G32B32_FLOAT						0x000000c3
-#define   NV50_2D_SIFC_FORMAT_R16G16B16A16_UNORM					0x000000c6
-#define   NV50_2D_SIFC_FORMAT_R16G16B16A16_SNORM					0x000000c7
-#define   NV50_2D_SIFC_FORMAT_R16G16B16A16_FLOAT					0x000000ca
-#define   NV50_2D_SIFC_FORMAT_R32G32_FLOAT						0x000000cb
-#define   NV50_2D_SIFC_FORMAT_R16G16B16X16_FLOAT					0x000000ce
-#define   NV50_2D_SIFC_FORMAT_A8R8G8B8_UNORM						0x000000cf
-#define   NV50_2D_SIFC_FORMAT_A2B10G10R10_UNORM						0x000000d1
-#define   NV50_2D_SIFC_FORMAT_A8B8G8R8_UNORM						0x000000d6
-#define   NV50_2D_SIFC_FORMAT_A8B8G8R8_SNORM						0x000000d7
-#define   NV50_2D_SIFC_FORMAT_R16G16_UNORM						0x000000da
-#define   NV50_2D_SIFC_FORMAT_R16G16_SNORM						0x000000db
-#define   NV50_2D_SIFC_FORMAT_R16G16_FLOAT						0x000000de
-#define   NV50_2D_SIFC_FORMAT_A2R10G10B10_UNORM						0x000000df
-#define   NV50_2D_SIFC_FORMAT_B10G11R11_FLOAT						0x000000e0
-#define   NV50_2D_SIFC_FORMAT_R32_FLOAT							0x000000e5
-#define   NV50_2D_SIFC_FORMAT_X8R8G8B8_UNORM						0x000000e6
-#define   NV50_2D_SIFC_FORMAT_R5G6B5_UNORM						0x000000e8
-#define   NV50_2D_SIFC_FORMAT_R16_FLOAT							0x000000e9
-#define   NV50_2D_SIFC_FORMAT_R8G8_UNORM						0x000000ea
-#define   NV50_2D_SIFC_FORMAT_R8G8_SNORM						0x000000eb
-#define   NV50_2D_SIFC_FORMAT_R16_UNORM							0x000000ee
-#define   NV50_2D_SIFC_FORMAT_R16_SNORM							0x000000ef
-#define   NV50_2D_SIFC_FORMAT_R8_UNORM							0x000000f3
-#define   NV50_2D_SIFC_FORMAT_R32_BOOLEAN						0x000000f6
-#define   NV50_2D_SIFC_FORMAT_A8_UNORM							0x000000f7
-#define   NV50_2D_SIFC_FORMAT_X1B5G5R5_UNORM						0x000000f8
-#define   NV50_2D_SIFC_FORMAT_X8B8G8R8_UNORM						0x000000f9
-#define  NV50_2D_SIFC_WIDTH								0x00000838
-#define  NV50_2D_SIFC_HEIGHT								0x0000083c
-#define  NV50_2D_SIFC_SCALE_UNK0840							0x00000840
-#define  NV50_2D_SIFC_SCALE_UNK0844							0x00000844
-#define  NV50_2D_SIFC_SCALE_UNK0848							0x00000848
-#define  NV50_2D_SIFC_SCALE_UNK084C							0x0000084c
-#define  NV50_2D_SIFC_UNK0850								0x00000850
-#define  NV50_2D_SIFC_DST_X								0x00000854
-#define  NV50_2D_SIFC_UNK0858								0x00000858
-#define  NV50_2D_SIFC_DST_Y								0x0000085c
-#define  NV50_2D_SIFC_DATA								0x00000860
-#define  NV50_2D_BLIT_DST_X								0x000008b0
-#define  NV50_2D_BLIT_DST_Y								0x000008b4
-#define  NV50_2D_BLIT_DST_W								0x000008b8
-#define  NV50_2D_BLIT_DST_H								0x000008bc
-#define  NV50_2D_BLIT_SRC_X								0x000008d4
-#define  NV50_2D_BLIT_SRC_Y								0x000008dc
-
-
-#define NV50_MEMORY_TO_MEMORY_FORMAT							0x00005039
-
-#define  NV50_MEMORY_TO_MEMORY_FORMAT_LINEAR_IN						0x00000200
-#define  NV50_MEMORY_TO_MEMORY_FORMAT_TILING_MODE_IN					0x00000204
-#define  NV50_MEMORY_TO_MEMORY_FORMAT_TILING_PITCH_IN					0x00000208
-#define  NV50_MEMORY_TO_MEMORY_FORMAT_TILING_HEIGHT_IN					0x0000020c
-#define  NV50_MEMORY_TO_MEMORY_FORMAT_TILING_POSITION_IN				0x00000218
-#define  NV50_MEMORY_TO_MEMORY_FORMAT_LINEAR_OUT					0x0000021c
-#define  NV50_MEMORY_TO_MEMORY_FORMAT_TILING_MODE_OUT					0x00000220
-#define  NV50_MEMORY_TO_MEMORY_FORMAT_TILING_PITCH_OUT					0x00000224
-#define  NV50_MEMORY_TO_MEMORY_FORMAT_TILING_HEIGHT_OUT					0x00000228
-#define  NV50_MEMORY_TO_MEMORY_FORMAT_TILING_POSITION_OUT				0x00000234
-#define  NV50_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN_HIGH					0x00000238
-#define  NV50_MEMORY_TO_MEMORY_FORMAT_OFFSET_OUT_HIGH					0x0000023c
-#define  NV50_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN						0x0000030c
-#define  NV50_MEMORY_TO_MEMORY_FORMAT_OFFSET_OUT					0x00000310
-#define  NV50_MEMORY_TO_MEMORY_FORMAT_PITCH_IN						0x00000314
-#define  NV50_MEMORY_TO_MEMORY_FORMAT_PITCH_OUT						0x00000318
-#define  NV50_MEMORY_TO_MEMORY_FORMAT_LINE_LENGTH_IN					0x0000031c
-#define  NV50_MEMORY_TO_MEMORY_FORMAT_LINE_COUNT					0x00000320
-
-
-#define NV50TCL										0x00005097
-
-#define  NV50TCL_NOP									0x00000100
-#define  NV50TCL_NOTIFY									0x00000104
-#define  NV50TCL_DMA_NOTIFY								0x00000180
-#define  NV50TCL_DMA_UNK0(x)								(0x00000184+((x)*4))
-#define  NV50TCL_DMA_UNK0__SIZE								0x0000000b
-#define  NV50TCL_DMA_UNK1(x)								(0x000001c0+((x)*4))
-#define  NV50TCL_DMA_UNK1__SIZE								0x00000008
-#define  NV50TCL_RT_ADDRESS_HIGH(x)							(0x00000200+((x)*32))
-#define  NV50TCL_RT_ADDRESS_HIGH__SIZE							0x00000008
-#define  NV50TCL_RT_ADDRESS_LOW(x)							(0x00000204+((x)*32))
-#define  NV50TCL_RT_ADDRESS_LOW__SIZE							0x00000008
-#define  NV50TCL_RT_FORMAT(x)								(0x00000208+((x)*32))
-#define  NV50TCL_RT_FORMAT__SIZE							0x00000008
-#define   NV50TCL_RT_FORMAT_R32G32B32A32_FLOAT						0x000000c0
-#define   NV50TCL_RT_FORMAT_R32G32B32_FLOAT						0x000000c3
-#define   NV50TCL_RT_FORMAT_R16G16B16A16_UNORM						0x000000c6
-#define   NV50TCL_RT_FORMAT_R16G16B16A16_SNORM						0x000000c7
-#define   NV50TCL_RT_FORMAT_R16G16B16A16_FLOAT						0x000000ca
-#define   NV50TCL_RT_FORMAT_R32G32_FLOAT						0x000000cb
-#define   NV50TCL_RT_FORMAT_R16G16B16X16_FLOAT						0x000000ce
-#define   NV50TCL_RT_FORMAT_A8R8G8B8_UNORM						0x000000cf
-#define   NV50TCL_RT_FORMAT_A2B10G10R10_UNORM						0x000000d1
-#define   NV50TCL_RT_FORMAT_A8B8G8R8_UNORM						0x000000d6
-#define   NV50TCL_RT_FORMAT_A8B8G8R8_SNORM						0x000000d7
-#define   NV50TCL_RT_FORMAT_R16G16_UNORM						0x000000da
-#define   NV50TCL_RT_FORMAT_R16G16_SNORM						0x000000db
-#define   NV50TCL_RT_FORMAT_R16G16_FLOAT						0x000000de
-#define   NV50TCL_RT_FORMAT_A2R10G10B10_UNORM						0x000000df
-#define   NV50TCL_RT_FORMAT_B10G11R11_FLOAT						0x000000e0
-#define   NV50TCL_RT_FORMAT_R32_FLOAT							0x000000e5
-#define   NV50TCL_RT_FORMAT_X8R8G8B8_UNORM						0x000000e6
-#define   NV50TCL_RT_FORMAT_R5G6B5_UNORM						0x000000e8
-#define   NV50TCL_RT_FORMAT_R16_FLOAT							0x000000e9
-#define   NV50TCL_RT_FORMAT_R8G8_UNORM							0x000000ea
-#define   NV50TCL_RT_FORMAT_R8G8_SNORM							0x000000eb
-#define   NV50TCL_RT_FORMAT_R16_UNORM							0x000000ee
-#define   NV50TCL_RT_FORMAT_R16_SNORM							0x000000ef
-#define   NV50TCL_RT_FORMAT_R8_UNORM							0x000000f3
-#define   NV50TCL_RT_FORMAT_R32_BOOLEAN							0x000000f6
-#define   NV50TCL_RT_FORMAT_A8_UNORM							0x000000f7
-#define   NV50TCL_RT_FORMAT_X1B5G5R5_UNORM						0x000000f8
-#define   NV50TCL_RT_FORMAT_X8B8G8R8_UNORM						0x000000f9
-#define  NV50TCL_RT_TILE_MODE(x)							(0x0000020c+((x)*32))
-#define  NV50TCL_RT_TILE_MODE__SIZE							0x00000008
-#define  NV50TCL_RT_UNK4(x)								(0x00000210+((x)*32))
-#define  NV50TCL_RT_UNK4__SIZE								0x00000008
-#define  NV50TCL_VTX_ATTR_1F(x)								(0x00000300+((x)*4))
-#define  NV50TCL_VTX_ATTR_1F__SIZE							0x00000010
-#define  NV50TCL_VTX_ATTR_2F_X(x)							(0x00000380+((x)*8))
-#define  NV50TCL_VTX_ATTR_2F_X__SIZE							0x00000010
-#define  NV50TCL_VTX_ATTR_2F_Y(x)							(0x00000384+((x)*8))
-#define  NV50TCL_VTX_ATTR_2F_Y__SIZE							0x00000010
-#define  NV50TCL_VTX_ATTR_3F_X(x)							(0x00000400+((x)*16))
-#define  NV50TCL_VTX_ATTR_3F_X__SIZE							0x00000010
-#define  NV50TCL_VTX_ATTR_3F_Y(x)							(0x00000404+((x)*16))
-#define  NV50TCL_VTX_ATTR_3F_Y__SIZE							0x00000010
-#define  NV50TCL_VTX_ATTR_3F_Z(x)							(0x00000408+((x)*16))
-#define  NV50TCL_VTX_ATTR_3F_Z__SIZE							0x00000010
-#define  NV50TCL_VTX_ATTR_3F_W(x)							(0x0000040c+((x)*16))
-#define  NV50TCL_VTX_ATTR_3F_W__SIZE							0x00000010
-#define  NV50TCL_VTX_ATTR_4F_X(x)							(0x00000500+((x)*16))
-#define  NV50TCL_VTX_ATTR_4F_X__SIZE							0x00000010
-#define  NV50TCL_VTX_ATTR_4F_Y(x)							(0x00000504+((x)*16))
-#define  NV50TCL_VTX_ATTR_4F_Y__SIZE							0x00000010
-#define  NV50TCL_VTX_ATTR_4F_Z(x)							(0x00000508+((x)*16))
-#define  NV50TCL_VTX_ATTR_4F_Z__SIZE							0x00000010
-#define  NV50TCL_VTX_ATTR_4F_W(x)							(0x0000050c+((x)*16))
-#define  NV50TCL_VTX_ATTR_4F_W__SIZE							0x00000010
-#define  NV50TCL_VTX_ATTR_2I(x)								(0x00000680+((x)*4))
-#define  NV50TCL_VTX_ATTR_2I__SIZE							0x00000010
-#define   NV50TCL_VTX_ATTR_2I_X_SHIFT							0
-#define   NV50TCL_VTX_ATTR_2I_X_MASK							0x0000ffff
-#define   NV50TCL_VTX_ATTR_2I_Y_SHIFT							16
-#define   NV50TCL_VTX_ATTR_2I_Y_MASK							0xffff0000
-#define  NV50TCL_VTX_ATTR_4I_0(x)							(0x00000700+((x)*8))
-#define  NV50TCL_VTX_ATTR_4I_0__SIZE							0x00000010
-#define   NV50TCL_VTX_ATTR_4I_0_X_SHIFT							0
-#define   NV50TCL_VTX_ATTR_4I_0_X_MASK							0x0000ffff
-#define   NV50TCL_VTX_ATTR_4I_0_Y_SHIFT							16
-#define   NV50TCL_VTX_ATTR_4I_0_Y_MASK							0xffff0000
-#define  NV50TCL_VTX_ATTR_4I_1(x)							(0x00000704+((x)*8))
-#define  NV50TCL_VTX_ATTR_4I_1__SIZE							0x00000010
-#define   NV50TCL_VTX_ATTR_4I_1_Z_SHIFT							0
-#define   NV50TCL_VTX_ATTR_4I_1_Z_MASK							0x0000ffff
-#define   NV50TCL_VTX_ATTR_4I_1_W_SHIFT							16
-#define   NV50TCL_VTX_ATTR_4I_1_W_MASK							0xffff0000
-#define  NV50TCL_VTX_ATTR_4NI_0(x)							(0x00000780+((x)*8))
-#define  NV50TCL_VTX_ATTR_4NI_0__SIZE							0x00000010
-#define   NV50TCL_VTX_ATTR_4NI_0_X_SHIFT						0
-#define   NV50TCL_VTX_ATTR_4NI_0_X_MASK							0x0000ffff
-#define   NV50TCL_VTX_ATTR_4NI_0_Y_SHIFT						16
-#define   NV50TCL_VTX_ATTR_4NI_0_Y_MASK							0xffff0000
-#define  NV50TCL_VTX_ATTR_4NI_1(x)							(0x00000784+((x)*8))
-#define  NV50TCL_VTX_ATTR_4NI_1__SIZE							0x00000010
-#define   NV50TCL_VTX_ATTR_4NI_1_Z_SHIFT						0
-#define   NV50TCL_VTX_ATTR_4NI_1_Z_MASK							0x0000ffff
-#define   NV50TCL_VTX_ATTR_4NI_1_W_SHIFT						16
-#define   NV50TCL_VTX_ATTR_4NI_1_W_MASK							0xffff0000
-#define  NV50TCL_VERTEX_ARRAY_FORMAT(x)							(0x00000900+((x)*16))
-#define  NV50TCL_VERTEX_ARRAY_FORMAT__SIZE						0x00000010
-#define   NV50TCL_VERTEX_ARRAY_FORMAT_STRIDE_SHIFT					0
-#define   NV50TCL_VERTEX_ARRAY_FORMAT_STRIDE_MASK					0x000000ff
-#define  NV50TCL_UNK0904_OFFSET_HIGH(x)							(0x00000904+((x)*16))
-#define  NV50TCL_UNK0904_OFFSET_HIGH__SIZE						0x00000010
-#define  NV50TCL_UNK0904_OFFSET_LOW(x)							(0x00000908+((x)*16))
-#define  NV50TCL_UNK0904_OFFSET_LOW__SIZE						0x00000010
-#define  NV50TCL_VIEWPORT_SCALE(x)							(0x00000a00+((x)*4))
-#define  NV50TCL_VIEWPORT_SCALE__SIZE							0x00000003
-#define  NV50TCL_VIEWPORT_TRANSLATE(x)							(0x00000a0c+((x)*4))
-#define  NV50TCL_VIEWPORT_TRANSLATE__SIZE						0x00000003
-#define  NV50TCL_VIEWPORT_HORIZ								0x00000c00
-#define   NV50TCL_VIEWPORT_HORIZ_X_SHIFT						0
-#define   NV50TCL_VIEWPORT_HORIZ_X_MASK							0x0000ffff
-#define   NV50TCL_VIEWPORT_HORIZ_W_SHIFT						16
-#define   NV50TCL_VIEWPORT_HORIZ_W_MASK							0xffff0000
-#define  NV50TCL_VIEWPORT_VERT								0x00000c04
-#define   NV50TCL_VIEWPORT_VERT_Y_SHIFT							0
-#define   NV50TCL_VIEWPORT_VERT_Y_MASK							0x0000ffff
-#define   NV50TCL_VIEWPORT_VERT_H_SHIFT							16
-#define   NV50TCL_VIEWPORT_VERT_H_MASK							0xffff0000
-#define  NV50TCL_DEPTH_RANGE_NEAR							0x00000c08
-#define  NV50TCL_DEPTH_RANGE_FAR							0x00000c0c
-#define  NV50TCL_VIEWPORT_CLIP_HORIZ(x)							(0x00000d00+((x)*8))
-#define  NV50TCL_VIEWPORT_CLIP_HORIZ__SIZE						0x00000008
-#define  NV50TCL_VIEWPORT_CLIP_VERT(x)							(0x00000d04+((x)*8))
-#define  NV50TCL_VIEWPORT_CLIP_VERT__SIZE						0x00000008
-#define  NV50TCL_VERTEX_BUFFER_FIRST							0x00000d74
-#define  NV50TCL_VERTEX_BUFFER_COUNT							0x00000d78
-#define  NV50TCL_CLEAR_COLOR(x)								(0x00000d80+((x)*4))
-#define  NV50TCL_CLEAR_COLOR__SIZE							0x00000004
-#define  NV50TCL_CLEAR_DEPTH								0x00000d90
-#define  NV50TCL_CLEAR_STENCIL								0x00000da0
-#define  NV50TCL_STRMOUT_UNK0DA8							0x00000da8
-#define  NV50TCL_POLYGON_MODE_FRONT							0x00000dac
-#define   NV50TCL_POLYGON_MODE_FRONT_POINT						0x00001b00
-#define   NV50TCL_POLYGON_MODE_FRONT_LINE						0x00001b01
-#define   NV50TCL_POLYGON_MODE_FRONT_FILL						0x00001b02
-#define  NV50TCL_POLYGON_MODE_BACK							0x00000db0
-#define   NV50TCL_POLYGON_MODE_BACK_POINT						0x00001b00
-#define   NV50TCL_POLYGON_MODE_BACK_LINE						0x00001b01
-#define   NV50TCL_POLYGON_MODE_BACK_FILL						0x00001b02
-#define  NV50TCL_POLYGON_SMOOTH_ENABLE							0x00000db4
-#define  NV50TCL_POLYGON_OFFSET_POINT_ENABLE						0x00000dc0
-#define  NV50TCL_POLYGON_OFFSET_LINE_ENABLE						0x00000dc4
-#define  NV50TCL_POLYGON_OFFSET_FILL_ENABLE						0x00000dc8
-#define  NV50TCL_WINDOW_LEFT								0x00000df8
-#define  NV50TCL_WINDOW_BOTTOM								0x00000dfc
-#define  NV50TCL_SCISSOR_ENABLE								0x00000e00
-#define  NV50TCL_SCISSOR_HORIZ								0x00000e04
-#define   NV50TCL_SCISSOR_HORIZ_L_SHIFT							0
-#define   NV50TCL_SCISSOR_HORIZ_L_MASK							0x0000ffff
-#define   NV50TCL_SCISSOR_HORIZ_R_SHIFT							16
-#define   NV50TCL_SCISSOR_HORIZ_R_MASK							0xffff0000
-#define  NV50TCL_SCISSOR_VERT								0x00000e08
-#define   NV50TCL_SCISSOR_VERT_B_SHIFT							0
-#define   NV50TCL_SCISSOR_VERT_B_MASK							0x0000ffff
-#define   NV50TCL_SCISSOR_VERT_T_SHIFT							16
-#define   NV50TCL_SCISSOR_VERT_T_MASK							0xffff0000
-#define  NV50TCL_CB_ADDR								0x00000f00
-#define   NV50TCL_CB_ADDR_ID_SHIFT							8
-#define   NV50TCL_CB_ADDR_ID_MASK							0xffffff00
-#define   NV50TCL_CB_ADDR_BUFFER_SHIFT							0
-#define   NV50TCL_CB_ADDR_BUFFER_MASK							0x000000ff
-#define  NV50TCL_CB_DATA(x)								(0x00000f04+((x)*4))
-#define  NV50TCL_CB_DATA__SIZE								0x00000010
-#define  NV50TCL_STENCIL_FRONT_FUNC_REF							0x00000f54
-#define  NV50TCL_STENCIL_FRONT_MASK							0x00000f58
-#define  NV50TCL_STENCIL_FRONT_FUNC_MASK						0x00000f5c
-#define  NV50TCL_GP_ADDRESS_HIGH							0x00000f70
-#define  NV50TCL_GP_ADDRESS_LOW								0x00000f74
-#define  NV50TCL_VP_ADDRESS_HIGH							0x00000f7c
-#define  NV50TCL_VP_ADDRESS_LOW								0x00000f80
-#define  NV50TCL_UNK0F84_ADDRESS_HIGH							0x00000f84
-#define  NV50TCL_UNK0F84_ADDRESS_LOW							0x00000f88
-#define  NV50TCL_DEPTH_BOUNDS(x)							(0x00000f9c+((x)*4))
-#define  NV50TCL_DEPTH_BOUNDS__SIZE							0x00000002
-#define  NV50TCL_FP_ADDRESS_HIGH							0x00000fa4
-#define  NV50TCL_FP_ADDRESS_LOW								0x00000fa8
-#define  NV50TCL_MSAA_MASK(x)								(0x00000fbc+((x)*4))
-#define  NV50TCL_MSAA_MASK__SIZE							0x00000004
-#define  NV50TCL_ZETA_ADDRESS_HIGH							0x00000fe0
-#define  NV50TCL_ZETA_ADDRESS_LOW							0x00000fe4
-#define  NV50TCL_ZETA_FORMAT								0x00000fe8
-#define   NV50TCL_ZETA_FORMAT_Z32_FLOAT							0x0000000a
-#define   NV50TCL_ZETA_FORMAT_Z24S8_UNORM						0x00000014
-#define   NV50TCL_ZETA_FORMAT_X8Z24_UNORM						0x00000015
-#define   NV50TCL_ZETA_FORMAT_S8Z24_UNORM						0x00000016
-#define   NV50TCL_ZETA_FORMAT_Z32_FLOAT_X24S8_UNORM					0x00000019
-#define  NV50TCL_ZETA_TILE_MODE								0x00000fec
-#define  NV50TCL_ZETA_UNK								0x00000ff0
-#define  NV50TCL_SCREEN_SCISSOR_HORIZ							0x00000ff4
-#define   NV50TCL_SCREEN_SCISSOR_HORIZ_W_SHIFT						16
-#define   NV50TCL_SCREEN_SCISSOR_HORIZ_W_MASK						0xffff0000
-#define   NV50TCL_SCREEN_SCISSOR_HORIZ_X_SHIFT						0
-#define   NV50TCL_SCREEN_SCISSOR_HORIZ_X_MASK						0x0000ffff
-#define  NV50TCL_SCREEN_SCISSOR_VERT							0x00000ff8
-#define   NV50TCL_SCREEN_SCISSOR_VERT_H_SHIFT						16
-#define   NV50TCL_SCREEN_SCISSOR_VERT_H_MASK						0xffff0000
-#define   NV50TCL_SCREEN_SCISSOR_VERT_Y_SHIFT						0
-#define   NV50TCL_SCREEN_SCISSOR_VERT_Y_MASK						0x0000ffff
-#define  NV50TCL_UNK1080_OFFSET_HIGH(x)							(0x00001080+((x)*8))
-#define  NV50TCL_UNK1080_OFFSET_HIGH__SIZE						0x00000010
-#define  NV50TCL_UNK1080_OFFSET_LOW(x)							(0x00001084+((x)*8))
-#define  NV50TCL_UNK1080_OFFSET_LOW__SIZE						0x00000010
-#define  NV50TCL_ZETA_HORIZ								0x00001228
-#define  NV50TCL_ZETA_VERT								0x0000122c
-#define  NV50TCL_RT_HORIZ(x)								(0x00001240+((x)*8))
-#define  NV50TCL_RT_HORIZ__SIZE								0x00000008
-#define  NV50TCL_RT_VERT(x)								(0x00001244+((x)*8))
-#define  NV50TCL_RT_VERT__SIZE								0x00000008
-#define  NV50TCL_CB_DEF_ADDRESS_HIGH							0x00001280
-#define  NV50TCL_CB_DEF_ADDRESS_LOW							0x00001284
-#define  NV50TCL_CB_DEF_SET								0x00001288
-#define   NV50TCL_CB_DEF_SET_SIZE_SHIFT							0
-#define   NV50TCL_CB_DEF_SET_SIZE_MASK							0x0000ffff
-#define   NV50TCL_CB_DEF_SET_BUFFER_SHIFT						16
-#define   NV50TCL_CB_DEF_SET_BUFFER_MASK						0xffff0000
-#define  NV50TCL_STRMOUT_BUFFERS_CTRL							0x00001294
-#define   NV50TCL_STRMOUT_BUFFERS_CTRL_INTERLEAVED					(1 <<  0)
-#define   NV50TCL_STRMOUT_BUFFERS_CTRL_SEPARATE_SHIFT					4
-#define   NV50TCL_STRMOUT_BUFFERS_CTRL_SEPARATE_MASK					0x000000f0
-#define   NV50TCL_STRMOUT_BUFFERS_CTRL_STRIDE_SHIFT					8
-#define   NV50TCL_STRMOUT_BUFFERS_CTRL_STRIDE_MASK					0x0000ff00
-#define  NV50TCL_FP_RESULT_COUNT							0x00001298
-#define  NV50TCL_DEPTH_TEST_ENABLE							0x000012cc
-#define  NV50TCL_SHADE_MODEL								0x000012d4
-#define   NV50TCL_SHADE_MODEL_FLAT							0x00001d00
-#define   NV50TCL_SHADE_MODEL_SMOOTH							0x00001d01
-#define  NV50TCL_DEPTH_WRITE_ENABLE							0x000012e8
-#define  NV50TCL_ALPHA_TEST_ENABLE							0x000012ec
-#define  NV50TCL_DEPTH_TEST_FUNC							0x0000130c
-#define   NV50TCL_DEPTH_TEST_FUNC_NEVER							0x00000200
-#define   NV50TCL_DEPTH_TEST_FUNC_LESS							0x00000201
-#define   NV50TCL_DEPTH_TEST_FUNC_EQUAL							0x00000202
-#define   NV50TCL_DEPTH_TEST_FUNC_LEQUAL						0x00000203
-#define   NV50TCL_DEPTH_TEST_FUNC_GREATER						0x00000204
-#define   NV50TCL_DEPTH_TEST_FUNC_GREATER						0x00000204
-#define   NV50TCL_DEPTH_TEST_FUNC_NOTEQUAL						0x00000205
-#define   NV50TCL_DEPTH_TEST_FUNC_GEQUAL						0x00000206
-#define   NV50TCL_DEPTH_TEST_FUNC_ALWAYS						0x00000207
-#define  NV50TCL_ALPHA_TEST_REF								0x00001310
-#define  NV50TCL_ALPHA_TEST_FUNC							0x00001314
-#define   NV50TCL_ALPHA_TEST_FUNC_NEVER							0x00000200
-#define   NV50TCL_ALPHA_TEST_FUNC_LESS							0x00000201
-#define   NV50TCL_ALPHA_TEST_FUNC_EQUAL							0x00000202
-#define   NV50TCL_ALPHA_TEST_FUNC_LEQUAL						0x00000203
-#define   NV50TCL_ALPHA_TEST_FUNC_GREATER						0x00000204
-#define   NV50TCL_ALPHA_TEST_FUNC_GREATER						0x00000204
-#define   NV50TCL_ALPHA_TEST_FUNC_NOTEQUAL						0x00000205
-#define   NV50TCL_ALPHA_TEST_FUNC_GEQUAL						0x00000206
-#define   NV50TCL_ALPHA_TEST_FUNC_ALWAYS						0x00000207
-#define  NV50TCL_BLEND_COLOR(x)								(0x0000131c+((x)*4))
-#define  NV50TCL_BLEND_COLOR__SIZE							0x00000004
-#define  NV50TCL_BLEND_EQUATION_RGB							0x00001340
-#define   NV50TCL_BLEND_EQUATION_RGB_FUNC_ADD						0x00008006
-#define   NV50TCL_BLEND_EQUATION_RGB_MIN						0x00008007
-#define   NV50TCL_BLEND_EQUATION_RGB_MAX						0x00008008
-#define   NV50TCL_BLEND_EQUATION_RGB_FUNC_SUBTRACT					0x0000800a
-#define   NV50TCL_BLEND_EQUATION_RGB_FUNC_REVERSE_SUBTRACT				0x0000800b
-#define  NV50TCL_BLEND_FUNC_SRC_RGB							0x00001344
-#define   NV50TCL_BLEND_FUNC_SRC_RGB_ZERO						0x00000000
-#define   NV50TCL_BLEND_FUNC_SRC_RGB_ONE						0x00000001
-#define   NV50TCL_BLEND_FUNC_SRC_RGB_SRC_COLOR						0x00000300
-#define   NV50TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_SRC_COLOR				0x00000301
-#define   NV50TCL_BLEND_FUNC_SRC_RGB_SRC_ALPHA						0x00000302
-#define   NV50TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_SRC_ALPHA				0x00000303
-#define   NV50TCL_BLEND_FUNC_SRC_RGB_DST_ALPHA						0x00000304
-#define   NV50TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_DST_ALPHA				0x00000305
-#define   NV50TCL_BLEND_FUNC_SRC_RGB_DST_COLOR						0x00000306
-#define   NV50TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_DST_COLOR				0x00000307
-#define   NV50TCL_BLEND_FUNC_SRC_RGB_SRC_ALPHA_SATURATE					0x00000308
-#define   NV50TCL_BLEND_FUNC_SRC_RGB_CONSTANT_COLOR					0x00008001
-#define   NV50TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_CONSTANT_COLOR				0x00008002
-#define   NV50TCL_BLEND_FUNC_SRC_RGB_CONSTANT_ALPHA					0x00008003
-#define   NV50TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_CONSTANT_ALPHA				0x00008004
-#define  NV50TCL_BLEND_FUNC_DST_RGB							0x00001348
-#define   NV50TCL_BLEND_FUNC_DST_RGB_ZERO						0x00000000
-#define   NV50TCL_BLEND_FUNC_DST_RGB_ONE						0x00000001
-#define   NV50TCL_BLEND_FUNC_DST_RGB_SRC_COLOR						0x00000300
-#define   NV50TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_SRC_COLOR				0x00000301
-#define   NV50TCL_BLEND_FUNC_DST_RGB_SRC_ALPHA						0x00000302
-#define   NV50TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_SRC_ALPHA				0x00000303
-#define   NV50TCL_BLEND_FUNC_DST_RGB_DST_ALPHA						0x00000304
-#define   NV50TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_DST_ALPHA				0x00000305
-#define   NV50TCL_BLEND_FUNC_DST_RGB_DST_COLOR						0x00000306
-#define   NV50TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_DST_COLOR				0x00000307
-#define   NV50TCL_BLEND_FUNC_DST_RGB_SRC_ALPHA_SATURATE					0x00000308
-#define   NV50TCL_BLEND_FUNC_DST_RGB_CONSTANT_COLOR					0x00008001
-#define   NV50TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_CONSTANT_COLOR				0x00008002
-#define   NV50TCL_BLEND_FUNC_DST_RGB_CONSTANT_ALPHA					0x00008003
-#define   NV50TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_CONSTANT_ALPHA				0x00008004
-#define  NV50TCL_BLEND_EQUATION_ALPHA							0x0000134c
-#define   NV50TCL_BLEND_EQUATION_ALPHA_FUNC_ADD						0x00008006
-#define   NV50TCL_BLEND_EQUATION_ALPHA_MIN						0x00008007
-#define   NV50TCL_BLEND_EQUATION_ALPHA_MAX						0x00008008
-#define   NV50TCL_BLEND_EQUATION_ALPHA_FUNC_SUBTRACT					0x0000800a
-#define   NV50TCL_BLEND_EQUATION_ALPHA_FUNC_REVERSE_SUBTRACT				0x0000800b
-#define  NV50TCL_BLEND_FUNC_SRC_ALPHA							0x00001350
-#define   NV50TCL_BLEND_FUNC_SRC_ALPHA_ZERO						0x00000000
-#define   NV50TCL_BLEND_FUNC_SRC_ALPHA_ONE						0x00000001
-#define   NV50TCL_BLEND_FUNC_SRC_ALPHA_SRC_COLOR					0x00000300
-#define   NV50TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_SRC_COLOR				0x00000301
-#define   NV50TCL_BLEND_FUNC_SRC_ALPHA_SRC_ALPHA					0x00000302
-#define   NV50TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_SRC_ALPHA				0x00000303
-#define   NV50TCL_BLEND_FUNC_SRC_ALPHA_DST_ALPHA					0x00000304
-#define   NV50TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_DST_ALPHA				0x00000305
-#define   NV50TCL_BLEND_FUNC_SRC_ALPHA_DST_COLOR					0x00000306
-#define   NV50TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_DST_COLOR				0x00000307
-#define   NV50TCL_BLEND_FUNC_SRC_ALPHA_SRC_ALPHA_SATURATE				0x00000308
-#define   NV50TCL_BLEND_FUNC_SRC_ALPHA_CONSTANT_COLOR					0x00008001
-#define   NV50TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_CONSTANT_COLOR				0x00008002
-#define   NV50TCL_BLEND_FUNC_SRC_ALPHA_CONSTANT_ALPHA					0x00008003
-#define   NV50TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_CONSTANT_ALPHA				0x00008004
-#define  NV50TCL_BLEND_FUNC_DST_ALPHA							0x00001358
-#define   NV50TCL_BLEND_FUNC_DST_ALPHA_ZERO						0x00000000
-#define   NV50TCL_BLEND_FUNC_DST_ALPHA_ONE						0x00000001
-#define   NV50TCL_BLEND_FUNC_DST_ALPHA_SRC_COLOR					0x00000300
-#define   NV50TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_SRC_COLOR				0x00000301
-#define   NV50TCL_BLEND_FUNC_DST_ALPHA_SRC_ALPHA					0x00000302
-#define   NV50TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_SRC_ALPHA				0x00000303
-#define   NV50TCL_BLEND_FUNC_DST_ALPHA_DST_ALPHA					0x00000304
-#define   NV50TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_DST_ALPHA				0x00000305
-#define   NV50TCL_BLEND_FUNC_DST_ALPHA_DST_COLOR					0x00000306
-#define   NV50TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_DST_COLOR				0x00000307
-#define   NV50TCL_BLEND_FUNC_DST_ALPHA_SRC_ALPHA_SATURATE				0x00000308
-#define   NV50TCL_BLEND_FUNC_DST_ALPHA_CONSTANT_COLOR					0x00008001
-#define   NV50TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_CONSTANT_COLOR				0x00008002
-#define   NV50TCL_BLEND_FUNC_DST_ALPHA_CONSTANT_ALPHA					0x00008003
-#define   NV50TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_CONSTANT_ALPHA				0x00008004
-#define  NV50TCL_BLEND_ENABLE(x)							(0x00001360+((x)*4))
-#define  NV50TCL_BLEND_ENABLE__SIZE							0x00000008
-#define  NV50TCL_STENCIL_BACK_ENABLE							0x00001380
-#define  NV50TCL_STENCIL_BACK_OP_FAIL							0x00001384
-#define   NV50TCL_STENCIL_BACK_OP_FAIL_ZERO						0x00000000
-#define   NV50TCL_STENCIL_BACK_OP_FAIL_INVERT						0x0000150a
-#define   NV50TCL_STENCIL_BACK_OP_FAIL_KEEP						0x00001e00
-#define   NV50TCL_STENCIL_BACK_OP_FAIL_REPLACE						0x00001e01
-#define   NV50TCL_STENCIL_BACK_OP_FAIL_INCR						0x00001e02
-#define   NV50TCL_STENCIL_BACK_OP_FAIL_DECR						0x00001e03
-#define   NV50TCL_STENCIL_BACK_OP_FAIL_INCR_WRAP					0x00008507
-#define   NV50TCL_STENCIL_BACK_OP_FAIL_DECR_WRAP					0x00008508
-#define  NV50TCL_STENCIL_BACK_OP_ZFAIL							0x00001388
-#define   NV50TCL_STENCIL_BACK_OP_ZFAIL_ZERO						0x00000000
-#define   NV50TCL_STENCIL_BACK_OP_ZFAIL_INVERT						0x0000150a
-#define   NV50TCL_STENCIL_BACK_OP_ZFAIL_KEEP						0x00001e00
-#define   NV50TCL_STENCIL_BACK_OP_ZFAIL_REPLACE						0x00001e01
-#define   NV50TCL_STENCIL_BACK_OP_ZFAIL_INCR						0x00001e02
-#define   NV50TCL_STENCIL_BACK_OP_ZFAIL_DECR						0x00001e03
-#define   NV50TCL_STENCIL_BACK_OP_ZFAIL_INCR_WRAP					0x00008507
-#define   NV50TCL_STENCIL_BACK_OP_ZFAIL_DECR_WRAP					0x00008508
-#define  NV50TCL_STENCIL_BACK_OP_ZPASS							0x0000138c
-#define   NV50TCL_STENCIL_BACK_OP_ZPASS_ZERO						0x00000000
-#define   NV50TCL_STENCIL_BACK_OP_ZPASS_INVERT						0x0000150a
-#define   NV50TCL_STENCIL_BACK_OP_ZPASS_KEEP						0x00001e00
-#define   NV50TCL_STENCIL_BACK_OP_ZPASS_REPLACE						0x00001e01
-#define   NV50TCL_STENCIL_BACK_OP_ZPASS_INCR						0x00001e02
-#define   NV50TCL_STENCIL_BACK_OP_ZPASS_DECR						0x00001e03
-#define   NV50TCL_STENCIL_BACK_OP_ZPASS_INCR_WRAP					0x00008507
-#define   NV50TCL_STENCIL_BACK_OP_ZPASS_DECR_WRAP					0x00008508
-#define  NV50TCL_STENCIL_BACK_FUNC_FUNC							0x00001390
-#define   NV50TCL_STENCIL_BACK_FUNC_FUNC_NEVER						0x00000200
-#define   NV50TCL_STENCIL_BACK_FUNC_FUNC_LESS						0x00000201
-#define   NV50TCL_STENCIL_BACK_FUNC_FUNC_EQUAL						0x00000202
-#define   NV50TCL_STENCIL_BACK_FUNC_FUNC_LEQUAL						0x00000203
-#define   NV50TCL_STENCIL_BACK_FUNC_FUNC_GREATER					0x00000204
-#define   NV50TCL_STENCIL_BACK_FUNC_FUNC_GREATER					0x00000204
-#define   NV50TCL_STENCIL_BACK_FUNC_FUNC_NOTEQUAL					0x00000205
-#define   NV50TCL_STENCIL_BACK_FUNC_FUNC_GEQUAL						0x00000206
-#define   NV50TCL_STENCIL_BACK_FUNC_FUNC_ALWAYS						0x00000207
-#define  NV50TCL_STENCIL_BACK_FUNC_REF							0x00001394
-#define  NV50TCL_STENCIL_BACK_MASK							0x00001398
-#define  NV50TCL_STENCIL_BACK_FUNC_MASK							0x0000139c
-#define  NV50TCL_FRAG_COLOR_CLAMP_EN							0x000013a8
-#define  NV50TCL_LINE_WIDTH								0x000013b0
-#define  NV50TCL_POINT_COORD_REPLACE_MAP(x)						(0x000013c0+((x)*4))
-#define  NV50TCL_POINT_COORD_REPLACE_MAP__SIZE						0x00000008
-#define  NV50TCL_VP_START_ID								0x0000140c
-#define  NV50TCL_GP_START_ID								0x00001410
-#define  NV50TCL_FP_START_ID								0x00001414
-#define  NV50TCL_GP_VERTEX_OUTPUT_COUNT							0x00001420
-#define  NV50TCL_SET_SAMPLER_TEX							0x00001458
-#define   NV50TCL_SET_SAMPLER_TEX_SAMPLER_SHIFT						1
-#define   NV50TCL_SET_SAMPLER_TEX_SAMPLER_MASK						0x000001fe
-#define   NV50TCL_SET_SAMPLER_TEX_TIC_SHIFT						9
-#define   NV50TCL_SET_SAMPLER_TEX_TIC_MASK						0x0001fe00
-#define   NV50TCL_SET_SAMPLER_TEX_VALID							(1 <<  0)
-#define  NV50TCL_STRMOUT_MAP(x)								(0x00001480+((x)*4))
-#define  NV50TCL_STRMOUT_MAP__SIZE							0x00000020
-#define  NV50TCL_VP_CLIP_DISTANCE_ENABLE						0x00001510
-#define   NV50TCL_VP_CLIP_DISTANCE_ENABLE_0						(1 <<  0)
-#define   NV50TCL_VP_CLIP_DISTANCE_ENABLE_1						(1 <<  1)
-#define   NV50TCL_VP_CLIP_DISTANCE_ENABLE_2						(1 <<  2)
-#define   NV50TCL_VP_CLIP_DISTANCE_ENABLE_3						(1 <<  3)
-#define   NV50TCL_VP_CLIP_DISTANCE_ENABLE_4						(1 <<  4)
-#define   NV50TCL_VP_CLIP_DISTANCE_ENABLE_5						(1 <<  5)
-#define  NV50TCL_POINT_SIZE								0x00001518
-#define  NV50TCL_POINT_SPRITE_ENABLE							0x00001520
-#define  NV50TCL_MULTISAMPLE_CTRL							0x0000153c
-#define   NV50TCL_MULTISAMPLE_CTRL_ALPHA_TO_COVERAGE					(1 <<  0)
-#define   NV50TCL_MULTISAMPLE_CTRL_ALPHA_TO_ONE						(1 <<  4)
-#define  NV50TCL_TSC_ADDRESS_HIGH							0x0000155c
-#define  NV50TCL_TSC_ADDRESS_LOW							0x00001560
-#define  NV50TCL_POLYGON_OFFSET_FACTOR							0x0000156c
-#define  NV50TCL_LINE_SMOOTH_ENABLE							0x00001570
-#define  NV50TCL_TIC_ADDRESS_HIGH							0x00001574
-#define  NV50TCL_TIC_ADDRESS_LOW							0x00001578
-#define  NV50TCL_STENCIL_FRONT_ENABLE							0x00001594
-#define  NV50TCL_STENCIL_FRONT_OP_FAIL							0x00001598
-#define   NV50TCL_STENCIL_FRONT_OP_FAIL_ZERO						0x00000000
-#define   NV50TCL_STENCIL_FRONT_OP_FAIL_INVERT						0x0000150a
-#define   NV50TCL_STENCIL_FRONT_OP_FAIL_KEEP						0x00001e00
-#define   NV50TCL_STENCIL_FRONT_OP_FAIL_REPLACE						0x00001e01
-#define   NV50TCL_STENCIL_FRONT_OP_FAIL_INCR						0x00001e02
-#define   NV50TCL_STENCIL_FRONT_OP_FAIL_DECR						0x00001e03
-#define   NV50TCL_STENCIL_FRONT_OP_FAIL_INCR_WRAP					0x00008507
-#define   NV50TCL_STENCIL_FRONT_OP_FAIL_DECR_WRAP					0x00008508
-#define  NV50TCL_STENCIL_FRONT_OP_ZFAIL							0x0000159c
-#define   NV50TCL_STENCIL_FRONT_OP_ZFAIL_ZERO						0x00000000
-#define   NV50TCL_STENCIL_FRONT_OP_ZFAIL_INVERT						0x0000150a
-#define   NV50TCL_STENCIL_FRONT_OP_ZFAIL_KEEP						0x00001e00
-#define   NV50TCL_STENCIL_FRONT_OP_ZFAIL_REPLACE					0x00001e01
-#define   NV50TCL_STENCIL_FRONT_OP_ZFAIL_INCR						0x00001e02
-#define   NV50TCL_STENCIL_FRONT_OP_ZFAIL_DECR						0x00001e03
-#define   NV50TCL_STENCIL_FRONT_OP_ZFAIL_INCR_WRAP					0x00008507
-#define   NV50TCL_STENCIL_FRONT_OP_ZFAIL_DECR_WRAP					0x00008508
-#define  NV50TCL_STENCIL_FRONT_OP_ZPASS							0x000015a0
-#define   NV50TCL_STENCIL_FRONT_OP_ZPASS_ZERO						0x00000000
-#define   NV50TCL_STENCIL_FRONT_OP_ZPASS_INVERT						0x0000150a
-#define   NV50TCL_STENCIL_FRONT_OP_ZPASS_KEEP						0x00001e00
-#define   NV50TCL_STENCIL_FRONT_OP_ZPASS_REPLACE					0x00001e01
-#define   NV50TCL_STENCIL_FRONT_OP_ZPASS_INCR						0x00001e02
-#define   NV50TCL_STENCIL_FRONT_OP_ZPASS_DECR						0x00001e03
-#define   NV50TCL_STENCIL_FRONT_OP_ZPASS_INCR_WRAP					0x00008507
-#define   NV50TCL_STENCIL_FRONT_OP_ZPASS_DECR_WRAP					0x00008508
-#define  NV50TCL_STENCIL_FRONT_FUNC_FUNC						0x000015a4
-#define   NV50TCL_STENCIL_FRONT_FUNC_FUNC_NEVER						0x00000200
-#define   NV50TCL_STENCIL_FRONT_FUNC_FUNC_LESS						0x00000201
-#define   NV50TCL_STENCIL_FRONT_FUNC_FUNC_EQUAL						0x00000202
-#define   NV50TCL_STENCIL_FRONT_FUNC_FUNC_LEQUAL					0x00000203
-#define   NV50TCL_STENCIL_FRONT_FUNC_FUNC_GREATER					0x00000204
-#define   NV50TCL_STENCIL_FRONT_FUNC_FUNC_GREATER					0x00000204
-#define   NV50TCL_STENCIL_FRONT_FUNC_FUNC_NOTEQUAL					0x00000205
-#define   NV50TCL_STENCIL_FRONT_FUNC_FUNC_GEQUAL					0x00000206
-#define   NV50TCL_STENCIL_FRONT_FUNC_FUNC_ALWAYS					0x00000207
-#define  NV50TCL_POLYGON_OFFSET_UNITS							0x000015bc
-#define  NV50TCL_MULTISAMPLE_SAMPLES_LOG2						0x000015d0
-#define  NV50TCL_VERTEX_BEGIN								0x000015dc
-#define   NV50TCL_VERTEX_BEGIN_POINTS							0x00000000
-#define   NV50TCL_VERTEX_BEGIN_LINES							0x00000001
-#define   NV50TCL_VERTEX_BEGIN_LINE_LOOP						0x00000002
-#define   NV50TCL_VERTEX_BEGIN_LINE_STRIP						0x00000003
-#define   NV50TCL_VERTEX_BEGIN_TRIANGLES						0x00000004
-#define   NV50TCL_VERTEX_BEGIN_TRIANGLE_STRIP						0x00000005
-#define   NV50TCL_VERTEX_BEGIN_TRIANGLE_FAN						0x00000006
-#define   NV50TCL_VERTEX_BEGIN_QUADS							0x00000007
-#define   NV50TCL_VERTEX_BEGIN_QUAD_STRIP						0x00000008
-#define   NV50TCL_VERTEX_BEGIN_POLYGON							0x00000009
-#define   NV50TCL_VERTEX_BEGIN_LINES_ADJACENCY						0x0000000a
-#define   NV50TCL_VERTEX_BEGIN_LINE_STRIP_ADJACENCY					0x0000000b
-#define   NV50TCL_VERTEX_BEGIN_TRIANGLES_ADJACENCY					0x0000000c
-#define   NV50TCL_VERTEX_BEGIN_TRIANGLE_STRIP_ADJACENCY					0x0000000d
-#define  NV50TCL_VERTEX_END								0x000015e0
-#define  NV50TCL_VERTEX_DATA								0x00001640
-#define  NV50TCL_PRIM_RESTART_ENABLE							0x00001644
-#define  NV50TCL_PRIM_RESTART_INDEX							0x00001648
-#define  NV50TCL_VP_ATTR_EN_0								0x00001650
-#define   NV50TCL_VP_ATTR_EN_0_7_SHIFT							28
-#define   NV50TCL_VP_ATTR_EN_0_7_MASK							0xf0000000
-#define    NV50TCL_VP_ATTR_EN_0_7_NONE							0x00000000
-#define    NV50TCL_VP_ATTR_EN_0_7_XNNN							0x10000000
-#define    NV50TCL_VP_ATTR_EN_0_7_NYNN							0x20000000
-#define    NV50TCL_VP_ATTR_EN_0_7_XYNN							0x30000000
-#define    NV50TCL_VP_ATTR_EN_0_7_NNZN							0x40000000
-#define    NV50TCL_VP_ATTR_EN_0_7_XNZN							0x50000000
-#define    NV50TCL_VP_ATTR_EN_0_7_NYZN							0x60000000
-#define    NV50TCL_VP_ATTR_EN_0_7_XYZN							0x70000000
-#define    NV50TCL_VP_ATTR_EN_0_7_NNNW							0x80000000
-#define    NV50TCL_VP_ATTR_EN_0_7_XNNW							0x90000000
-#define    NV50TCL_VP_ATTR_EN_0_7_NYNW							0xa0000000
-#define    NV50TCL_VP_ATTR_EN_0_7_XYNW							0xb0000000
-#define    NV50TCL_VP_ATTR_EN_0_7_NNZW							0xc0000000
-#define    NV50TCL_VP_ATTR_EN_0_7_XNZW							0xd0000000
-#define    NV50TCL_VP_ATTR_EN_0_7_NYZW							0xe0000000
-#define    NV50TCL_VP_ATTR_EN_0_7_XYZW							0xf0000000
-#define   NV50TCL_VP_ATTR_EN_0_6_SHIFT							24
-#define   NV50TCL_VP_ATTR_EN_0_6_MASK							0x0f000000
-#define    NV50TCL_VP_ATTR_EN_0_6_NONE							0x00000000
-#define    NV50TCL_VP_ATTR_EN_0_6_XNNN							0x01000000
-#define    NV50TCL_VP_ATTR_EN_0_6_NYNN							0x02000000
-#define    NV50TCL_VP_ATTR_EN_0_6_XYNN							0x03000000
-#define    NV50TCL_VP_ATTR_EN_0_6_NNZN							0x04000000
-#define    NV50TCL_VP_ATTR_EN_0_6_XNZN							0x05000000
-#define    NV50TCL_VP_ATTR_EN_0_6_NYZN							0x06000000
-#define    NV50TCL_VP_ATTR_EN_0_6_XYZN							0x07000000
-#define    NV50TCL_VP_ATTR_EN_0_6_NNNW							0x08000000
-#define    NV50TCL_VP_ATTR_EN_0_6_XNNW							0x09000000
-#define    NV50TCL_VP_ATTR_EN_0_6_NYNW							0x0a000000
-#define    NV50TCL_VP_ATTR_EN_0_6_XYNW							0x0b000000
-#define    NV50TCL_VP_ATTR_EN_0_6_NNZW							0x0c000000
-#define    NV50TCL_VP_ATTR_EN_0_6_XNZW							0x0d000000
-#define    NV50TCL_VP_ATTR_EN_0_6_NYZW							0x0e000000
-#define    NV50TCL_VP_ATTR_EN_0_6_XYZW							0x0f000000
-#define   NV50TCL_VP_ATTR_EN_0_5_SHIFT							20
-#define   NV50TCL_VP_ATTR_EN_0_5_MASK							0x00f00000
-#define    NV50TCL_VP_ATTR_EN_0_5_NONE							0x00000000
-#define    NV50TCL_VP_ATTR_EN_0_5_XNNN							0x00100000
-#define    NV50TCL_VP_ATTR_EN_0_5_NYNN							0x00200000
-#define    NV50TCL_VP_ATTR_EN_0_5_XYNN							0x00300000
-#define    NV50TCL_VP_ATTR_EN_0_5_NNZN							0x00400000
-#define    NV50TCL_VP_ATTR_EN_0_5_XNZN							0x00500000
-#define    NV50TCL_VP_ATTR_EN_0_5_NYZN							0x00600000
-#define    NV50TCL_VP_ATTR_EN_0_5_XYZN							0x00700000
-#define    NV50TCL_VP_ATTR_EN_0_5_NNNW							0x00800000
-#define    NV50TCL_VP_ATTR_EN_0_5_XNNW							0x00900000
-#define    NV50TCL_VP_ATTR_EN_0_5_NYNW							0x00a00000
-#define    NV50TCL_VP_ATTR_EN_0_5_XYNW							0x00b00000
-#define    NV50TCL_VP_ATTR_EN_0_5_NNZW							0x00c00000
-#define    NV50TCL_VP_ATTR_EN_0_5_XNZW							0x00d00000
-#define    NV50TCL_VP_ATTR_EN_0_5_NYZW							0x00e00000
-#define    NV50TCL_VP_ATTR_EN_0_5_XYZW							0x00f00000
-#define   NV50TCL_VP_ATTR_EN_0_4_SHIFT							16
-#define   NV50TCL_VP_ATTR_EN_0_4_MASK							0x000f0000
-#define    NV50TCL_VP_ATTR_EN_0_4_NONE							0x00000000
-#define    NV50TCL_VP_ATTR_EN_0_4_XNNN							0x00010000
-#define    NV50TCL_VP_ATTR_EN_0_4_NYNN							0x00020000
-#define    NV50TCL_VP_ATTR_EN_0_4_XYNN							0x00030000
-#define    NV50TCL_VP_ATTR_EN_0_4_NNZN							0x00040000
-#define    NV50TCL_VP_ATTR_EN_0_4_XNZN							0x00050000
-#define    NV50TCL_VP_ATTR_EN_0_4_NYZN							0x00060000
-#define    NV50TCL_VP_ATTR_EN_0_4_XYZN							0x00070000
-#define    NV50TCL_VP_ATTR_EN_0_4_NNNW							0x00080000
-#define    NV50TCL_VP_ATTR_EN_0_4_XNNW							0x00090000
-#define    NV50TCL_VP_ATTR_EN_0_4_NYNW							0x000a0000
-#define    NV50TCL_VP_ATTR_EN_0_4_XYNW							0x000b0000
-#define    NV50TCL_VP_ATTR_EN_0_4_NNZW							0x000c0000
-#define    NV50TCL_VP_ATTR_EN_0_4_XNZW							0x000d0000
-#define    NV50TCL_VP_ATTR_EN_0_4_NYZW							0x000e0000
-#define    NV50TCL_VP_ATTR_EN_0_4_XYZW							0x000f0000
-#define   NV50TCL_VP_ATTR_EN_0_3_SHIFT							12
-#define   NV50TCL_VP_ATTR_EN_0_3_MASK							0x0000f000
-#define    NV50TCL_VP_ATTR_EN_0_3_NONE							0x00000000
-#define    NV50TCL_VP_ATTR_EN_0_3_XNNN							0x00001000
-#define    NV50TCL_VP_ATTR_EN_0_3_NYNN							0x00002000
-#define    NV50TCL_VP_ATTR_EN_0_3_XYNN							0x00003000
-#define    NV50TCL_VP_ATTR_EN_0_3_NNZN							0x00004000
-#define    NV50TCL_VP_ATTR_EN_0_3_XNZN							0x00005000
-#define    NV50TCL_VP_ATTR_EN_0_3_NYZN							0x00006000
-#define    NV50TCL_VP_ATTR_EN_0_3_XYZN							0x00007000
-#define    NV50TCL_VP_ATTR_EN_0_3_NNNW							0x00008000
-#define    NV50TCL_VP_ATTR_EN_0_3_XNNW							0x00009000
-#define    NV50TCL_VP_ATTR_EN_0_3_NYNW							0x0000a000
-#define    NV50TCL_VP_ATTR_EN_0_3_XYNW							0x0000b000
-#define    NV50TCL_VP_ATTR_EN_0_3_NNZW							0x0000c000
-#define    NV50TCL_VP_ATTR_EN_0_3_XNZW							0x0000d000
-#define    NV50TCL_VP_ATTR_EN_0_3_NYZW							0x0000e000
-#define    NV50TCL_VP_ATTR_EN_0_3_XYZW							0x0000f000
-#define   NV50TCL_VP_ATTR_EN_0_2_SHIFT							8
-#define   NV50TCL_VP_ATTR_EN_0_2_MASK							0x00000f00
-#define    NV50TCL_VP_ATTR_EN_0_2_NONE							0x00000000
-#define    NV50TCL_VP_ATTR_EN_0_2_XNNN							0x00000100
-#define    NV50TCL_VP_ATTR_EN_0_2_NYNN							0x00000200
-#define    NV50TCL_VP_ATTR_EN_0_2_XYNN							0x00000300
-#define    NV50TCL_VP_ATTR_EN_0_2_NNZN							0x00000400
-#define    NV50TCL_VP_ATTR_EN_0_2_XNZN							0x00000500
-#define    NV50TCL_VP_ATTR_EN_0_2_NYZN							0x00000600
-#define    NV50TCL_VP_ATTR_EN_0_2_XYZN							0x00000700
-#define    NV50TCL_VP_ATTR_EN_0_2_NNNW							0x00000800
-#define    NV50TCL_VP_ATTR_EN_0_2_XNNW							0x00000900
-#define    NV50TCL_VP_ATTR_EN_0_2_NYNW							0x00000a00
-#define    NV50TCL_VP_ATTR_EN_0_2_XYNW							0x00000b00
-#define    NV50TCL_VP_ATTR_EN_0_2_NNZW							0x00000c00
-#define    NV50TCL_VP_ATTR_EN_0_2_XNZW							0x00000d00
-#define    NV50TCL_VP_ATTR_EN_0_2_NYZW							0x00000e00
-#define    NV50TCL_VP_ATTR_EN_0_2_XYZW							0x00000f00
-#define   NV50TCL_VP_ATTR_EN_0_1_SHIFT							4
-#define   NV50TCL_VP_ATTR_EN_0_1_MASK							0x000000f0
-#define    NV50TCL_VP_ATTR_EN_0_1_NONE							0x00000000
-#define    NV50TCL_VP_ATTR_EN_0_1_XNNN							0x00000010
-#define    NV50TCL_VP_ATTR_EN_0_1_NYNN							0x00000020
-#define    NV50TCL_VP_ATTR_EN_0_1_XYNN							0x00000030
-#define    NV50TCL_VP_ATTR_EN_0_1_NNZN							0x00000040
-#define    NV50TCL_VP_ATTR_EN_0_1_XNZN							0x00000050
-#define    NV50TCL_VP_ATTR_EN_0_1_NYZN							0x00000060
-#define    NV50TCL_VP_ATTR_EN_0_1_XYZN							0x00000070
-#define    NV50TCL_VP_ATTR_EN_0_1_NNNW							0x00000080
-#define    NV50TCL_VP_ATTR_EN_0_1_XNNW							0x00000090
-#define    NV50TCL_VP_ATTR_EN_0_1_NYNW							0x000000a0
-#define    NV50TCL_VP_ATTR_EN_0_1_XYNW							0x000000b0
-#define    NV50TCL_VP_ATTR_EN_0_1_NNZW							0x000000c0
-#define    NV50TCL_VP_ATTR_EN_0_1_XNZW							0x000000d0
-#define    NV50TCL_VP_ATTR_EN_0_1_NYZW							0x000000e0
-#define    NV50TCL_VP_ATTR_EN_0_1_XYZW							0x000000f0
-#define   NV50TCL_VP_ATTR_EN_0_0_SHIFT							0
-#define   NV50TCL_VP_ATTR_EN_0_0_MASK							0x0000000f
-#define    NV50TCL_VP_ATTR_EN_0_0_NONE							0x00000000
-#define    NV50TCL_VP_ATTR_EN_0_0_XNNN							0x00000001
-#define    NV50TCL_VP_ATTR_EN_0_0_NYNN							0x00000002
-#define    NV50TCL_VP_ATTR_EN_0_0_XYNN							0x00000003
-#define    NV50TCL_VP_ATTR_EN_0_0_NNZN							0x00000004
-#define    NV50TCL_VP_ATTR_EN_0_0_XNZN							0x00000005
-#define    NV50TCL_VP_ATTR_EN_0_0_NYZN							0x00000006
-#define    NV50TCL_VP_ATTR_EN_0_0_XYZN							0x00000007
-#define    NV50TCL_VP_ATTR_EN_0_0_NNNW							0x00000008
-#define    NV50TCL_VP_ATTR_EN_0_0_XNNW							0x00000009
-#define    NV50TCL_VP_ATTR_EN_0_0_NYNW							0x0000000a
-#define    NV50TCL_VP_ATTR_EN_0_0_XYNW							0x0000000b
-#define    NV50TCL_VP_ATTR_EN_0_0_NNZW							0x0000000c
-#define    NV50TCL_VP_ATTR_EN_0_0_XNZW							0x0000000d
-#define    NV50TCL_VP_ATTR_EN_0_0_NYZW							0x0000000e
-#define    NV50TCL_VP_ATTR_EN_0_0_XYZW							0x0000000f
-#define  NV50TCL_VP_ATTR_EN_1								0x00001654
-#define   NV50TCL_VP_ATTR_EN_1_15_SHIFT							28
-#define   NV50TCL_VP_ATTR_EN_1_15_MASK							0xf0000000
-#define    NV50TCL_VP_ATTR_EN_1_15_NONE							0x00000000
-#define    NV50TCL_VP_ATTR_EN_1_15_XNNN							0x10000000
-#define    NV50TCL_VP_ATTR_EN_1_15_NYNN							0x20000000
-#define    NV50TCL_VP_ATTR_EN_1_15_XYNN							0x30000000
-#define    NV50TCL_VP_ATTR_EN_1_15_NNZN							0x40000000
-#define    NV50TCL_VP_ATTR_EN_1_15_XNZN							0x50000000
-#define    NV50TCL_VP_ATTR_EN_1_15_NYZN							0x60000000
-#define    NV50TCL_VP_ATTR_EN_1_15_XYZN							0x70000000
-#define    NV50TCL_VP_ATTR_EN_1_15_NNNW							0x80000000
-#define    NV50TCL_VP_ATTR_EN_1_15_XNNW							0x90000000
-#define    NV50TCL_VP_ATTR_EN_1_15_NYNW							0xa0000000
-#define    NV50TCL_VP_ATTR_EN_1_15_XYNW							0xb0000000
-#define    NV50TCL_VP_ATTR_EN_1_15_NNZW							0xc0000000
-#define    NV50TCL_VP_ATTR_EN_1_15_XNZW							0xd0000000
-#define    NV50TCL_VP_ATTR_EN_1_15_NYZW							0xe0000000
-#define    NV50TCL_VP_ATTR_EN_1_15_XYZW							0xf0000000
-#define   NV50TCL_VP_ATTR_EN_1_14_SHIFT							24
-#define   NV50TCL_VP_ATTR_EN_1_14_MASK							0x0f000000
-#define    NV50TCL_VP_ATTR_EN_1_14_NONE							0x00000000
-#define    NV50TCL_VP_ATTR_EN_1_14_XNNN							0x01000000
-#define    NV50TCL_VP_ATTR_EN_1_14_NYNN							0x02000000
-#define    NV50TCL_VP_ATTR_EN_1_14_XYNN							0x03000000
-#define    NV50TCL_VP_ATTR_EN_1_14_NNZN							0x04000000
-#define    NV50TCL_VP_ATTR_EN_1_14_XNZN							0x05000000
-#define    NV50TCL_VP_ATTR_EN_1_14_NYZN							0x06000000
-#define    NV50TCL_VP_ATTR_EN_1_14_XYZN							0x07000000
-#define    NV50TCL_VP_ATTR_EN_1_14_NNNW							0x08000000
-#define    NV50TCL_VP_ATTR_EN_1_14_XNNW							0x09000000
-#define    NV50TCL_VP_ATTR_EN_1_14_NYNW							0x0a000000
-#define    NV50TCL_VP_ATTR_EN_1_14_XYNW							0x0b000000
-#define    NV50TCL_VP_ATTR_EN_1_14_NNZW							0x0c000000
-#define    NV50TCL_VP_ATTR_EN_1_14_XNZW							0x0d000000
-#define    NV50TCL_VP_ATTR_EN_1_14_NYZW							0x0e000000
-#define    NV50TCL_VP_ATTR_EN_1_14_XYZW							0x0f000000
-#define   NV50TCL_VP_ATTR_EN_1_13_SHIFT							20
-#define   NV50TCL_VP_ATTR_EN_1_13_MASK							0x00f00000
-#define    NV50TCL_VP_ATTR_EN_1_13_NONE							0x00000000
-#define    NV50TCL_VP_ATTR_EN_1_13_XNNN							0x00100000
-#define    NV50TCL_VP_ATTR_EN_1_13_NYNN							0x00200000
-#define    NV50TCL_VP_ATTR_EN_1_13_XYNN							0x00300000
-#define    NV50TCL_VP_ATTR_EN_1_13_NNZN							0x00400000
-#define    NV50TCL_VP_ATTR_EN_1_13_XNZN							0x00500000
-#define    NV50TCL_VP_ATTR_EN_1_13_NYZN							0x00600000
-#define    NV50TCL_VP_ATTR_EN_1_13_XYZN							0x00700000
-#define    NV50TCL_VP_ATTR_EN_1_13_NNNW							0x00800000
-#define    NV50TCL_VP_ATTR_EN_1_13_XNNW							0x00900000
-#define    NV50TCL_VP_ATTR_EN_1_13_NYNW							0x00a00000
-#define    NV50TCL_VP_ATTR_EN_1_13_XYNW							0x00b00000
-#define    NV50TCL_VP_ATTR_EN_1_13_NNZW							0x00c00000
-#define    NV50TCL_VP_ATTR_EN_1_13_XNZW							0x00d00000
-#define    NV50TCL_VP_ATTR_EN_1_13_NYZW							0x00e00000
-#define    NV50TCL_VP_ATTR_EN_1_13_XYZW							0x00f00000
-#define   NV50TCL_VP_ATTR_EN_1_12_SHIFT							16
-#define   NV50TCL_VP_ATTR_EN_1_12_MASK							0x000f0000
-#define    NV50TCL_VP_ATTR_EN_1_12_NONE							0x00000000
-#define    NV50TCL_VP_ATTR_EN_1_12_XNNN							0x00010000
-#define    NV50TCL_VP_ATTR_EN_1_12_NYNN							0x00020000
-#define    NV50TCL_VP_ATTR_EN_1_12_XYNN							0x00030000
-#define    NV50TCL_VP_ATTR_EN_1_12_NNZN							0x00040000
-#define    NV50TCL_VP_ATTR_EN_1_12_XNZN							0x00050000
-#define    NV50TCL_VP_ATTR_EN_1_12_NYZN							0x00060000
-#define    NV50TCL_VP_ATTR_EN_1_12_XYZN							0x00070000
-#define    NV50TCL_VP_ATTR_EN_1_12_NNNW							0x00080000
-#define    NV50TCL_VP_ATTR_EN_1_12_XNNW							0x00090000
-#define    NV50TCL_VP_ATTR_EN_1_12_NYNW							0x000a0000
-#define    NV50TCL_VP_ATTR_EN_1_12_XYNW							0x000b0000
-#define    NV50TCL_VP_ATTR_EN_1_12_NNZW							0x000c0000
-#define    NV50TCL_VP_ATTR_EN_1_12_XNZW							0x000d0000
-#define    NV50TCL_VP_ATTR_EN_1_12_NYZW							0x000e0000
-#define    NV50TCL_VP_ATTR_EN_1_12_XYZW							0x000f0000
-#define   NV50TCL_VP_ATTR_EN_1_11_SHIFT							12
-#define   NV50TCL_VP_ATTR_EN_1_11_MASK							0x0000f000
-#define    NV50TCL_VP_ATTR_EN_1_11_NONE							0x00000000
-#define    NV50TCL_VP_ATTR_EN_1_11_XNNN							0x00001000
-#define    NV50TCL_VP_ATTR_EN_1_11_NYNN							0x00002000
-#define    NV50TCL_VP_ATTR_EN_1_11_XYNN							0x00003000
-#define    NV50TCL_VP_ATTR_EN_1_11_NNZN							0x00004000
-#define    NV50TCL_VP_ATTR_EN_1_11_XNZN							0x00005000
-#define    NV50TCL_VP_ATTR_EN_1_11_NYZN							0x00006000
-#define    NV50TCL_VP_ATTR_EN_1_11_XYZN							0x00007000
-#define    NV50TCL_VP_ATTR_EN_1_11_NNNW							0x00008000
-#define    NV50TCL_VP_ATTR_EN_1_11_XNNW							0x00009000
-#define    NV50TCL_VP_ATTR_EN_1_11_NYNW							0x0000a000
-#define    NV50TCL_VP_ATTR_EN_1_11_XYNW							0x0000b000
-#define    NV50TCL_VP_ATTR_EN_1_11_NNZW							0x0000c000
-#define    NV50TCL_VP_ATTR_EN_1_11_XNZW							0x0000d000
-#define    NV50TCL_VP_ATTR_EN_1_11_NYZW							0x0000e000
-#define    NV50TCL_VP_ATTR_EN_1_11_XYZW							0x0000f000
-#define   NV50TCL_VP_ATTR_EN_1_10_SHIFT							8
-#define   NV50TCL_VP_ATTR_EN_1_10_MASK							0x00000f00
-#define    NV50TCL_VP_ATTR_EN_1_10_NONE							0x00000000
-#define    NV50TCL_VP_ATTR_EN_1_10_XNNN							0x00000100
-#define    NV50TCL_VP_ATTR_EN_1_10_NYNN							0x00000200
-#define    NV50TCL_VP_ATTR_EN_1_10_XYNN							0x00000300
-#define    NV50TCL_VP_ATTR_EN_1_10_NNZN							0x00000400
-#define    NV50TCL_VP_ATTR_EN_1_10_XNZN							0x00000500
-#define    NV50TCL_VP_ATTR_EN_1_10_NYZN							0x00000600
-#define    NV50TCL_VP_ATTR_EN_1_10_XYZN							0x00000700
-#define    NV50TCL_VP_ATTR_EN_1_10_NNNW							0x00000800
-#define    NV50TCL_VP_ATTR_EN_1_10_XNNW							0x00000900
-#define    NV50TCL_VP_ATTR_EN_1_10_NYNW							0x00000a00
-#define    NV50TCL_VP_ATTR_EN_1_10_XYNW							0x00000b00
-#define    NV50TCL_VP_ATTR_EN_1_10_NNZW							0x00000c00
-#define    NV50TCL_VP_ATTR_EN_1_10_XNZW							0x00000d00
-#define    NV50TCL_VP_ATTR_EN_1_10_NYZW							0x00000e00
-#define    NV50TCL_VP_ATTR_EN_1_10_XYZW							0x00000f00
-#define   NV50TCL_VP_ATTR_EN_1_9_SHIFT							4
-#define   NV50TCL_VP_ATTR_EN_1_9_MASK							0x000000f0
-#define    NV50TCL_VP_ATTR_EN_1_9_NONE							0x00000000
-#define    NV50TCL_VP_ATTR_EN_1_9_XNNN							0x00000010
-#define    NV50TCL_VP_ATTR_EN_1_9_NYNN							0x00000020
-#define    NV50TCL_VP_ATTR_EN_1_9_XYNN							0x00000030
-#define    NV50TCL_VP_ATTR_EN_1_9_NNZN							0x00000040
-#define    NV50TCL_VP_ATTR_EN_1_9_XNZN							0x00000050
-#define    NV50TCL_VP_ATTR_EN_1_9_NYZN							0x00000060
-#define    NV50TCL_VP_ATTR_EN_1_9_XYZN							0x00000070
-#define    NV50TCL_VP_ATTR_EN_1_9_NNNW							0x00000080
-#define    NV50TCL_VP_ATTR_EN_1_9_XNNW							0x00000090
-#define    NV50TCL_VP_ATTR_EN_1_9_NYNW							0x000000a0
-#define    NV50TCL_VP_ATTR_EN_1_9_XYNW							0x000000b0
-#define    NV50TCL_VP_ATTR_EN_1_9_NNZW							0x000000c0
-#define    NV50TCL_VP_ATTR_EN_1_9_XNZW							0x000000d0
-#define    NV50TCL_VP_ATTR_EN_1_9_NYZW							0x000000e0
-#define    NV50TCL_VP_ATTR_EN_1_9_XYZW							0x000000f0
-#define   NV50TCL_VP_ATTR_EN_1_8_SHIFT							0
-#define   NV50TCL_VP_ATTR_EN_1_8_MASK							0x0000000f
-#define    NV50TCL_VP_ATTR_EN_1_8_NONE							0x00000000
-#define    NV50TCL_VP_ATTR_EN_1_8_XNNN							0x00000001
-#define    NV50TCL_VP_ATTR_EN_1_8_NYNN							0x00000002
-#define    NV50TCL_VP_ATTR_EN_1_8_XYNN							0x00000003
-#define    NV50TCL_VP_ATTR_EN_1_8_NNZN							0x00000004
-#define    NV50TCL_VP_ATTR_EN_1_8_XNZN							0x00000005
-#define    NV50TCL_VP_ATTR_EN_1_8_NYZN							0x00000006
-#define    NV50TCL_VP_ATTR_EN_1_8_XYZN							0x00000007
-#define    NV50TCL_VP_ATTR_EN_1_8_NNNW							0x00000008
-#define    NV50TCL_VP_ATTR_EN_1_8_XNNW							0x00000009
-#define    NV50TCL_VP_ATTR_EN_1_8_NYNW							0x0000000a
-#define    NV50TCL_VP_ATTR_EN_1_8_XYNW							0x0000000b
-#define    NV50TCL_VP_ATTR_EN_1_8_NNZW							0x0000000c
-#define    NV50TCL_VP_ATTR_EN_1_8_XNZW							0x0000000d
-#define    NV50TCL_VP_ATTR_EN_1_8_NYZW							0x0000000e
-#define    NV50TCL_VP_ATTR_EN_1_8_XYZW							0x0000000f
-#define  NV50TCL_POINT_SPRITE_CTRL							0x00001660
-#define  NV50TCL_LINE_STIPPLE_ENABLE							0x0000166c
-#define  NV50TCL_LINE_STIPPLE_PATTERN							0x00001680
-#define  NV50TCL_VERTEX_TWO_SIDE_ENABLE							0x00001688
-#define  NV50TCL_POLYGON_STIPPLE_ENABLE							0x0000168c
-#define  NV50TCL_SET_PROGRAM_CB								0x00001694
-#define   NV50TCL_SET_PROGRAM_CB_PROGRAM_SHIFT						4
-#define   NV50TCL_SET_PROGRAM_CB_PROGRAM_MASK						0x000000f0
-#define    NV50TCL_SET_PROGRAM_CB_PROGRAM_VERTEX					0x00000000
-#define    NV50TCL_SET_PROGRAM_CB_PROGRAM_GEOMETRY					0x00000020
-#define    NV50TCL_SET_PROGRAM_CB_PROGRAM_FRAGMENT					0x00000030
-#define   NV50TCL_SET_PROGRAM_CB_INDEX_SHIFT						8
-#define   NV50TCL_SET_PROGRAM_CB_INDEX_MASK						0x00000f00
-#define   NV50TCL_SET_PROGRAM_CB_BUFFER_SHIFT						12
-#define   NV50TCL_SET_PROGRAM_CB_BUFFER_MASK						0x000ff000
-#define   NV50TCL_SET_PROGRAM_CB_VALID							(1 <<  0)
-#define  NV50TCL_VP_RESULT_MAP_SIZE							0x000016ac
-#define  NV50TCL_VP_REG_ALLOC_TEMP							0x000016b0
-#define  NV50TCL_VP_REG_ALLOC_RESULT							0x000016b8
-#define  NV50TCL_VP_RESULT_MAP(x)							(0x000016bc+((x)*4))
-#define  NV50TCL_VP_RESULT_MAP__SIZE							0x00000008
-#define   NV50TCL_VP_RESULT_MAP_0_SHIFT							0
-#define   NV50TCL_VP_RESULT_MAP_0_MASK							0x000000ff
-#define   NV50TCL_VP_RESULT_MAP_1_SHIFT							8
-#define   NV50TCL_VP_RESULT_MAP_1_MASK							0x0000ff00
-#define   NV50TCL_VP_RESULT_MAP_2_SHIFT							16
-#define   NV50TCL_VP_RESULT_MAP_2_MASK							0x00ff0000
-#define   NV50TCL_VP_RESULT_MAP_3_SHIFT							24
-#define   NV50TCL_VP_RESULT_MAP_3_MASK							0xff000000
-#define  NV50TCL_POLYGON_STIPPLE_PATTERN(x)						(0x00001700+((x)*4))
-#define  NV50TCL_POLYGON_STIPPLE_PATTERN__SIZE						0x00000020
-#define  NV50TCL_GP_ENABLE								0x00001798
-#define  NV50TCL_GP_REG_ALLOC_TEMP							0x000017a0
-#define  NV50TCL_GP_REG_ALLOC_RESULT							0x000017a8
-#define  NV50TCL_GP_RESULT_MAP_SIZE							0x000017ac
-#define  NV50TCL_GP_OUTPUT_PRIMITIVE_TYPE						0x000017b0
-#define   NV50TCL_GP_OUTPUT_PRIMITIVE_TYPE_POINTS					0x00000001
-#define   NV50TCL_GP_OUTPUT_PRIMITIVE_TYPE_LINE_STRIP					0x00000002
-#define   NV50TCL_GP_OUTPUT_PRIMITIVE_TYPE_TRIANGLE_STRIP				0x00000003
-#define  NV50TCL_RASTERIZE_ENABLE							0x000017b4
-#define  NV50TCL_GP_RESULT_MAP(x)							(0x000017fc+((x)*4))
-#define  NV50TCL_GP_RESULT_MAP__SIZE							0x00000008
-#define   NV50TCL_GP_RESULT_MAP_0_SHIFT							0
-#define   NV50TCL_GP_RESULT_MAP_0_MASK							0x000000ff
-#define   NV50TCL_GP_RESULT_MAP_1_SHIFT							8
-#define   NV50TCL_GP_RESULT_MAP_1_MASK							0x0000ff00
-#define   NV50TCL_GP_RESULT_MAP_2_SHIFT							16
-#define   NV50TCL_GP_RESULT_MAP_2_MASK							0x00ff0000
-#define   NV50TCL_GP_RESULT_MAP_3_SHIFT							24
-#define   NV50TCL_GP_RESULT_MAP_3_MASK							0xff000000
-#define  NV50TCL_MAP_SEMANTIC_0								0x00001904
-#define   NV50TCL_MAP_SEMANTIC_0_FFC0_ID_SHIFT						0
-#define   NV50TCL_MAP_SEMANTIC_0_FFC0_ID_MASK						0x000000ff
-#define   NV50TCL_MAP_SEMANTIC_0_BFC0_ID_SHIFT						8
-#define   NV50TCL_MAP_SEMANTIC_0_BFC0_ID_MASK						0x0000ff00
-#define   NV50TCL_MAP_SEMANTIC_0_COLR_NR_SHIFT						16
-#define   NV50TCL_MAP_SEMANTIC_0_COLR_NR_MASK						0x00ff0000
-#define   NV50TCL_MAP_SEMANTIC_0_CLMP_EN_SHIFT						24
-#define   NV50TCL_MAP_SEMANTIC_0_CLMP_EN_MASK						0xff000000
-#define  NV50TCL_MAP_SEMANTIC_1								0x00001908
-#define   NV50TCL_MAP_SEMANTIC_1_CLIP_LO_SHIFT						0
-#define   NV50TCL_MAP_SEMANTIC_1_CLIP_LO_MASK						0x000000ff
-#define   NV50TCL_MAP_SEMANTIC_1_CLIP_HI_SHIFT						8
-#define   NV50TCL_MAP_SEMANTIC_1_CLIP_HI_MASK						0x0000ff00
-#define   NV50TCL_MAP_SEMANTIC_1_UNKN_02_SHIFT						16
-#define   NV50TCL_MAP_SEMANTIC_1_UNKN_02_MASK						0x00ff0000
-#define   NV50TCL_MAP_SEMANTIC_1_UNKN_03_SHIFT						24
-#define   NV50TCL_MAP_SEMANTIC_1_UNKN_03_MASK						0xff000000
-#define  NV50TCL_MAP_SEMANTIC_2								0x0000190c
-#define   NV50TCL_MAP_SEMANTIC_2_UNKN_00_SHIFT						0
-#define   NV50TCL_MAP_SEMANTIC_2_UNKN_00_MASK						0x000000ff
-#define   NV50TCL_MAP_SEMANTIC_2_UNKN_01_SHIFT						8
-#define   NV50TCL_MAP_SEMANTIC_2_UNKN_01_MASK						0x0000ff00
-#define   NV50TCL_MAP_SEMANTIC_2_UNKN_02_SHIFT						16
-#define   NV50TCL_MAP_SEMANTIC_2_UNKN_02_MASK						0x00ff0000
-#define   NV50TCL_MAP_SEMANTIC_2_UNKN_03_SHIFT						24
-#define   NV50TCL_MAP_SEMANTIC_2_UNKN_03_MASK						0xff000000
-#define  NV50TCL_MAP_SEMANTIC_3								0x00001910
-#define   NV50TCL_MAP_SEMANTIC_3_PTSZ_EN						(1 <<  0)
-#define   NV50TCL_MAP_SEMANTIC_3_PTSZ_ID_SHIFT						4
-#define   NV50TCL_MAP_SEMANTIC_3_PTSZ_ID_MASK						0x00000ff0
-#define  NV50TCL_CULL_FACE_ENABLE							0x00001918
-#define  NV50TCL_FRONT_FACE								0x0000191c
-#define   NV50TCL_FRONT_FACE_CW								0x00000900
-#define   NV50TCL_FRONT_FACE_CCW							0x00000901
-#define  NV50TCL_CULL_FACE								0x00001920
-#define   NV50TCL_CULL_FACE_FRONT							0x00000404
-#define   NV50TCL_CULL_FACE_BACK							0x00000405
-#define   NV50TCL_CULL_FACE_FRONT_AND_BACK						0x00000408
-#define  NV50TCL_VIEWPORT_TRANSFORM_EN							0x0000192c
-#define  NV50TCL_VIEW_VOLUME_CLIP_CTRL							0x0000193c
-#define  NV50TCL_FP_CTRL_UNK196C							0x0000196c
-#define  NV50TCL_FP_INTERPOLANT_CTRL							0x00001988
-#define   NV50TCL_FP_INTERPOLANT_CTRL_UMASK_SHIFT					24
-#define   NV50TCL_FP_INTERPOLANT_CTRL_UMASK_MASK					0xff000000
-#define    NV50TCL_FP_INTERPOLANT_CTRL_UMASK_NONE					0x00000000
-#define    NV50TCL_FP_INTERPOLANT_CTRL_UMASK_XNNN					0x01000000
-#define    NV50TCL_FP_INTERPOLANT_CTRL_UMASK_NYNN					0x02000000
-#define    NV50TCL_FP_INTERPOLANT_CTRL_UMASK_XYNN					0x03000000
-#define    NV50TCL_FP_INTERPOLANT_CTRL_UMASK_NNZN					0x04000000
-#define    NV50TCL_FP_INTERPOLANT_CTRL_UMASK_XNZN					0x05000000
-#define    NV50TCL_FP_INTERPOLANT_CTRL_UMASK_NYZN					0x06000000
-#define    NV50TCL_FP_INTERPOLANT_CTRL_UMASK_XYZN					0x07000000
-#define    NV50TCL_FP_INTERPOLANT_CTRL_UMASK_NNNW					0x08000000
-#define    NV50TCL_FP_INTERPOLANT_CTRL_UMASK_XNNW					0x09000000
-#define    NV50TCL_FP_INTERPOLANT_CTRL_UMASK_NYNW					0x0a000000
-#define    NV50TCL_FP_INTERPOLANT_CTRL_UMASK_XYNW					0x0b000000
-#define    NV50TCL_FP_INTERPOLANT_CTRL_UMASK_NNZW					0x0c000000
-#define    NV50TCL_FP_INTERPOLANT_CTRL_UMASK_XNZW					0x0d000000
-#define    NV50TCL_FP_INTERPOLANT_CTRL_UMASK_NYZW					0x0e000000
-#define    NV50TCL_FP_INTERPOLANT_CTRL_UMASK_XYZW					0x0f000000
-#define   NV50TCL_FP_INTERPOLANT_CTRL_COUNT_SHIFT					16
-#define   NV50TCL_FP_INTERPOLANT_CTRL_COUNT_MASK					0x00ff0000
-#define   NV50TCL_FP_INTERPOLANT_CTRL_OFFSET_SHIFT					8
-#define   NV50TCL_FP_INTERPOLANT_CTRL_OFFSET_MASK					0x0000ff00
-#define   NV50TCL_FP_INTERPOLANT_CTRL_COUNT_UNK_SHIFT					0
-#define   NV50TCL_FP_INTERPOLANT_CTRL_COUNT_UNK_MASK					0x000000ff
-#define  NV50TCL_FP_REG_ALLOC_TEMP							0x0000198c
-#define  NV50TCL_FP_CTRL_UNK19A8							0x000019a8
-#define   NV50TCL_FP_CTRL_UNK19A8_DEP							(1 << 20)
-#define   NV50TCL_FP_CTRL_UNK19A8_KIL							(1 <<  8)
-#define  NV50TCL_DEPTH_BOUNDS_EN							0x000019bc
-#define  NV50TCL_LOGIC_OP_ENABLE							0x000019c4
-#define  NV50TCL_LOGIC_OP								0x000019c8
-#define   NV50TCL_LOGIC_OP_CLEAR							0x00001500
-#define   NV50TCL_LOGIC_OP_AND								0x00001501
-#define   NV50TCL_LOGIC_OP_AND_REVERSE							0x00001502
-#define   NV50TCL_LOGIC_OP_COPY								0x00001503
-#define   NV50TCL_LOGIC_OP_AND_INVERTED							0x00001504
-#define   NV50TCL_LOGIC_OP_NOOP								0x00001505
-#define   NV50TCL_LOGIC_OP_XOR								0x00001506
-#define   NV50TCL_LOGIC_OP_OR								0x00001507
-#define   NV50TCL_LOGIC_OP_NOR								0x00001508
-#define   NV50TCL_LOGIC_OP_EQUIV							0x00001509
-#define   NV50TCL_LOGIC_OP_INVERT							0x0000150a
-#define   NV50TCL_LOGIC_OP_OR_REVERSE							0x0000150b
-#define   NV50TCL_LOGIC_OP_COPY_INVERTED						0x0000150c
-#define   NV50TCL_LOGIC_OP_OR_INVERTED							0x0000150d
-#define   NV50TCL_LOGIC_OP_NAND								0x0000150e
-#define   NV50TCL_LOGIC_OP_SET								0x0000150f
-#define  NV50TCL_CLEAR_BUFFERS								0x000019d0
-#define  NV50TCL_COLOR_MASK(x)								(0x00001a00+((x)*4))
-#define  NV50TCL_COLOR_MASK__SIZE							0x00000008
-#define   NV50TCL_COLOR_MASK_R_SHIFT							0
-#define   NV50TCL_COLOR_MASK_R_MASK							0x0000000f
-#define   NV50TCL_COLOR_MASK_G_SHIFT							4
-#define   NV50TCL_COLOR_MASK_G_MASK							0x000000f0
-#define   NV50TCL_COLOR_MASK_B_SHIFT							8
-#define   NV50TCL_COLOR_MASK_B_MASK							0x00000f00
-#define   NV50TCL_COLOR_MASK_A_SHIFT							12
-#define   NV50TCL_COLOR_MASK_A_MASK							0x0000f000
-#define  NV50TCL_STRMOUT_ADDRESS_HIGH(x)						(0x00001a80+((x)*16))
-#define  NV50TCL_STRMOUT_ADDRESS_HIGH__SIZE						0x00000004
-#define  NV50TCL_STRMOUT_ADDRESS_LOW(x)							(0x00001a84+((x)*16))
-#define  NV50TCL_STRMOUT_ADDRESS_LOW__SIZE						0x00000004
-#define  NV50TCL_STRMOUT_NUM_ATTRIBS(x)							(0x00001a88+((x)*16))
-#define  NV50TCL_STRMOUT_NUM_ATTRIBS__SIZE						0x00000004
-#define  NV50TCL_VERTEX_ARRAY_ATTRIB(x)							(0x00001ac0+((x)*4))
-#define  NV50TCL_VERTEX_ARRAY_ATTRIB__SIZE						0x00000010
-#define   NV50TCL_VERTEX_ARRAY_ATTRIB_BUFFER_SHIFT					0
-#define   NV50TCL_VERTEX_ARRAY_ATTRIB_BUFFER_MASK					0x000000ff
-#define   NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_SHIFT					16
-#define   NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_MASK						0x00ff0000
-#define    NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_32_32_32_32					0x00080000
-#define    NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_32_32_32					0x00100000
-#define    NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_32_32					0x00200000
-#define    NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_32						0x00900000
-#define    NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_16_16_16_16					0x00180000
-#define    NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_16_16_16					0x00280000
-#define    NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_16_16					0x00780000
-#define    NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_16						0x00d80000
-#define    NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_8_8_8_8					0x00500000
-#define    NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_8_8_8					0x00980000
-#define    NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_8_8						0x00c00000
-#define    NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_8						0x00e80000
-#define   NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SHIFT					24
-#define   NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_MASK						0xff000000
-#define    NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_FLOAT					0x7e000000
-#define    NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_UNORM					0x24000000
-#define    NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SNORM					0x12000000
-#define    NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_USCALED					0x5a000000
-#define    NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SSCALED					0x6c000000
-#define    NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_UINT					0x48000000
-#define    NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SINT					0x36000000
-#define  NV50TCL_QUERY_ADDRESS_HIGH							0x00001b00
-#define  NV50TCL_QUERY_ADDRESS_LOW							0x00001b04
-#define  NV50TCL_QUERY_COUNTER								0x00001b08
-#define  NV50TCL_QUERY_GET								0x00001b0c
-
-
-#define NV50_COMPUTE									0x000050c0
-
-#define  NV50_COMPUTE_DMA_UNK0								0x000001a0
-#define  NV50_COMPUTE_DMA_STATUS							0x000001a4
-#define  NV50_COMPUTE_DMA_UNK1								0x000001b8
-#define  NV50_COMPUTE_DMA_UNK2								0x000001bc
-#define  NV50_COMPUTE_DMA_UNK3								0x000001c0
-#define  NV50_COMPUTE_UNK4_HIGH								0x00000210
-#define  NV50_COMPUTE_UNK4_LOW								0x00000214
-#define  NV50_COMPUTE_UNK5_HIGH								0x00000218
-#define  NV50_COMPUTE_UNK5_LOW								0x0000021c
-#define  NV50_COMPUTE_UNK6_HIGH								0x00000294
-#define  NV50_COMPUTE_UNK6_LOW								0x00000298
-#define  NV50_COMPUTE_CONST_BASE_HIGH							0x000002a4
-#define  NV50_COMPUTE_CONST_BASE_LO							0x000002a8
-#define  NV50_COMPUTE_CONST_SIZE_SEG							0x000002ac
-#define  NV50_COMPUTE_REG_COUNT								0x000002c0
-#define  NV50_COMPUTE_STATUS_HIGH							0x00000310
-#define  NV50_COMPUTE_STATUS_LOW							0x00000314
-#define  NV50_COMPUTE_EXECUTE								0x0000031c
-#define  NV50_COMPUTE_USER_PARAM_COUNT							0x00000374
-#define  NV50_COMPUTE_GRIDDIM_YX							0x000003a4
-#define  NV50_COMPUTE_SHARED_SIZE							0x000003a8
-#define  NV50_COMPUTE_BLOCKDIM_YX							0x000003ac
-#define  NV50_COMPUTE_BLOCKDIM_Z							0x000003b0
-#define  NV50_COMPUTE_CALL_ADDRESS							0x000003b4
-#define  NV50_COMPUTE_GLOBAL_BASE_HIGH(x)						(0x00000400+((x)*32))
-#define  NV50_COMPUTE_GLOBAL_BASE_HIGH__SIZE						0x00000010
-#define  NV50_COMPUTE_GLOBAL_BASE_LOW(x)						(0x00000404+((x)*32))
-#define  NV50_COMPUTE_GLOBAL_BASE_LOW__SIZE						0x00000010
-#define  NV50_COMPUTE_GLOBAL_LIMIT_HIGH(x)						(0x00000408+((x)*32))
-#define  NV50_COMPUTE_GLOBAL_LIMIT_HIGH__SIZE						0x00000010
-#define  NV50_COMPUTE_GLOBAL_LIMIT_LOW(x)						(0x0000040c+((x)*32))
-#define  NV50_COMPUTE_GLOBAL_LIMIT_LOW__SIZE						0x00000010
-#define  NV50_COMPUTE_GLOBAL_UNK(x)							(0x00000410+((x)*32))
-#define  NV50_COMPUTE_GLOBAL_UNK__SIZE							0x00000010
-#define  NV50_COMPUTE_USER_PARAM(x)							(0x00000600+((x)*4))
-#define  NV50_COMPUTE_USER_PARAM__SIZE							0x00000040
-
-
-#define NV54TCL										0x00008297
-
-
-
-#define NVA0TCL										0x00008397
-
-
-
-#endif /* NOUVEAU_REG_H */
diff --git a/libdrm/nouveau/nouveau_device.c b/libdrm/nouveau/nouveau_device.c
deleted file mode 100644
index 0982d3b6..00000000
--- a/libdrm/nouveau/nouveau_device.c
+++ /dev/null
@@ -1,194 +0,0 @@
-/*
- * Copyright 2007 Nouveau Project
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
- * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <errno.h>
-
-#include "nouveau_private.h"
-
-#if NOUVEAU_DRM_HEADER_PATCHLEVEL != 15
-#error nouveau_drm.h does not match expected patchlevel, update libdrm.
-#endif
-
-int
-nouveau_device_open_existing(struct nouveau_device **dev, int close,
-			     int fd, drm_context_t ctx)
-{
-	struct nouveau_device_priv *nvdev;
-	drmVersionPtr ver;
-	uint64_t value;
-	int ret;
-
-	if (!dev || *dev)
-	    return -EINVAL;
-
-	ver = drmGetVersion(fd);
-	if (!ver || ver->version_patchlevel != NOUVEAU_DRM_HEADER_PATCHLEVEL)
-		return -EINVAL;
-	drmFreeVersion(ver);
-
-	nvdev = calloc(1, sizeof(*nvdev));
-	if (!nvdev)
-	    return -ENOMEM;
-	nvdev->fd = fd;
-	nvdev->ctx = ctx;
-	nvdev->needs_close = close;
-
-	ret = drmCommandNone(nvdev->fd, DRM_NOUVEAU_CARD_INIT);
-	if (ret) {
-		nouveau_device_close((void *)&nvdev);
-		return ret;
-	}
-
-	ret = nouveau_device_get_param(&nvdev->base,
-				       NOUVEAU_GETPARAM_VM_VRAM_BASE, &value);
-	if (ret) {
-		nouveau_device_close((void *)&nvdev);
-		return ret;
-	}
-	nvdev->base.vm_vram_base = value;
-
-	ret = nouveau_device_get_param(&nvdev->base,
-				       NOUVEAU_GETPARAM_FB_SIZE, &value);
-	if (ret) {
-		nouveau_device_close((void *)&nvdev);
-		return ret;
-	}
-	nvdev->base.vm_vram_size = value;
-
-	ret = nouveau_device_get_param(&nvdev->base,
-				       NOUVEAU_GETPARAM_AGP_SIZE, &value);
-	if (ret) {
-		nouveau_device_close((void *)&nvdev);
-		return ret;
-	}
-	nvdev->base.vm_gart_size = value;
-
-	ret = nouveau_bo_init(&nvdev->base);
-	if (ret) {
-		nouveau_device_close((void *)&nvdev);
-		return ret;
-	}
-
-	ret = nouveau_device_get_param(&nvdev->base,
-				       NOUVEAU_GETPARAM_CHIPSET_ID, &value);
-	if (ret) {
-		nouveau_device_close((void *)&nvdev);
-		return ret;
-	}
-	nvdev->base.chipset = value;
-
-	*dev = &nvdev->base;
-	return 0;
-}
-
-int
-nouveau_device_open(struct nouveau_device **dev, const char *busid)
-{
-	drm_context_t ctx;
-	int fd, ret;
-
-	if (!dev || *dev)
-		return -EINVAL;
-
-	fd = drmOpen("nouveau", busid);
-	if (fd < 0)
-		return -EINVAL;
-
-	ret = drmCreateContext(fd, &ctx);
-	if (ret) {
-		drmClose(fd);
-		return ret;
-	}
-
-	ret = nouveau_device_open_existing(dev, 1, fd, ctx);
-	if (ret) {
-	    drmDestroyContext(fd, ctx);
-	    drmClose(fd);
-	    return ret;
-	}
-
-	return 0;
-}
-
-void
-nouveau_device_close(struct nouveau_device **dev)
-{
-	struct nouveau_device_priv *nvdev;
-
-	if (!dev || !*dev)
-		return;
-	nvdev = nouveau_device(*dev);
-	*dev = NULL;
-
-	nouveau_bo_takedown(&nvdev->base);
-
-	if (nvdev->needs_close) {
-		drmDestroyContext(nvdev->fd, nvdev->ctx);
-		drmClose(nvdev->fd);
-	}
-	free(nvdev);
-}
-
-int
-nouveau_device_get_param(struct nouveau_device *dev,
-			 uint64_t param, uint64_t *value)
-{
-	struct nouveau_device_priv *nvdev = nouveau_device(dev);
-	struct drm_nouveau_getparam g;
-	int ret;
-
-	if (!nvdev || !value)
-		return -EINVAL;
-
-	g.param = param;
-	ret = drmCommandWriteRead(nvdev->fd, DRM_NOUVEAU_GETPARAM,
-				  &g, sizeof(g));
-	if (ret)
-		return ret;
-
-	*value = g.value;
-	return 0;
-}
-
-int
-nouveau_device_set_param(struct nouveau_device *dev,
-			 uint64_t param, uint64_t value)
-{
-	struct nouveau_device_priv *nvdev = nouveau_device(dev);
-	struct drm_nouveau_setparam s;
-	int ret;
-
-	if (!nvdev)
-		return -EINVAL;
-
-	s.param = param;
-	s.value = value;
-	ret = drmCommandWriteRead(nvdev->fd, DRM_NOUVEAU_SETPARAM,
-				  &s, sizeof(s));
-	if (ret)
-		return ret;
-
-	return 0;
-}
-
diff --git a/libdrm/nouveau/nouveau_device.h b/libdrm/nouveau/nouveau_device.h
deleted file mode 100644
index c0d93335..00000000
--- a/libdrm/nouveau/nouveau_device.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * Copyright 2007 Nouveau Project
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
- * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef __NOUVEAU_DEVICE_H__
-#define __NOUVEAU_DEVICE_H__
-
-struct nouveau_device {
-	unsigned chipset;
-	uint64_t vm_vram_base;
-	uint64_t vm_vram_size;
-	uint64_t vm_gart_size;
-};
-
-#endif
diff --git a/libdrm/nouveau/nouveau_drmif.h b/libdrm/nouveau/nouveau_drmif.h
deleted file mode 100644
index bc860d2e..00000000
--- a/libdrm/nouveau/nouveau_drmif.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * Copyright 2008 Nouveau Project
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
- * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef __NOUVEAU_DRMIF_H__
-#define __NOUVEAU_DRMIF_H__
-
-#include <stdint.h>
-#include <xf86drm.h>
-
-#include "nouveau_device.h"
-
-struct nouveau_device_priv {
-	struct nouveau_device base;
-
-	int fd;
-	drm_context_t ctx;
-	drmLock *lock;
-	int needs_close;
-};
-#define nouveau_device(n) ((struct nouveau_device_priv *)(n))
-
-int
-nouveau_device_open_existing(struct nouveau_device **, int close,
-			     int fd, drm_context_t ctx);
-
-int
-nouveau_device_open(struct nouveau_device **, const char *busid);
-
-void
-nouveau_device_close(struct nouveau_device **);
-
-int
-nouveau_device_get_param(struct nouveau_device *, uint64_t param, uint64_t *v);
-
-int
-nouveau_device_set_param(struct nouveau_device *, uint64_t param, uint64_t val);
-
-#endif
diff --git a/libdrm/nouveau/nouveau_grobj.c b/libdrm/nouveau/nouveau_grobj.c
deleted file mode 100644
index 2b6e53a5..00000000
--- a/libdrm/nouveau/nouveau_grobj.c
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * Copyright 2007 Nouveau Project
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
- * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <stdlib.h>
-#include <errno.h>
-
-#include "nouveau_private.h"
-
-int
-nouveau_grobj_alloc(struct nouveau_channel *chan, uint32_t handle,
-		    int class, struct nouveau_grobj **grobj)
-{
-	struct nouveau_device_priv *nvdev = nouveau_device(chan->device);
-	struct nouveau_grobj_priv *nvgrobj;
-	struct drm_nouveau_grobj_alloc g;
-	int ret;
-
-	if (!nvdev || !grobj || *grobj)
-		return -EINVAL;
-
-	nvgrobj = calloc(1, sizeof(*nvgrobj));
-	if (!nvgrobj)
-		return -ENOMEM;
-	nvgrobj->base.channel = chan;
-	nvgrobj->base.handle  = handle;
-	nvgrobj->base.grclass = class;
-	nvgrobj->base.bound   = NOUVEAU_GROBJ_UNBOUND;
-	nvgrobj->base.subc    = -1;
-
-	g.channel = chan->id;
-	g.handle  = handle;
-	g.class   = class;
-	ret = drmCommandWrite(nvdev->fd, DRM_NOUVEAU_GROBJ_ALLOC,
-			      &g, sizeof(g));
-	if (ret) {
-		nouveau_grobj_free((void *)&nvgrobj);
-		return ret;
-	}
-
-	*grobj = &nvgrobj->base;
-	return 0;
-}
-
-int
-nouveau_grobj_ref(struct nouveau_channel *chan, uint32_t handle,
-		  struct nouveau_grobj **grobj)
-{
-	struct nouveau_grobj_priv *nvgrobj;
-
-	if (!chan || !grobj || *grobj)
-		return -EINVAL;
-
-	nvgrobj = calloc(1, sizeof(struct nouveau_grobj_priv));
-	if (!nvgrobj)
-		return -ENOMEM;
-	nvgrobj->base.channel = chan;
-	nvgrobj->base.handle = handle;
-	nvgrobj->base.grclass = 0;
-
-	*grobj = &nvgrobj->base;
-	return 0;
-}
-
-void
-nouveau_grobj_free(struct nouveau_grobj **grobj)
-{
-	struct nouveau_device_priv *nvdev;
-	struct nouveau_channel_priv *chan;
-	struct nouveau_grobj_priv *nvgrobj;
-
-	if (!grobj || !*grobj)
-		return;
-	nvgrobj = nouveau_grobj(*grobj);
-	*grobj = NULL;
-
-
-	chan = nouveau_channel(nvgrobj->base.channel);
-	nvdev = nouveau_device(chan->base.device);
-
-	if (nvgrobj->base.grclass) {
-		struct drm_nouveau_gpuobj_free f;
-
-		f.channel = chan->drm.channel;
-		f.handle  = nvgrobj->base.handle;
-		drmCommandWrite(nvdev->fd, DRM_NOUVEAU_GPUOBJ_FREE,
-				&f, sizeof(f));	
-	}
-	free(nvgrobj);
-}
-
-void
-nouveau_grobj_autobind(struct nouveau_grobj *grobj)
-{
-	struct nouveau_subchannel *subc = NULL;
-	int i;
-
-	for (i = 0; i < 8; i++) {
-		struct nouveau_subchannel *scc = &grobj->channel->subc[i];
-
-		if (scc->gr && scc->gr->bound == NOUVEAU_GROBJ_BOUND_EXPLICIT)
-			continue;
-
-		if (!subc || scc->sequence < subc->sequence)
-			subc = scc;
-	}
-
-	if (subc->gr) {
-		subc->gr->bound = NOUVEAU_GROBJ_UNBOUND;
-		subc->gr->subc  = -1;
-	}
-
-	subc->gr = grobj;
-	subc->gr->bound = NOUVEAU_GROBJ_BOUND;
-	subc->gr->subc  = subc - &grobj->channel->subc[0];
-
-	BEGIN_RING(grobj->channel, grobj, 0x0000, 1);
-	OUT_RING  (grobj->channel, grobj->handle);
-}
-
diff --git a/libdrm/nouveau/nouveau_grobj.h b/libdrm/nouveau/nouveau_grobj.h
deleted file mode 100644
index 51ac7d9b..00000000
--- a/libdrm/nouveau/nouveau_grobj.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * Copyright 2007 Nouveau Project
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
- * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef __NOUVEAU_GROBJ_H__
-#define __NOUVEAU_GROBJ_H__
-
-#include "nouveau_channel.h"
-
-struct nouveau_grobj {
-	struct nouveau_channel *channel;
-	int grclass;
-	uint32_t handle;
-
-	enum {
-		NOUVEAU_GROBJ_UNBOUND = 0,
-		NOUVEAU_GROBJ_BOUND = 1,
-		NOUVEAU_GROBJ_BOUND_EXPLICIT = 2
-	} bound;
-	int subc;
-};
-
-int nouveau_grobj_alloc(struct nouveau_channel *, uint32_t handle,
-			       int class, struct nouveau_grobj **);
-int nouveau_grobj_ref(struct nouveau_channel *, uint32_t handle,
-			     struct nouveau_grobj **);
-void nouveau_grobj_free(struct nouveau_grobj **);
-void nouveau_grobj_autobind(struct nouveau_grobj *);
-
-#endif
diff --git a/libdrm/nouveau/nouveau_notifier.c b/libdrm/nouveau/nouveau_notifier.c
deleted file mode 100644
index f8cfd8b9..00000000
--- a/libdrm/nouveau/nouveau_notifier.c
+++ /dev/null
@@ -1,146 +0,0 @@
-/*
- * Copyright 2007 Nouveau Project
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
- * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <stdlib.h>
-#include <errno.h>
-#include <sys/time.h>
-
-#include "nouveau_private.h"
-
-#define NOTIFIER(__v)                                                          \
-	struct nouveau_notifier_priv *nvnotify = nouveau_notifier(notifier);   \
-	volatile uint32_t *__v = (uint32_t *)((char *)nvnotify->map + (id * 32))
-
-int
-nouveau_notifier_alloc(struct nouveau_channel *chan, uint32_t handle,
-		       int count, struct nouveau_notifier **notifier)
-{
-	struct nouveau_notifier_priv *nvnotify;
-	int ret;
-
-	if (!chan || !notifier || *notifier)
-		return -EINVAL;
-
-	nvnotify = calloc(1, sizeof(struct nouveau_notifier_priv));
-	if (!nvnotify)
-		return -ENOMEM;
-	nvnotify->base.channel = chan;
-	nvnotify->base.handle  = handle;
-
-	nvnotify->drm.channel = chan->id;
-	nvnotify->drm.handle  = handle;
-	nvnotify->drm.size    = (count * 32);
-	if ((ret = drmCommandWriteRead(nouveau_device(chan->device)->fd,
-				       DRM_NOUVEAU_NOTIFIEROBJ_ALLOC,
-				       &nvnotify->drm,
-				       sizeof(nvnotify->drm)))) {
-		nouveau_notifier_free((void *)&nvnotify);
-		return ret;
-	}
-
-	nvnotify->map = (char *)nouveau_channel(chan)->notifier_bo->map +
-				nvnotify->drm.offset;
-	*notifier = &nvnotify->base;
-	return 0;
-}
-
-void
-nouveau_notifier_free(struct nouveau_notifier **notifier)
-{
-
-	struct nouveau_notifier_priv *nvnotify;
-	struct nouveau_channel_priv *nvchan;
-	struct nouveau_device_priv *nvdev;
-	struct drm_nouveau_gpuobj_free f;
-
-	if (!notifier || !*notifier)
-		return;
-	nvnotify = nouveau_notifier(*notifier);
-	*notifier = NULL;
-
-	nvchan = nouveau_channel(nvnotify->base.channel);
-	nvdev   = nouveau_device(nvchan->base.device);
-
-	f.channel = nvchan->drm.channel;
-	f.handle  = nvnotify->base.handle;
-	drmCommandWrite(nvdev->fd, DRM_NOUVEAU_GPUOBJ_FREE, &f, sizeof(f));		
-	free(nvnotify);
-}
-
-void
-nouveau_notifier_reset(struct nouveau_notifier *notifier, int id)
-{
-	NOTIFIER(n);
-
-	n[NV_NOTIFY_TIME_0      /4] = 0x00000000;
-	n[NV_NOTIFY_TIME_1      /4] = 0x00000000;
-	n[NV_NOTIFY_RETURN_VALUE/4] = 0x00000000;
-	n[NV_NOTIFY_STATE       /4] = (NV_NOTIFY_STATE_STATUS_IN_PROCESS <<
-				       NV_NOTIFY_STATE_STATUS_SHIFT);
-}
-
-uint32_t
-nouveau_notifier_status(struct nouveau_notifier *notifier, int id)
-{
-	NOTIFIER(n);
-
-	return n[NV_NOTIFY_STATE/4] >> NV_NOTIFY_STATE_STATUS_SHIFT;
-}
-
-uint32_t
-nouveau_notifier_return_val(struct nouveau_notifier *notifier, int id)
-{
-	NOTIFIER(n);
-
-	return n[NV_NOTIFY_RETURN_VALUE/4];
-}
-
-static inline double
-gettime(void)
-{
-	struct timeval tv;
-
-	gettimeofday(&tv, NULL);
-	return (double)tv.tv_sec + tv.tv_usec / 1000000.0;
-}
-
-int
-nouveau_notifier_wait_status(struct nouveau_notifier *notifier, int id,
-			     uint32_t status, double timeout)
-{
-	NOTIFIER(n);
-	double time = 0, t_start = gettime();
-
-	while (time <= timeout) {
-		uint32_t v;
-
-		v = n[NV_NOTIFY_STATE/4] >> NV_NOTIFY_STATE_STATUS_SHIFT;
-		if (v == status)
-			return 0;
-
-		if (timeout)
-			time = gettime() - t_start;
-	}
-
-	return -EBUSY;
-}
-
diff --git a/libdrm/nouveau/nouveau_notifier.h b/libdrm/nouveau/nouveau_notifier.h
deleted file mode 100644
index dbc6a3b8..00000000
--- a/libdrm/nouveau/nouveau_notifier.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * Copyright 2007 Nouveau Project
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
- * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef __NOUVEAU_NOTIFIER_H__
-#define __NOUVEAU_NOTIFIER_H__
-
-#define NV_NOTIFIER_SIZE                                                      32
-#define NV_NOTIFY_TIME_0                                              0x00000000
-#define NV_NOTIFY_TIME_1                                              0x00000004
-#define NV_NOTIFY_RETURN_VALUE                                        0x00000008
-#define NV_NOTIFY_STATE                                               0x0000000C
-#define NV_NOTIFY_STATE_STATUS_MASK                                   0xFF000000
-#define NV_NOTIFY_STATE_STATUS_SHIFT                                          24
-#define NV_NOTIFY_STATE_STATUS_COMPLETED                                    0x00
-#define NV_NOTIFY_STATE_STATUS_IN_PROCESS                                   0x01
-#define NV_NOTIFY_STATE_ERROR_CODE_MASK                               0x0000FFFF
-#define NV_NOTIFY_STATE_ERROR_CODE_SHIFT                                       0
-
-struct nouveau_notifier {
-	struct nouveau_channel *channel;
-	uint32_t handle;
-};
-
-int
-nouveau_notifier_alloc(struct nouveau_channel *, uint32_t handle, int count,
-		       struct nouveau_notifier **);
-
-void
-nouveau_notifier_free(struct nouveau_notifier **);
-
-void
-nouveau_notifier_reset(struct nouveau_notifier *, int id);
-
-uint32_t
-nouveau_notifier_status(struct nouveau_notifier *, int id);
-
-uint32_t
-nouveau_notifier_return_val(struct nouveau_notifier *, int id);
-
-int
-nouveau_notifier_wait_status(struct nouveau_notifier *, int id, uint32_t status,
-			     double timeout);
-
-#endif
diff --git a/libdrm/nouveau/nouveau_private.h b/libdrm/nouveau/nouveau_private.h
deleted file mode 100644
index 784afc91..00000000
--- a/libdrm/nouveau/nouveau_private.h
+++ /dev/null
@@ -1,133 +0,0 @@
-/*
- * Copyright 2007 Nouveau Project
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
- * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef __NOUVEAU_PRIVATE_H__
-#define __NOUVEAU_PRIVATE_H__
-
-#include <stdint.h>
-#include <xf86drm.h>
-#include <nouveau_drm.h>
-
-#include "nouveau_drmif.h"
-#include "nouveau_device.h"
-#include "nouveau_channel.h"
-#include "nouveau_grobj.h"
-#include "nouveau_notifier.h"
-#include "nouveau_bo.h"
-#include "nouveau_resource.h"
-#include "nouveau_pushbuf.h"
-
-#define CALPB_BUFFERS 4
-#define CALPB_BUFSZ   16384
-struct nouveau_pushbuf_priv {
-	struct nouveau_pushbuf base;
-
-	int no_aper_update;
-	int use_cal;
-	uint32_t cal_suffix0;
-	uint32_t cal_suffix1;
-	struct nouveau_bo *buffer[CALPB_BUFFERS];
-	int current;
-	int current_offset;
-
-	unsigned *pushbuf;
-	unsigned  size;
-
-	unsigned marker;
-	unsigned marker_relocs;
-
-	struct drm_nouveau_gem_pushbuf_bo *buffers;
-	unsigned nr_buffers;
-	struct drm_nouveau_gem_pushbuf_reloc *relocs;
-	unsigned nr_relocs;
-};
-#define nouveau_pushbuf(n) ((struct nouveau_pushbuf_priv *)(n))
-
-int
-nouveau_pushbuf_init(struct nouveau_channel *);
-
-struct nouveau_channel_priv {
-	struct nouveau_channel base;
-
-	struct drm_nouveau_channel_alloc drm;
-
-	struct nouveau_bo *notifier_bo;
-
-	struct nouveau_pushbuf_priv pb;
-};
-#define nouveau_channel(n) ((struct nouveau_channel_priv *)(n))
-
-struct nouveau_grobj_priv {
-	struct nouveau_grobj base;
-};
-#define nouveau_grobj(n) ((struct nouveau_grobj_priv *)(n))
-
-struct nouveau_notifier_priv {
-	struct nouveau_notifier base;
-
-	struct drm_nouveau_notifierobj_alloc drm;
-	volatile void *map;
-};
-#define nouveau_notifier(n) ((struct nouveau_notifier_priv *)(n))
-
-struct nouveau_bo_priv {
-	struct nouveau_bo base;
-	int refcount;
-
-	/* Buffer configuration + usage hints */
-	unsigned flags;
-	unsigned size;
-	unsigned align;
-	int user;
-
-	/* Tracking */
-	struct drm_nouveau_gem_pushbuf_bo *pending;
-	struct nouveau_channel *pending_channel;
-	int pending_refcnt;
-	int write_marker;
-
-	/* Userspace object */
-	void *sysmem;
-
-	/* Kernel object */
-	uint32_t global_handle;
-	drm_handle_t handle;
-	uint64_t map_handle;
-	void *map;
-
-	/* Last known information from kernel on buffer status */
-	int pinned;
-	uint64_t offset;
-	uint32_t domain;
-};
-#define nouveau_bo(n) ((struct nouveau_bo_priv *)(n))
-
-int
-nouveau_bo_init(struct nouveau_device *);
-
-void
-nouveau_bo_takedown(struct nouveau_device *);
-
-struct drm_nouveau_gem_pushbuf_bo *
-nouveau_bo_emit_buffer(struct nouveau_channel *, struct nouveau_bo *);
-
-#endif
diff --git a/libdrm/nouveau/nouveau_pushbuf.c b/libdrm/nouveau/nouveau_pushbuf.c
deleted file mode 100644
index 90250c02..00000000
--- a/libdrm/nouveau/nouveau_pushbuf.c
+++ /dev/null
@@ -1,411 +0,0 @@
-/*
- * Copyright 2007 Nouveau Project
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
- * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <errno.h>
-#include <assert.h>
-
-#include "nouveau_private.h"
-
-#define PB_BUFMGR_DWORDS   (4096 / 2)
-#define PB_MIN_USER_DWORDS  2048
-
-static uint32_t
-nouveau_pushbuf_calc_reloc(struct drm_nouveau_gem_pushbuf_bo *pbbo,
-			   struct drm_nouveau_gem_pushbuf_reloc *r)
-{
-	uint32_t push = 0;
-
-	if (r->flags & NOUVEAU_GEM_RELOC_LOW)
-		push = (pbbo->presumed_offset + r->data);
-	else
-	if (r->flags & NOUVEAU_GEM_RELOC_HIGH)
-		push = (pbbo->presumed_offset + r->data) >> 32;
-	else
-		push = r->data;
-
-	if (r->flags & NOUVEAU_GEM_RELOC_OR) {
-		if (pbbo->presumed_domain & NOUVEAU_GEM_DOMAIN_VRAM)
-			push |= r->vor;
-		else
-			push |= r->tor;
-	}
-
-	return push;
-}
-
-int
-nouveau_pushbuf_emit_reloc(struct nouveau_channel *chan, void *ptr,
-			   struct nouveau_bo *bo, uint32_t data, uint32_t data2,
-			   uint32_t flags, uint32_t vor, uint32_t tor)
-{
-	struct nouveau_pushbuf_priv *nvpb = nouveau_pushbuf(chan->pushbuf);
-	struct nouveau_bo_priv *nvbo = nouveau_bo(bo);
-	struct drm_nouveau_gem_pushbuf_reloc *r;
-	struct drm_nouveau_gem_pushbuf_bo *pbbo;
-	uint32_t domains = 0;
-
-	if (nvpb->nr_relocs >= NOUVEAU_GEM_MAX_RELOCS) {
-		fprintf(stderr, "too many relocs!!\n");
-		return -ENOMEM;
-	}
-
-	if (nvbo->user && (flags & NOUVEAU_BO_WR)) {
-		fprintf(stderr, "write to user buffer!!\n");
-		return -EINVAL;
-	}
-
-	pbbo = nouveau_bo_emit_buffer(chan, bo);
-	if (!pbbo) {
-		fprintf(stderr, "buffer emit fail :(\n");
-		return -ENOMEM;
-	}
-
-	nvbo->pending_refcnt++;
-
-	if (flags & NOUVEAU_BO_VRAM)
-		domains |= NOUVEAU_GEM_DOMAIN_VRAM;
-	if (flags & NOUVEAU_BO_GART)
-		domains |= NOUVEAU_GEM_DOMAIN_GART;
-
-	if (!(pbbo->valid_domains & domains)) {
-		fprintf(stderr, "no valid domains remain!\n");
-		return -EINVAL;
-	}
-	pbbo->valid_domains &= domains;
-
-	assert(flags & NOUVEAU_BO_RDWR);
-	if (flags & NOUVEAU_BO_RD) {
-		pbbo->read_domains |= domains;
-	}
-	if (flags & NOUVEAU_BO_WR) {
-		pbbo->write_domains |= domains;
-		nvbo->write_marker = 1;
-	}
-
-	r = nvpb->relocs + nvpb->nr_relocs++;
-	r->bo_index = pbbo - nvpb->buffers;
-	r->reloc_index = (uint32_t *)ptr - nvpb->pushbuf;
-	r->flags = 0;
-	if (flags & NOUVEAU_BO_LOW)
-		r->flags |= NOUVEAU_GEM_RELOC_LOW;
-	if (flags & NOUVEAU_BO_HIGH)
-		r->flags |= NOUVEAU_GEM_RELOC_HIGH;
-	if (flags & NOUVEAU_BO_OR)
-		r->flags |= NOUVEAU_GEM_RELOC_OR;
-	r->data = data;
-	r->vor = vor;
-	r->tor = tor;
-
-	*(uint32_t *)ptr = (flags & NOUVEAU_BO_DUMMY) ? 0 :
-		nouveau_pushbuf_calc_reloc(pbbo, r);
-	return 0;
-}
-
-static int
-nouveau_pushbuf_space_call(struct nouveau_channel *chan, unsigned min)
-{
-	struct nouveau_channel_priv *nvchan = nouveau_channel(chan);
-	struct nouveau_pushbuf_priv *nvpb = &nvchan->pb;
-	struct nouveau_bo *bo;
-	int ret;
-
-	if (min < PB_MIN_USER_DWORDS)
-		min = PB_MIN_USER_DWORDS;
-
-	nvpb->current_offset = nvpb->base.cur - nvpb->pushbuf;
-	if (nvpb->current_offset + min + 2 <= nvpb->size)
-		return 0;
-
-	nvpb->current++;
-	if (nvpb->current == CALPB_BUFFERS)
-		nvpb->current = 0;
-	bo = nvpb->buffer[nvpb->current];
-
-	ret = nouveau_bo_map(bo, NOUVEAU_BO_WR);
-	if (ret)
-		return ret;
-
-	nvpb->size = (bo->size - 8) / 4;
-	nvpb->pushbuf = bo->map;
-	nvpb->current_offset = 0;
-
-	nvpb->base.channel = chan;
-	nvpb->base.remaining = nvpb->size;
-	nvpb->base.cur = nvpb->pushbuf;
-
-	nouveau_bo_unmap(bo);
-	return 0;
-}
-
-static int
-nouveau_pushbuf_space(struct nouveau_channel *chan, unsigned min)
-{
-	struct nouveau_channel_priv *nvchan = nouveau_channel(chan);
-	struct nouveau_pushbuf_priv *nvpb = &nvchan->pb;
-
-	if (nvpb->use_cal)
-		return nouveau_pushbuf_space_call(chan, min);
-
-	if (nvpb->pushbuf) {
-		free(nvpb->pushbuf);
-		nvpb->pushbuf = NULL;
-	}
-
-	nvpb->size = min < PB_MIN_USER_DWORDS ? PB_MIN_USER_DWORDS : min;	
-	nvpb->pushbuf = malloc(sizeof(uint32_t) * nvpb->size);
-
-	nvpb->base.channel = chan;
-	nvpb->base.remaining = nvpb->size;
-	nvpb->base.cur = nvpb->pushbuf;
-	
-	return 0;
-}
-
-static void
-nouveau_pushbuf_fini_call(struct nouveau_channel *chan)
-{
-	struct nouveau_channel_priv *nvchan = nouveau_channel(chan);
-	struct nouveau_pushbuf_priv *nvpb = &nvchan->pb;
-	int i;
-
-	for (i = 0; i < CALPB_BUFFERS; i++)
-		nouveau_bo_ref(NULL, &nvpb->buffer[i]);
-	nvpb->use_cal = 0;
-	nvpb->pushbuf = NULL;
-}
-
-static void
-nouveau_pushbuf_init_call(struct nouveau_channel *chan)
-{
-	struct drm_nouveau_gem_pushbuf_call req;
-	struct nouveau_channel_priv *nvchan = nouveau_channel(chan);
-	struct nouveau_pushbuf_priv *nvpb = &nvchan->pb;
-	struct nouveau_device *dev = chan->device;
-	int i, ret;
-
-	req.channel = chan->id;
-	req.handle = 0;
-	ret = drmCommandWriteRead(nouveau_device(dev)->fd,
-				  DRM_NOUVEAU_GEM_PUSHBUF_CALL2,
-				  &req, sizeof(req));
-	if (ret) {
-		ret = drmCommandWriteRead(nouveau_device(dev)->fd,
-					  DRM_NOUVEAU_GEM_PUSHBUF_CALL2,
-					  &req, sizeof(req));
-		if (ret)
-			return;
-
-		nvpb->no_aper_update = 1;
-	}
-
-	for (i = 0; i < CALPB_BUFFERS; i++) {
-		ret = nouveau_bo_new(dev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP,
-				     0, CALPB_BUFSZ, &nvpb->buffer[i]);
-		if (ret) {
-			nouveau_pushbuf_fini_call(chan);
-			return;
-		}
-	}
-
-	nvpb->use_cal = 1;
-	nvpb->cal_suffix0 = req.suffix0;
-	nvpb->cal_suffix1 = req.suffix1;
-}
-
-int
-nouveau_pushbuf_init(struct nouveau_channel *chan)
-{
-	struct nouveau_channel_priv *nvchan = nouveau_channel(chan);
-	struct nouveau_pushbuf_priv *nvpb = &nvchan->pb;
-	int ret;
-
-	nouveau_pushbuf_init_call(chan);
-
-	ret = nouveau_pushbuf_space(chan, 0);
-	if (ret) {
-		if (nvpb->use_cal) {
-			nouveau_pushbuf_fini_call(chan);
-			ret = nouveau_pushbuf_space(chan, 0);
-		}
-
-		if (ret)
-			return ret;
-	}
-
-	nvpb->buffers = calloc(NOUVEAU_GEM_MAX_BUFFERS,
-			       sizeof(struct drm_nouveau_gem_pushbuf_bo));
-	nvpb->relocs = calloc(NOUVEAU_GEM_MAX_RELOCS,
-			      sizeof(struct drm_nouveau_gem_pushbuf_reloc));
-	
-	chan->pushbuf = &nvpb->base;
-	return 0;
-}
-
-int
-nouveau_pushbuf_flush(struct nouveau_channel *chan, unsigned min)
-{
-	struct nouveau_device_priv *nvdev = nouveau_device(chan->device);
-	struct nouveau_channel_priv *nvchan = nouveau_channel(chan);
-	struct nouveau_pushbuf_priv *nvpb = &nvchan->pb;
-	unsigned i;
-	int ret;
-
-	if (nvpb->base.remaining == nvpb->size)
-		return 0;
-
-	if (nvpb->use_cal) {
-		struct drm_nouveau_gem_pushbuf_call req;
-
-		*(nvpb->base.cur++) = nvpb->cal_suffix0;
-		*(nvpb->base.cur++) = nvpb->cal_suffix1;
-		if (nvpb->base.remaining > 2) /* space() will fixup if not */
-			nvpb->base.remaining -= 2;
-
-restart_cal:
-		req.channel = chan->id;
-		req.handle = nvpb->buffer[nvpb->current]->handle;
-		req.offset = nvpb->current_offset * 4;
-		req.nr_buffers = nvpb->nr_buffers;
-		req.buffers = (uint64_t)(unsigned long)nvpb->buffers;
-		req.nr_relocs = nvpb->nr_relocs;
-		req.relocs = (uint64_t)(unsigned long)nvpb->relocs;
-		req.nr_dwords = (nvpb->base.cur - nvpb->pushbuf) -
-				nvpb->current_offset;
-		req.suffix0 = nvpb->cal_suffix0;
-		req.suffix1 = nvpb->cal_suffix1;
-		ret = drmCommandWriteRead(nvdev->fd, nvpb->no_aper_update ?
-					  DRM_NOUVEAU_GEM_PUSHBUF_CALL :
-					  DRM_NOUVEAU_GEM_PUSHBUF_CALL2,
-					  &req, sizeof(req));
-		if (ret == -EAGAIN)
-			goto restart_cal;
-		nvpb->cal_suffix0 = req.suffix0;
-		nvpb->cal_suffix1 = req.suffix1;
-		if (!nvpb->no_aper_update) {
-			nvdev->base.vm_vram_size = req.vram_available;
-			nvdev->base.vm_gart_size = req.gart_available;
-		}
-	} else {
-		struct drm_nouveau_gem_pushbuf req;
-
-restart_push:
-		req.channel = chan->id;
-		req.nr_dwords = nvpb->size - nvpb->base.remaining;
-		req.dwords = (uint64_t)(unsigned long)nvpb->pushbuf;
-		req.nr_buffers = nvpb->nr_buffers;
-		req.buffers = (uint64_t)(unsigned long)nvpb->buffers;
-		req.nr_relocs = nvpb->nr_relocs;
-		req.relocs = (uint64_t)(unsigned long)nvpb->relocs;
-		ret = drmCommandWrite(nvdev->fd, DRM_NOUVEAU_GEM_PUSHBUF,
-				      &req, sizeof(req));
-		if (ret == -EAGAIN)
-			goto restart_push;
-	}
-
-
-	/* Update presumed offset/domain for any buffers that moved.
-	 * Dereference all buffers on validate list
-	 */
-	for (i = 0; i < nvpb->nr_relocs; i++) {
-		struct drm_nouveau_gem_pushbuf_reloc *r = &nvpb->relocs[i];
-		struct drm_nouveau_gem_pushbuf_bo *pbbo =
-			&nvpb->buffers[r->bo_index];
-		struct nouveau_bo *bo = (void *)(unsigned long)pbbo->user_priv;
-		struct nouveau_bo_priv *nvbo = nouveau_bo(bo);
-
-		if (--nvbo->pending_refcnt)
-			continue;
-
-		if (pbbo->presumed_ok == 0) {
-			nvbo->domain = pbbo->presumed_domain;
-			nvbo->offset = pbbo->presumed_offset;
-		}
-
-		nvbo->pending = NULL;
-		nouveau_bo_ref(NULL, &bo);
-	}
-
-	nvpb->nr_buffers = 0;
-	nvpb->nr_relocs = 0;
-
-	/* Allocate space for next push buffer */
-	assert(!nouveau_pushbuf_space(chan, min));
-
-	if (chan->flush_notify)
-		chan->flush_notify(chan);
-
-	nvpb->marker = 0;
-	return ret;
-}
-
-int
-nouveau_pushbuf_marker_emit(struct nouveau_channel *chan,
-			    unsigned wait_dwords, unsigned wait_relocs)
-{
-	struct nouveau_pushbuf_priv *nvpb = nouveau_pushbuf(chan->pushbuf);
-
-	if (AVAIL_RING(chan) < wait_dwords)
-		return nouveau_pushbuf_flush(chan, wait_dwords);
-
-	if (nvpb->nr_relocs + wait_relocs >= NOUVEAU_GEM_MAX_RELOCS)
-		return nouveau_pushbuf_flush(chan, wait_dwords);
-
-	nvpb->marker = nvpb->base.cur - nvpb->pushbuf;
-	nvpb->marker_relocs = nvpb->nr_relocs;
-	return 0;
-}
-
-void
-nouveau_pushbuf_marker_undo(struct nouveau_channel *chan)
-{
-	struct nouveau_pushbuf_priv *nvpb = nouveau_pushbuf(chan->pushbuf);
-	unsigned i;
-
-	if (!nvpb->marker)
-		return;
-
-	/* undo any relocs/buffers added to the list since last marker */
-	for (i = nvpb->marker_relocs; i < nvpb->nr_relocs; i++) {
-		struct drm_nouveau_gem_pushbuf_reloc *r = &nvpb->relocs[i];
-		struct drm_nouveau_gem_pushbuf_bo *pbbo =
-			&nvpb->buffers[r->bo_index];
-		struct nouveau_bo *bo = (void *)(unsigned long)pbbo->user_priv;
-		struct nouveau_bo_priv *nvbo = nouveau_bo(bo);
-
-		if (--nvbo->pending_refcnt)
-			continue;
-
-		nvbo->pending = NULL;
-		nouveau_bo_ref(NULL, &bo);
-		nvpb->nr_buffers--;
-	}
-	nvpb->nr_relocs = nvpb->marker_relocs;
-
-	/* reset pushbuf back to last marker */
-	nvpb->base.cur = nvpb->pushbuf + nvpb->marker;
-	nvpb->base.remaining = nvpb->size - nvpb->marker;
-	nvpb->marker = 0;
-}
-
-
diff --git a/libdrm/nouveau/nouveau_pushbuf.h b/libdrm/nouveau/nouveau_pushbuf.h
deleted file mode 100644
index c7ac8c45..00000000
--- a/libdrm/nouveau/nouveau_pushbuf.h
+++ /dev/null
@@ -1,196 +0,0 @@
-/*
- * Copyright 2007 Nouveau Project
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
- * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef __NOUVEAU_PUSHBUF_H__
-#define __NOUVEAU_PUSHBUF_H__
-
-#include <assert.h>
-#include <string.h>
-
-#include "nouveau_bo.h"
-#include "nouveau_grobj.h"
-
-struct nouveau_pushbuf {
-	struct nouveau_channel *channel;
-
-	unsigned remaining;
-	uint32_t *cur;
-};
-
-int
-nouveau_pushbuf_flush(struct nouveau_channel *, unsigned min);
-
-int
-nouveau_pushbuf_marker_emit(struct nouveau_channel *chan,
-			    unsigned wait_dwords, unsigned wait_relocs);
-
-void
-nouveau_pushbuf_marker_undo(struct nouveau_channel *chan);
-
-int
-nouveau_pushbuf_emit_reloc(struct nouveau_channel *, void *ptr,
-			   struct nouveau_bo *, uint32_t data, uint32_t data2,
-			   uint32_t flags, uint32_t vor, uint32_t tor);
-
-/* Push buffer access macros */
-static __inline__ int
-MARK_RING(struct nouveau_channel *chan, unsigned dwords, unsigned relocs)
-{
-	return nouveau_pushbuf_marker_emit(chan, dwords, relocs);
-}
-
-static __inline__ void
-MARK_UNDO(struct nouveau_channel *chan)
-{
-	nouveau_pushbuf_marker_undo(chan);
-}
-
-static __inline__ void
-OUT_RING(struct nouveau_channel *chan, unsigned data)
-{
-	*(chan->pushbuf->cur++) = (data);
-}
-
-static __inline__ void
-OUT_RINGp(struct nouveau_channel *chan, const void *data, unsigned size)
-{
-	memcpy(chan->pushbuf->cur, data, size * 4);
-	chan->pushbuf->cur += size;
-}
-
-static __inline__ void
-OUT_RINGf(struct nouveau_channel *chan, float f)
-{
-	union { uint32_t i; float f; } c;
-	c.f = f;
-	OUT_RING(chan, c.i);
-}
-
-static __inline__ unsigned
-AVAIL_RING(struct nouveau_channel *chan)
-{
-	return chan->pushbuf->remaining;
-}
-
-static __inline__ void
-WAIT_RING(struct nouveau_channel *chan, unsigned size)
-{
-	if (chan->pushbuf->remaining < size)
-		nouveau_pushbuf_flush(chan, size);
-}
-
-static __inline__ void
-BEGIN_RING(struct nouveau_channel *chan, struct nouveau_grobj *gr,
-	   unsigned mthd, unsigned size)
-{
-	if (gr->bound == NOUVEAU_GROBJ_UNBOUND)
-		nouveau_grobj_autobind(gr);
-	chan->subc[gr->subc].sequence = chan->subc_sequence++;
-
-	WAIT_RING(chan, size + 1);
-	OUT_RING(chan, (gr->subc << 13) | (size << 18) | mthd);
-	chan->pushbuf->remaining -= (size + 1);
-}
-
-static __inline__ void
-FIRE_RING(struct nouveau_channel *chan)
-{
-	nouveau_pushbuf_flush(chan, 0);
-}
-
-static __inline__ void
-BIND_RING(struct nouveau_channel *chan, struct nouveau_grobj *gr, unsigned sc)
-{
-	struct nouveau_subchannel *subc = &gr->channel->subc[sc];
-	
-	if (subc->gr) {
-		if (subc->gr->bound == NOUVEAU_GROBJ_BOUND_EXPLICIT)
-			assert(0);
-		subc->gr->bound = NOUVEAU_GROBJ_UNBOUND;
-	}
-	subc->gr = gr;
-	subc->gr->subc = sc;
-	subc->gr->bound = NOUVEAU_GROBJ_BOUND_EXPLICIT;
-
-	BEGIN_RING(chan, gr, 0x0000, 1);
-	OUT_RING  (chan, gr->handle);
-}
-
-static __inline__ int
-OUT_RELOC(struct nouveau_channel *chan, struct nouveau_bo *bo,
-	  unsigned data, unsigned flags, unsigned vor, unsigned tor)
-{
-	return nouveau_pushbuf_emit_reloc(chan, chan->pushbuf->cur++, bo,
-					  data, 0, flags, vor, tor);
-}
-
-static __inline__ int
-OUT_RELOC2(struct nouveau_channel *chan, struct nouveau_bo *bo,
-	   unsigned data, unsigned data2, unsigned flags,
-	   unsigned vor, unsigned tor)
-{
-	return nouveau_pushbuf_emit_reloc(chan, chan->pushbuf->cur++, bo,
-					  data, data2, flags, vor, tor);
-}
-
-/* Raw data + flags depending on FB/TT buffer */
-static __inline__ int
-OUT_RELOCd(struct nouveau_channel *chan, struct nouveau_bo *bo,
-	   unsigned data, unsigned flags, unsigned vor, unsigned tor)
-{
-	return OUT_RELOC(chan, bo, data, flags | NOUVEAU_BO_OR, vor, tor);
-}
-
-/* FB/TT object handle */
-static __inline__ int
-OUT_RELOCo(struct nouveau_channel *chan, struct nouveau_bo *bo,
-	   unsigned flags)
-{
-	return OUT_RELOC(chan, bo, 0, flags | NOUVEAU_BO_OR,
-			 chan->vram->handle, chan->gart->handle);
-}
-
-/* Low 32-bits of offset */
-static __inline__ int
-OUT_RELOCl(struct nouveau_channel *chan, struct nouveau_bo *bo,
-	   unsigned delta, unsigned flags)
-{
-	return OUT_RELOC(chan, bo, delta, flags | NOUVEAU_BO_LOW, 0, 0);
-}
-
-/* Low 32-bits of offset + GPU linear access range info */
-static __inline__ int
-OUT_RELOCr(struct nouveau_channel *chan, struct nouveau_bo *bo,
-	   unsigned delta, unsigned size, unsigned flags)
-{
-	return OUT_RELOC2(chan, bo, delta, size, flags | NOUVEAU_BO_LOW, 0, 0);
-}
-
-/* High 32-bits of offset */
-static __inline__ int
-OUT_RELOCh(struct nouveau_channel *chan, struct nouveau_bo *bo,
-	   unsigned delta, unsigned flags)
-{
-	return OUT_RELOC(chan, bo, delta, flags | NOUVEAU_BO_HIGH, 0, 0);
-}
-
-#endif
diff --git a/libdrm/nouveau/nouveau_resource.c b/libdrm/nouveau/nouveau_resource.c
deleted file mode 100644
index 6bef7567..00000000
--- a/libdrm/nouveau/nouveau_resource.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/*
- * Copyright 2007 Nouveau Project
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
- * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <stdlib.h>
-#include <errno.h>
-
-#include "nouveau_private.h"
-
-int
-nouveau_resource_init(struct nouveau_resource **heap,
-		      unsigned start, unsigned size)
-{
-	struct nouveau_resource *r;
-
-	r = calloc(1, sizeof(struct nouveau_resource));
-	if (!r)
-		return 1;
-
-	r->start = start;
-	r->size  = size;
-	*heap = r;
-	return 0;
-}
-
-int
-nouveau_resource_alloc(struct nouveau_resource *heap, unsigned size, void *priv,
-		       struct nouveau_resource **res)
-{
-	struct nouveau_resource *r;
-
-	if (!heap || !size || !res || *res)
-		return 1;
-
-	while (heap) {
-		if (!heap->in_use && heap->size >= size) {
-			r = calloc(1, sizeof(struct nouveau_resource));
-			if (!r)
-				return 1;
-
-			r->start  = (heap->start + heap->size) - size;
-			r->size   = size;
-			r->in_use = 1;
-			r->priv   = priv;
-
-			heap->size -= size;
-
-			r->next = heap->next;
-			if (heap->next)
-				heap->next->prev = r;
-			r->prev = heap;
-			heap->next = r;
-
-			*res = r;
-			return 0;
-		}
-			
-		heap = heap->next;
-	}
-
-	return 1;
-}
-
-void
-nouveau_resource_free(struct nouveau_resource **res)
-{
-	struct nouveau_resource *r;
-
-	if (!res || !*res)
-		return;
-	r = *res;
-	*res = NULL;
-
-	r->in_use = 0;
-
-	if (r->next && !r->next->in_use) {
-		struct nouveau_resource *new = r->next;
-
-		new->prev = r->prev;
-		if (r->prev)
-			r->prev->next = new;
-		new->size += r->size;
-		new->start = r->start;
-
-		free(r);
-		r = new;
-	}
-
-	if (r->prev && !r->prev->in_use) {
-		r->prev->next = r->next;
-		if (r->next)
-			r->next->prev = r->prev;
-		r->prev->size += r->size;
-		free(r);
-	}
-	
-}
diff --git a/libdrm/nouveau/nouveau_resource.h b/libdrm/nouveau/nouveau_resource.h
deleted file mode 100644
index 988d2466..00000000
--- a/libdrm/nouveau/nouveau_resource.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * Copyright 2007 Nouveau Project
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
- * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef __NOUVEAU_RESOURCE_H__
-#define __NOUVEAU_RESOURCE_H__
-
-struct nouveau_resource {
-	struct nouveau_resource *prev;
-	struct nouveau_resource *next;
-
-	int in_use;
-	void *priv;
-
-	unsigned int start;
-	unsigned int size;
-};
-
-int
-nouveau_resource_init(struct nouveau_resource **heap, unsigned start,
-		      unsigned size);
-
-int
-nouveau_resource_alloc(struct nouveau_resource *heap, unsigned size, void *priv,
-		       struct nouveau_resource **);
-
-void
-nouveau_resource_free(struct nouveau_resource **);
-
-#endif
diff --git a/libdrm/radeon/Makefile.am b/libdrm/radeon/Makefile.am
deleted file mode 100644
index 97801ead..00000000
--- a/libdrm/radeon/Makefile.am
+++ /dev/null
@@ -1,54 +0,0 @@
-# Copyright © 2008 Jérôme Glisse
-#
-# Permission is hereby granted, free of charge, to any person obtaining a
-# copy of this software and associated documentation files (the "Software"),
-# to deal in the Software without restriction, including without limitation
-# the rights to use, copy, modify, merge, publish, distribute, sublicense,
-# and/or sell copies of the Software, and to permit persons to whom the
-# Software is furnished to do so, subject to the following conditions:
-#
-# The above copyright notice and this permission notice (including the next
-# paragraph) shall be included in all copies or substantial portions of the
-# Software.
-#
-# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
-# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
-# IN THE SOFTWARE.
-#
-# Authors:
-#    Jérôme Glisse <glisse@freedesktop.org>
-
-AM_CFLAGS = \
-	$(WARN_CFLAGS) \
-	-I$(top_srcdir)/libdrm \
-	-I$(top_srcdir)/libdrm/radeon \
-	$(PTHREADSTUBS_CFLAGS) \
-	-I$(top_srcdir)/include/drm
-
-libdrm_radeon_la_LTLIBRARIES = libdrm_radeon.la
-libdrm_radeon_ladir = $(libdir)
-libdrm_radeon_la_LDFLAGS = -version-number 1:0:0 -no-undefined
-libdrm_radeon_la_LIBADD = ../libdrm.la @PTHREADSTUBS_LIBS@
-
-libdrm_radeon_la_SOURCES = \
-	radeon_bo_gem.c \
-	radeon_cs_gem.c \
-	radeon_cs_space.c \
-	radeon_track.c
-
-libdrm_radeonincludedir = ${includedir}/drm
-libdrm_radeoninclude_HEADERS = \
-	radeon_bo.h \
-	radeon_cs.h \
-	radeon_bo_gem.h \
-	radeon_cs_gem.h \
-	radeon_track.h
-
-pkgconfigdir = @pkgconfigdir@
-pkgconfig_DATA = libdrm_radeon.pc
-
-EXTRA_DIST = libdrm_radeon.pc.in
diff --git a/libdrm/radeon/libdrm_radeon.pc.in b/libdrm/radeon/libdrm_radeon.pc.in
deleted file mode 100644
index 33068448..00000000
--- a/libdrm/radeon/libdrm_radeon.pc.in
+++ /dev/null
@@ -1,10 +0,0 @@
-prefix=@prefix@
-exec_prefix=@exec_prefix@
-libdir=@libdir@
-includedir=@includedir@
-
-Name: libdrm_radeon
-Description: Userspace interface to kernel DRM services for radeon
-Version: 1.0.1
-Libs: -L${libdir} -ldrm_radeon
-Cflags: -I${includedir} -I${includedir}/drm
diff --git a/libdrm/radeon/radeon_bo.h b/libdrm/radeon/radeon_bo.h
deleted file mode 100644
index 1e2e6c20..00000000
--- a/libdrm/radeon/radeon_bo.h
+++ /dev/null
@@ -1,215 +0,0 @@
-/* 
- * Copyright © 2008 Jérôme Glisse
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
- * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- */
-/*
- * Authors:
- *      Jérôme Glisse <glisse@freedesktop.org>
- */
-#ifndef RADEON_BO_H
-#define RADEON_BO_H
-
-#include <stdio.h>
-#include <stdint.h>
-#include "radeon_track.h"
-
-/* bo object */
-#define RADEON_BO_FLAGS_MACRO_TILE  1
-#define RADEON_BO_FLAGS_MICRO_TILE  2
-
-struct radeon_bo_manager;
-
-struct radeon_bo {
-    uint32_t                    alignment;
-    uint32_t                    handle;
-    uint32_t                    size;
-    uint32_t                    domains;
-    uint32_t                    flags;
-    unsigned                    cref;
-#ifdef RADEON_BO_TRACK
-    struct radeon_track         *track;
-#endif
-    void                        *ptr;
-    struct radeon_bo_manager    *bom;
-    uint32_t                    space_accounted;
-};
-
-/* bo functions */
-struct radeon_bo_funcs {
-    struct radeon_bo *(*bo_open)(struct radeon_bo_manager *bom,
-                                 uint32_t handle,
-                                 uint32_t size,
-                                 uint32_t alignment,
-                                 uint32_t domains,
-                                 uint32_t flags);
-    void (*bo_ref)(struct radeon_bo *bo);
-    struct radeon_bo *(*bo_unref)(struct radeon_bo *bo);
-    int (*bo_map)(struct radeon_bo *bo, int write);
-    int (*bo_unmap)(struct radeon_bo *bo);
-    int (*bo_wait)(struct radeon_bo *bo);
-    int (*bo_is_static)(struct radeon_bo *bo);
-    int (*bo_set_tiling)(struct radeon_bo *bo, uint32_t tiling_flags,
-			  uint32_t pitch);
-    int (*bo_get_tiling)(struct radeon_bo *bo, uint32_t *tiling_flags,
-			  uint32_t *pitch);
-    int (*bo_is_busy)(struct radeon_bo *bo, uint32_t *domain);
-};
-
-struct radeon_bo_manager {
-    struct radeon_bo_funcs  *funcs;
-    int                     fd;
-    struct radeon_tracker   tracker;
-};
-    
-static inline void _radeon_bo_debug(struct radeon_bo *bo,
-                                    const char *op,
-                                    const char *file,
-                                    const char *func,
-                                    int line)
-{
-    fprintf(stderr, "%s %p 0x%08X 0x%08X 0x%08X [%s %s %d]\n",
-            op, bo, bo->handle, bo->size, bo->cref, file, func, line);
-}
-
-static inline struct radeon_bo *_radeon_bo_open(struct radeon_bo_manager *bom,
-                                                uint32_t handle,
-                                                uint32_t size,
-                                                uint32_t alignment,
-                                                uint32_t domains,
-                                                uint32_t flags,
-                                                const char *file,
-                                                const char *func,
-                                                int line)
-{
-    struct radeon_bo *bo;
-
-    bo = bom->funcs->bo_open(bom, handle, size, alignment, domains, flags);
-#ifdef RADEON_BO_TRACK
-    if (bo) {
-        bo->track = radeon_tracker_add_track(&bom->tracker, bo->handle);
-        radeon_track_add_event(bo->track, file, func, "open", line);
-    }
-#endif
-    return bo;
-}
-
-static inline void _radeon_bo_ref(struct radeon_bo *bo,
-                                  const char *file,
-                                  const char *func,
-                                  int line)
-{
-    bo->cref++;
-#ifdef RADEON_BO_TRACK
-    radeon_track_add_event(bo->track, file, func, "ref", line); 
-#endif
-    bo->bom->funcs->bo_ref(bo);
-}
-
-static inline struct radeon_bo *_radeon_bo_unref(struct radeon_bo *bo,
-                                                 const char *file,
-                                                 const char *func,
-                                                 int line)
-{
-    bo->cref--;
-#ifdef RADEON_BO_TRACK
-    radeon_track_add_event(bo->track, file, func, "unref", line);
-    if (bo->cref <= 0) {
-        radeon_tracker_remove_track(&bo->bom->tracker, bo->track);
-        bo->track = NULL;
-    }
-#endif
-    return bo->bom->funcs->bo_unref(bo);
-}
-
-static inline int _radeon_bo_map(struct radeon_bo *bo,
-                                 int write,
-                                 const char *file,
-                                 const char *func,
-                                 int line)
-{
-    return bo->bom->funcs->bo_map(bo, write);
-}
-
-static inline int _radeon_bo_unmap(struct radeon_bo *bo,
-                                   const char *file,
-                                   const char *func,
-                                   int line)
-{
-    return bo->bom->funcs->bo_unmap(bo);
-}
-
-static inline int _radeon_bo_wait(struct radeon_bo *bo,
-                                  const char *file,
-                                  const char *func,
-                                  int line)
-{
-    return bo->bom->funcs->bo_wait(bo);
-}
-
-static inline int _radeon_bo_is_busy(struct radeon_bo *bo,
-				     uint32_t *domain,
-                                     const char *file,
-                                     const char *func,
-                                     int line)
-{
-    return bo->bom->funcs->bo_is_busy(bo, domain);
-}
-
-static inline int radeon_bo_set_tiling(struct radeon_bo *bo,
-				       uint32_t tiling_flags, uint32_t pitch)
-{
-    return bo->bom->funcs->bo_set_tiling(bo, tiling_flags, pitch);
-}
-
-static inline int radeon_bo_get_tiling(struct radeon_bo *bo,
-				       uint32_t *tiling_flags, uint32_t *pitch)
-{
-    return bo->bom->funcs->bo_get_tiling(bo, tiling_flags, pitch);
-}
-
-static inline int radeon_bo_is_static(struct radeon_bo *bo)
-{
-    if (bo->bom->funcs->bo_is_static)
-	return bo->bom->funcs->bo_is_static(bo);
-    return 0;
-}
-
-#define radeon_bo_open(bom, h, s, a, d, f)\
-    _radeon_bo_open(bom, h, s, a, d, f, __FILE__, __FUNCTION__, __LINE__)
-#define radeon_bo_ref(bo)\
-    _radeon_bo_ref(bo, __FILE__, __FUNCTION__, __LINE__)
-#define radeon_bo_unref(bo)\
-    _radeon_bo_unref(bo, __FILE__, __FUNCTION__, __LINE__)
-#define radeon_bo_map(bo, w)\
-    _radeon_bo_map(bo, w, __FILE__, __FUNCTION__, __LINE__)
-#define radeon_bo_unmap(bo)\
-    _radeon_bo_unmap(bo, __FILE__, __FUNCTION__, __LINE__)
-#define radeon_bo_debug(bo, opcode)\
-    _radeon_bo_debug(bo, opcode, __FILE__, __FUNCTION__, __LINE__)
-#define radeon_bo_wait(bo) \
-    _radeon_bo_wait(bo, __FILE__, __func__, __LINE__)
-#define radeon_bo_is_busy(bo, domain) \
-    _radeon_bo_is_busy(bo, domain, __FILE__, __func__, __LINE__)
-
-#endif
diff --git a/libdrm/radeon/radeon_bo_gem.c b/libdrm/radeon/radeon_bo_gem.c
deleted file mode 100644
index d34f24cd..00000000
--- a/libdrm/radeon/radeon_bo_gem.c
+++ /dev/null
@@ -1,343 +0,0 @@
-/* 
- * Copyright © 2008 Dave Airlie
- * Copyright © 2008 Jérôme Glisse
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
- * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- */
-/*
- * Authors:
- *      Dave Airlie
- *      Jérôme Glisse <glisse@freedesktop.org>
- */
-#ifdef HAVE_CONFIG_H
-#include <config.h>
-#endif
-#include <stdio.h>
-#include <stdint.h>
-#include <stdlib.h>
-#include <string.h>
-#include <sys/mman.h>
-#include <sys/ioctl.h>
-#include <errno.h>
-#include "xf86drm.h"
-#include "drm.h"
-#include "radeon_drm.h"
-#include "radeon_bo.h"
-#include "radeon_bo_gem.h"
-
-struct radeon_bo_gem {
-    struct radeon_bo    base;
-    uint32_t            name;
-    int                 map_count;
-    void *priv_ptr;
-};
-
-struct bo_manager_gem {
-    struct radeon_bo_manager    base;
-};
-
-static int bo_wait(struct radeon_bo *bo);
-
-static struct radeon_bo *bo_open(struct radeon_bo_manager *bom,
-                                 uint32_t handle,
-                                 uint32_t size,
-                                 uint32_t alignment,
-                                 uint32_t domains,
-                                 uint32_t flags)
-{
-    struct radeon_bo_gem *bo;
-    int r;
-
-    bo = (struct radeon_bo_gem*)calloc(1, sizeof(struct radeon_bo_gem));
-    if (bo == NULL) {
-        return NULL;
-    }
-
-    bo->base.bom = bom;
-    bo->base.handle = 0;
-    bo->base.size = size;
-    bo->base.alignment = alignment;
-    bo->base.domains = domains;
-    bo->base.flags = flags;
-    bo->base.ptr = NULL;
-    bo->map_count = 0;
-    if (handle) {
-        struct drm_gem_open open_arg;
-
-        memset(&open_arg, 0, sizeof(open_arg));
-        open_arg.name = handle;
-        r = ioctl(bom->fd, DRM_IOCTL_GEM_OPEN, &open_arg);
-        if (r != 0) {
-            free(bo);
-            return NULL;
-        }
-        bo->base.handle = open_arg.handle;
-        bo->base.size = open_arg.size;
-        bo->name = handle;
-    } else {
-        struct drm_radeon_gem_create args;
-
-        args.size = size;
-        args.alignment = alignment;
-        args.initial_domain = bo->base.domains;
-        args.flags = 0;
-        args.handle = 0;
-        r = drmCommandWriteRead(bom->fd, DRM_RADEON_GEM_CREATE,
-                                &args, sizeof(args));
-        bo->base.handle = args.handle;
-        if (r) {
-            fprintf(stderr, "Failed to allocate :\n");
-            fprintf(stderr, "   size      : %d bytes\n", size);
-            fprintf(stderr, "   alignment : %d bytes\n", alignment);
-            fprintf(stderr, "   domains   : %d\n", bo->base.domains);
-            free(bo);
-            return NULL;
-        }
-    }
-    radeon_bo_ref((struct radeon_bo*)bo);
-    return (struct radeon_bo*)bo;
-}
-
-static void bo_ref(struct radeon_bo *bo)
-{
-}
-
-static struct radeon_bo *bo_unref(struct radeon_bo *bo)
-{
-    struct radeon_bo_gem *bo_gem = (struct radeon_bo_gem*)bo;
-    struct drm_gem_close args;
-
-    if (bo == NULL) {
-        return NULL;
-    }
-    if (bo->cref) {
-        return bo;
-    }
-    if (bo_gem->priv_ptr) {
-        munmap(bo_gem->priv_ptr, bo->size);
-    }
-
-    /* Zero out args to make valgrind happy */
-    memset(&args, 0, sizeof(args));
-
-    /* close object */
-    args.handle = bo->handle;
-    ioctl(bo->bom->fd, DRM_IOCTL_GEM_CLOSE, &args);
-    memset(bo_gem, 0, sizeof(struct radeon_bo_gem));
-    free(bo_gem);
-    return NULL;
-}
-
-static int bo_map(struct radeon_bo *bo, int write)
-{
-    struct radeon_bo_gem *bo_gem = (struct radeon_bo_gem*)bo;
-    struct drm_radeon_gem_mmap args;
-    int r;
-    void *ptr;
-
-    if (bo_gem->map_count++ != 0) {
-        return 0;
-    }
-    if (bo_gem->priv_ptr) {
-	goto wait;
-    }
-
-    bo->ptr = NULL;
-
-    /* Zero out args to make valgrind happy */
-    memset(&args, 0, sizeof(args));
-    args.handle = bo->handle;
-    args.offset = 0;
-    args.size = (uint64_t)bo->size;
-    r = drmCommandWriteRead(bo->bom->fd,
-                            DRM_RADEON_GEM_MMAP,
-                            &args,
-                            sizeof(args));
-    if (r) {
-        fprintf(stderr, "error mapping %p 0x%08X (error = %d)\n",
-                bo, bo->handle, r);
-        return r;
-    }
-    ptr = mmap(0, args.size, PROT_READ|PROT_WRITE, MAP_SHARED, bo->bom->fd, args.addr_ptr);
-    if (ptr == MAP_FAILED)
-        return -errno;
-    bo_gem->priv_ptr = ptr;
-wait:
-    bo->ptr = bo_gem->priv_ptr;
-    r = bo_wait(bo);
-    if (r)
-	return r;
-    return 0;
-}
-
-static int bo_unmap(struct radeon_bo *bo)
-{
-    struct radeon_bo_gem *bo_gem = (struct radeon_bo_gem*)bo;
-
-    if (--bo_gem->map_count > 0) {
-        return 0;
-    }
-    //munmap(bo->ptr, bo->size);
-    bo->ptr = NULL;
-    return 0;
-}
-
-static int bo_wait(struct radeon_bo *bo)
-{
-    struct drm_radeon_gem_wait_idle args;
-    int ret;
-
-    /* Zero out args to make valgrind happy */
-    memset(&args, 0, sizeof(args));
-    args.handle = bo->handle;
-    do {
-        ret = drmCommandWriteRead(bo->bom->fd, DRM_RADEON_GEM_WAIT_IDLE,
-                                  &args, sizeof(args));
-    } while (ret == -EBUSY);
-    return ret;
-}
-
-static int bo_is_busy(struct radeon_bo *bo, uint32_t *domain)
-{
-    struct drm_radeon_gem_busy args;
-    int ret;
-
-    args.handle = bo->handle;
-    args.domain = 0;
-
-    ret = drmCommandWriteRead(bo->bom->fd, DRM_RADEON_GEM_BUSY,
-	    &args, sizeof(args));
-
-    *domain = args.domain;
-    return ret;
-}
-
-static int bo_set_tiling(struct radeon_bo *bo, uint32_t tiling_flags,
-				 uint32_t pitch)
-{
-    struct drm_radeon_gem_set_tiling args;
-    int r;
-
-    args.handle = bo->handle;
-    args.tiling_flags = tiling_flags;
-    args.pitch = pitch;
-
-    r = drmCommandWriteRead(bo->bom->fd,
-			    DRM_RADEON_GEM_SET_TILING,
-			    &args,
-			    sizeof(args));
-    return r;
-}
-
-static int bo_get_tiling(struct radeon_bo *bo, uint32_t *tiling_flags,
-				 uint32_t *pitch)
-{
-    struct drm_radeon_gem_set_tiling args;
-    int r;
-
-    args.handle = bo->handle;
-
-    r = drmCommandWriteRead(bo->bom->fd,
-			    DRM_RADEON_GEM_GET_TILING,
-			    &args,
-			    sizeof(args));
-
-    if (r)
-	return r;
-
-    *tiling_flags = args.tiling_flags;
-    *pitch = args.pitch;
-    return r;
-}
-
-static struct radeon_bo_funcs bo_gem_funcs = {
-    bo_open,
-    bo_ref,
-    bo_unref,
-    bo_map,
-    bo_unmap,
-    bo_wait,
-    NULL,
-    bo_set_tiling,
-    bo_get_tiling,
-    bo_is_busy,
-};
-
-struct radeon_bo_manager *radeon_bo_manager_gem_ctor(int fd)
-{
-    struct bo_manager_gem *bomg;
-
-    bomg = (struct bo_manager_gem*)calloc(1, sizeof(struct bo_manager_gem));
-    if (bomg == NULL) {
-        return NULL;
-    }
-    bomg->base.funcs = &bo_gem_funcs;
-    bomg->base.fd = fd;
-    return (struct radeon_bo_manager*)bomg;
-}
-
-void radeon_bo_manager_gem_dtor(struct radeon_bo_manager *bom)
-{
-    struct bo_manager_gem *bomg = (struct bo_manager_gem*)bom;
-
-    if (bom == NULL) {
-        return;
-    }
-    free(bomg);
-}
-
-uint32_t radeon_gem_name_bo(struct radeon_bo *bo)
-{
-    struct radeon_bo_gem *bo_gem = (struct radeon_bo_gem*)bo;
-    return bo_gem->name;
-}
-
-int radeon_gem_get_kernel_name(struct radeon_bo *bo, uint32_t *name)
-{
-    struct drm_gem_flink flink;
-    int r;
-
-    flink.handle = bo->handle;
-    r = ioctl(bo->bom->fd, DRM_IOCTL_GEM_FLINK, &flink);
-    if (r) {
-	return r;
-    }
-    *name = flink.name;
-    return 0;
-}
-
-int radeon_gem_set_domain(struct radeon_bo *bo, uint32_t read_domains, uint32_t write_domain)
-{
-    struct drm_radeon_gem_set_domain args;
-    int r;
-
-    args.handle = bo->handle;
-    args.read_domains = read_domains;
-    args.write_domain = write_domain;
-
-    r = drmCommandWriteRead(bo->bom->fd,
-                            DRM_RADEON_GEM_SET_DOMAIN,
-                            &args,
-                            sizeof(args));
-    return r;
-}
diff --git a/libdrm/radeon/radeon_bo_gem.h b/libdrm/radeon/radeon_bo_gem.h
deleted file mode 100644
index 4a8df9ad..00000000
--- a/libdrm/radeon/radeon_bo_gem.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/* 
- * Copyright © 2008 Dave Airlie
- * Copyright © 2008 Jérôme Glisse
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
- * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- */
-/*
- * Authors:
- *      Dave Airlie
- *      Jérôme Glisse <glisse@freedesktop.org>
- */
-#ifndef RADEON_BO_GEM_H
-#define RADEON_BO_GEM_H
-
-#include "radeon_bo.h"
-
-struct radeon_bo_manager *radeon_bo_manager_gem_ctor(int fd);
-void radeon_bo_manager_gem_dtor(struct radeon_bo_manager *bom);
-
-uint32_t radeon_gem_name_bo(struct radeon_bo *bo);
-int radeon_gem_set_domain(struct radeon_bo *bo, uint32_t read_domains, uint32_t write_domain);
-int radeon_gem_get_kernel_name(struct radeon_bo *bo, uint32_t *name);
-#endif
diff --git a/libdrm/radeon/radeon_cs.h b/libdrm/radeon/radeon_cs.h
deleted file mode 100644
index 1117a850..00000000
--- a/libdrm/radeon/radeon_cs.h
+++ /dev/null
@@ -1,246 +0,0 @@
-/* 
- * Copyright © 2008 Nicolai Haehnle
- * Copyright © 2008 Jérôme Glisse
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- */
-/*
- * Authors:
- *      Aapo Tahkola <aet@rasterburn.org>
- *      Nicolai Haehnle <prefect_@gmx.net>
- *      Jérôme Glisse <glisse@freedesktop.org>
- */
-#ifndef RADEON_CS_H
-#define RADEON_CS_H
-
-#include <stdint.h>
-#include <string.h>
-#include "drm.h"
-#include "radeon_drm.h"
-#include "radeon_bo.h"
-
-struct radeon_cs_reloc {
-    struct radeon_bo    *bo;
-    uint32_t            read_domain;
-    uint32_t            write_domain;
-    uint32_t            flags;
-};
-
-
-#define RADEON_CS_SPACE_OK 0
-#define RADEON_CS_SPACE_OP_TO_BIG 1
-#define RADEON_CS_SPACE_FLUSH 2
-
-struct radeon_cs_space_check {
-    struct radeon_bo *bo;
-    uint32_t read_domains;
-    uint32_t write_domain;
-    uint32_t new_accounted;
-};
-
-#define MAX_SPACE_BOS (32)
-
-struct radeon_cs_manager;
-
-struct radeon_cs {
-    struct radeon_cs_manager    *csm;
-    void                        *relocs;
-    uint32_t                    *packets;
-    unsigned                    crelocs;
-    unsigned                    relocs_total_size;
-    unsigned                    cdw;
-    unsigned                    ndw;
-    int                         section;
-    unsigned                    section_ndw;
-    unsigned                    section_cdw;
-    const char                  *section_file;
-    const char                  *section_func;
-    int                         section_line;
-    struct radeon_cs_space_check bos[MAX_SPACE_BOS];
-    int                         bo_count;
-    void                        (*space_flush_fn)(void *);
-    void                        *space_flush_data;
-};
-
-/* cs functions */
-struct radeon_cs_funcs {
-    struct radeon_cs *(*cs_create)(struct radeon_cs_manager *csm,
-                                   uint32_t ndw);
-    int (*cs_write_reloc)(struct radeon_cs *cs,
-                          struct radeon_bo *bo,
-                          uint32_t read_domain,
-                          uint32_t write_domain,
-                          uint32_t flags);
-    int (*cs_begin)(struct radeon_cs *cs,
-                    uint32_t ndw,
-                    const char *file,
-                    const char *func,
-                    int line);
-    int (*cs_end)(struct radeon_cs *cs,
-                  const char *file,
-                  const char *func,
-                  int line);
-    int (*cs_emit)(struct radeon_cs *cs);
-    int (*cs_destroy)(struct radeon_cs *cs);
-    int (*cs_erase)(struct radeon_cs *cs);
-    int (*cs_need_flush)(struct radeon_cs *cs);
-    void (*cs_print)(struct radeon_cs *cs, FILE *file);
-};
-
-struct radeon_cs_manager {
-    struct radeon_cs_funcs  *funcs;
-    int                     fd;
-    int32_t vram_limit, gart_limit;
-    int32_t vram_write_used, gart_write_used;
-    int32_t read_used;
-};
-
-static inline struct radeon_cs *radeon_cs_create(struct radeon_cs_manager *csm,
-                                                 uint32_t ndw)
-{
-    return csm->funcs->cs_create(csm, ndw);
-}
-
-static inline int radeon_cs_write_reloc(struct radeon_cs *cs,
-                                        struct radeon_bo *bo,
-                                        uint32_t read_domain,
-                                        uint32_t write_domain,
-                                        uint32_t flags)
-{
-    return cs->csm->funcs->cs_write_reloc(cs,
-                                          bo,
-                                          read_domain,
-                                          write_domain,
-                                          flags);
-}
-
-static inline int radeon_cs_begin(struct radeon_cs *cs,
-                                  uint32_t ndw,
-                                  const char *file,
-                                  const char *func,
-                                  int line)
-{
-    return cs->csm->funcs->cs_begin(cs, ndw, file, func, line);
-}
-
-static inline int radeon_cs_end(struct radeon_cs *cs,
-                                const char *file,
-                                const char *func,
-                                int line)
-{
-    return cs->csm->funcs->cs_end(cs, file, func, line);
-}
-
-static inline int radeon_cs_emit(struct radeon_cs *cs)
-{
-    return cs->csm->funcs->cs_emit(cs);
-}
-
-static inline int radeon_cs_destroy(struct radeon_cs *cs)
-{
-    return cs->csm->funcs->cs_destroy(cs);
-}
-
-static inline int radeon_cs_erase(struct radeon_cs *cs)
-{
-    return cs->csm->funcs->cs_erase(cs);
-}
-
-static inline int radeon_cs_need_flush(struct radeon_cs *cs)
-{
-    return cs->csm->funcs->cs_need_flush(cs);
-}
-
-static inline void radeon_cs_print(struct radeon_cs *cs, FILE *file)
-{
-    cs->csm->funcs->cs_print(cs, file);
-}
-
-static inline void radeon_cs_set_limit(struct radeon_cs *cs, uint32_t domain, uint32_t limit)
-{
-    
-    if (domain == RADEON_GEM_DOMAIN_VRAM)
-	cs->csm->vram_limit = limit;
-    else
-	cs->csm->gart_limit = limit;
-}
-
-static inline void radeon_cs_write_dword(struct radeon_cs *cs, uint32_t dword)
-{
-    cs->packets[cs->cdw++] = dword;
-    if (cs->section) {
-        cs->section_cdw++;
-    }
-}
-
-static inline void radeon_cs_write_qword(struct radeon_cs *cs, uint64_t qword)
-{
-    memcpy(cs->packets + cs->cdw, &qword, sizeof(uint64_t));
-    cs->cdw += 2;
-    if (cs->section) {
-        cs->section_cdw += 2;
-    }
-}
-
-static inline void radeon_cs_write_table(struct radeon_cs *cs, void *data, uint32_t size)
-{
-	memcpy(cs->packets + cs->cdw, data, size * 4);
-	cs->cdw += size;
-	if (cs->section) {
-		cs->section_cdw += size;
-	}
-}
-
-static inline void radeon_cs_space_set_flush(struct radeon_cs *cs, void (*fn)(void *), void *data)
-{
-    cs->space_flush_fn = fn;
-    cs->space_flush_data = data;
-}
-
-
-/*
- * add a persistent BO to the list
- * a persistent BO is one that will be referenced across flushes,
- * i.e. colorbuffer, textures etc.
- * They get reset when a new "operation" happens, where an operation
- * is a state emission with a color/textures etc followed by a bunch of vertices.
- */
-void radeon_cs_space_add_persistent_bo(struct radeon_cs *cs,
-				       struct radeon_bo *bo,
-				       uint32_t read_domains,
-				       uint32_t write_domain);
-
-/* reset the persistent BO list */
-void radeon_cs_space_reset_bos(struct radeon_cs *cs);
-
-/* do a space check with the current persistent BO list */
-int radeon_cs_space_check(struct radeon_cs *cs);
-
-/* do a space check with the current persistent BO list and a temporary BO
- * a temporary BO is like a DMA buffer, which  gets flushed with the
- * command buffer */
-int radeon_cs_space_check_with_bo(struct radeon_cs *cs,
-				  struct radeon_bo *bo,
-				  uint32_t read_domains,
-				  uint32_t write_domain);
-
-#endif
diff --git a/libdrm/radeon/radeon_cs_gem.c b/libdrm/radeon/radeon_cs_gem.c
deleted file mode 100644
index 232ea7f3..00000000
--- a/libdrm/radeon/radeon_cs_gem.c
+++ /dev/null
@@ -1,458 +0,0 @@
-/* 
- * Copyright © 2008 Jérôme Glisse
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
- * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- */
-/*
- * Authors:
- *      Aapo Tahkola <aet@rasterburn.org>
- *      Nicolai Haehnle <prefect_@gmx.net>
- *      Jérôme Glisse <glisse@freedesktop.org>
- */
-#include <assert.h>
-#include <errno.h>
-#include <stdlib.h>
-#include <sys/mman.h>
-#include <sys/ioctl.h>
-#include "radeon_cs.h"
-#include "radeon_cs_gem.h"
-#include "radeon_bo_gem.h"
-#include "drm.h"
-#include "xf86drm.h"
-#include "radeon_drm.h"
-
-#pragma pack(1)
-struct cs_reloc_gem {
-    uint32_t    handle;
-    uint32_t    read_domain;
-    uint32_t    write_domain;
-    uint32_t    flags;
-};
-
-#pragma pack()
-#define RELOC_SIZE (sizeof(struct cs_reloc_gem) / sizeof(uint32_t))
-
-struct cs_gem {
-    struct radeon_cs            base;
-    struct drm_radeon_cs        cs;
-    struct drm_radeon_cs_chunk  chunks[2];
-    unsigned                    nrelocs;
-    uint32_t                    *relocs;
-    struct radeon_bo            **relocs_bo;
-};
-
-static struct radeon_cs *cs_gem_create(struct radeon_cs_manager *csm,
-                                       uint32_t ndw)
-{
-    struct cs_gem *csg;
-
-    /* max cmd buffer size is 64Kb */
-    if (ndw > (64 * 1024 / 4)) {
-        return NULL;
-    }
-    csg = (struct cs_gem*)calloc(1, sizeof(struct cs_gem));
-    if (csg == NULL) {
-        return NULL;
-    }
-    csg->base.csm = csm;
-    csg->base.ndw = 64 * 1024 / 4;
-    csg->base.packets = (uint32_t*)calloc(1, 64 * 1024);
-    if (csg->base.packets == NULL) {
-        free(csg);
-        return NULL;
-    }
-    csg->base.relocs_total_size = 0;
-    csg->base.crelocs = 0;
-    csg->nrelocs = 4096 / (4 * 4) ;
-    csg->relocs_bo = (struct radeon_bo**)calloc(1,
-                                                csg->nrelocs*sizeof(void*));
-    if (csg->relocs_bo == NULL) {
-        free(csg->base.packets);
-        free(csg);
-        return NULL;
-    }
-    csg->base.relocs = csg->relocs = (uint32_t*)calloc(1, 4096);
-    if (csg->relocs == NULL) {
-        free(csg->relocs_bo);
-        free(csg->base.packets);
-        free(csg);
-        return NULL;
-    }
-    csg->chunks[0].chunk_id = RADEON_CHUNK_ID_IB;
-    csg->chunks[0].length_dw = 0;
-    csg->chunks[0].chunk_data = (uint64_t)(uintptr_t)csg->base.packets;
-    csg->chunks[1].chunk_id = RADEON_CHUNK_ID_RELOCS;
-    csg->chunks[1].length_dw = 0;
-    csg->chunks[1].chunk_data = (uint64_t)(uintptr_t)csg->relocs;
-    return (struct radeon_cs*)csg;
-}
-
-static int cs_gem_write_reloc(struct radeon_cs *cs,
-                              struct radeon_bo *bo,
-                              uint32_t read_domain,
-                              uint32_t write_domain,
-                              uint32_t flags)
-{
-    struct cs_gem *csg = (struct cs_gem*)cs;
-    struct cs_reloc_gem *reloc;
-    uint32_t idx;
-    unsigned i;
-
-    assert(bo->space_accounted);
-
-    /* check domains */
-    if ((read_domain && write_domain) || (!read_domain && !write_domain)) {
-        /* in one CS a bo can only be in read or write domain but not
-         * in read & write domain at the same sime
-         */
-        return -EINVAL;
-    }
-    if (read_domain == RADEON_GEM_DOMAIN_CPU) {
-        return -EINVAL;
-    }
-    if (write_domain == RADEON_GEM_DOMAIN_CPU) {
-        return -EINVAL;
-    }
-    /* check if bo is already referenced */
-    for(i = 0; i < cs->crelocs; i++) {
-        idx = i * RELOC_SIZE;
-        reloc = (struct cs_reloc_gem*)&csg->relocs[idx];
-        if (reloc->handle == bo->handle) {
-            /* Check domains must be in read or write. As we check already
-             * checked that in argument one of the read or write domain was
-             * set we only need to check that if previous reloc as the read
-             * domain set then the read_domain should also be set for this
-             * new relocation.
-             */
-            /* the DDX expects to read and write from same pixmap */
-            if (write_domain && (reloc->read_domain & write_domain)) {
-                reloc->read_domain = 0;
-                reloc->write_domain = write_domain;
-            } else if (read_domain & reloc->write_domain) {
-                reloc->read_domain = 0;
-            } else {
-                if (write_domain != reloc->write_domain)
-                    return -EINVAL;
-                if (read_domain != reloc->read_domain)
-                    return -EINVAL;
-            }
-
-            reloc->read_domain |= read_domain;
-            reloc->write_domain |= write_domain;
-            /* update flags */
-            reloc->flags |= (flags & reloc->flags);
-            /* write relocation packet */
-            radeon_cs_write_dword(cs, 0xc0001000);
-            radeon_cs_write_dword(cs, idx);
-            return 0;
-        }
-    }
-    /* new relocation */
-    if (csg->base.crelocs >= csg->nrelocs) {
-        /* allocate more memory (TODO: should use a slab allocatore maybe) */
-        uint32_t *tmp, size;
-        size = ((csg->nrelocs + 1) * sizeof(struct radeon_bo*));
-        tmp = (uint32_t*)realloc(csg->relocs_bo, size);
-        if (tmp == NULL) {
-            return -ENOMEM;
-        }
-        csg->relocs_bo = (struct radeon_bo**)tmp;
-        size = ((csg->nrelocs + 1) * RELOC_SIZE * 4);
-        tmp = (uint32_t*)realloc(csg->relocs, size);
-        if (tmp == NULL) {
-            return -ENOMEM;
-        }
-        cs->relocs = csg->relocs = tmp;
-        csg->nrelocs += 1;
-        csg->chunks[1].chunk_data = (uint64_t)(uintptr_t)csg->relocs;
-    }
-    csg->relocs_bo[csg->base.crelocs] = bo;
-    idx = (csg->base.crelocs++) * RELOC_SIZE;
-    reloc = (struct cs_reloc_gem*)&csg->relocs[idx];
-    reloc->handle = bo->handle;
-    reloc->read_domain = read_domain;
-    reloc->write_domain = write_domain;
-    reloc->flags = flags;
-    csg->chunks[1].length_dw += RELOC_SIZE;
-    radeon_bo_ref(bo);
-    cs->relocs_total_size += bo->size;
-    radeon_cs_write_dword(cs, 0xc0001000);
-    radeon_cs_write_dword(cs, idx);
-    return 0;
-}
-
-static int cs_gem_begin(struct radeon_cs *cs,
-                        uint32_t ndw,
-                        const char *file,
-                        const char *func,
-                        int line)
-{
-
-    if (cs->section) {
-        fprintf(stderr, "CS already in a section(%s,%s,%d)\n",
-                cs->section_file, cs->section_func, cs->section_line);
-        fprintf(stderr, "CS can't start section(%s,%s,%d)\n",
-                file, func, line);
-        return -EPIPE;
-    }
-    cs->section = 1;
-    cs->section_ndw = ndw;
-    cs->section_cdw = 0;
-    cs->section_file = file;
-    cs->section_func = func;
-    cs->section_line = line;
-
-
-    if (cs->cdw + ndw > cs->ndw) {
-        uint32_t tmp, *ptr;
-
-	/* round up the required size to a multiple of 1024 */
-        tmp = (cs->cdw + ndw + 0x3FF) & (~0x3FF);
-        ptr = (uint32_t*)realloc(cs->packets, 4 * tmp);
-        if (ptr == NULL) {
-            return -ENOMEM;
-        }
-        cs->packets = ptr;
-        cs->ndw = tmp;
-    }
-
-    return 0;
-}
-
-static int cs_gem_end(struct radeon_cs *cs,
-                      const char *file,
-                      const char *func,
-                      int line)
-
-{
-    if (!cs->section) {
-        fprintf(stderr, "CS no section to end at (%s,%s,%d)\n",
-                file, func, line);
-        return -EPIPE;
-    }
-    cs->section = 0;
-    if (cs->section_ndw != cs->section_cdw) {
-        fprintf(stderr, "CS section size missmatch start at (%s,%s,%d) %d vs %d\n",
-                cs->section_file, cs->section_func, cs->section_line, cs->section_ndw, cs->section_cdw);
-        fprintf(stderr, "CS section end at (%s,%s,%d)\n",
-                file, func, line);
-        return -EPIPE;
-    }
-    return 0;
-}
-
-static int cs_gem_emit(struct radeon_cs *cs)
-{
-    struct cs_gem *csg = (struct cs_gem*)cs;
-    uint64_t chunk_array[2];
-    unsigned i;
-    int r;
-
-    csg->chunks[0].length_dw = cs->cdw;
-
-    chunk_array[0] = (uint64_t)(uintptr_t)&csg->chunks[0];
-    chunk_array[1] = (uint64_t)(uintptr_t)&csg->chunks[1];
-
-    csg->cs.num_chunks = 2;
-    csg->cs.chunks = (uint64_t)(uintptr_t)chunk_array;
-
-    r = drmCommandWriteRead(cs->csm->fd, DRM_RADEON_CS,
-                            &csg->cs, sizeof(struct drm_radeon_cs));
-    for (i = 0; i < csg->base.crelocs; i++) {
-	    csg->relocs_bo[i]->space_accounted = 0;
-	    radeon_bo_unref(csg->relocs_bo[i]);
-	    csg->relocs_bo[i] = NULL;
-    }
-
-    cs->csm->read_used = 0;
-    cs->csm->vram_write_used = 0;
-    cs->csm->gart_write_used = 0;
-    return r;
-}
-
-static int cs_gem_destroy(struct radeon_cs *cs)
-{
-    struct cs_gem *csg = (struct cs_gem*)cs;
-
-    free(csg->relocs_bo);
-    free(cs->relocs);
-    free(cs->packets);
-    free(cs);
-    return 0;
-}
-
-static int cs_gem_erase(struct radeon_cs *cs)
-{
-    struct cs_gem *csg = (struct cs_gem*)cs;
-    unsigned i;
-
-    if (csg->relocs_bo) {
-        for (i = 0; i < csg->base.crelocs; i++) {
-            if (csg->relocs_bo[i]) {
-                radeon_bo_unref(csg->relocs_bo[i]);
-                csg->relocs_bo[i] = NULL;
-            }
-        }
-    }
-    cs->relocs_total_size = 0;
-    cs->cdw = 0;
-    cs->section = 0;
-    cs->crelocs = 0;
-    csg->chunks[0].length_dw = 0;
-    csg->chunks[1].length_dw = 0;
-    return 0;
-}
-
-static int cs_gem_need_flush(struct radeon_cs *cs)
-{
-    return 0; //(cs->relocs_total_size > (32*1024*1024));
-}
-
-#define PACKET_TYPE0 0
-#define PACKET_TYPE1 1
-#define PACKET_TYPE2 2
-#define PACKET_TYPE3 3
-  
-#define PACKET3_NOP 0x10
-#define PACKET3_SET_SCISSORS 0x1E
-#define PACKET3_3D_DRAW_VBUF 0x28
-#define PACKET3_3D_DRAW_IMMD 0x29
-#define PACKET3_3D_DRAW_INDX 0x2A
-#define PACKET3_3D_LOAD_VBPNTR 0x2F
-#define PACKET3_INDX_BUFFER 0x33
-#define PACKET3_3D_DRAW_VBUF_2 0x34
-#define PACKET3_3D_DRAW_IMMD_2 0x35
-#define PACKET3_3D_DRAW_INDX_2 0x36
- 
-#define CP_PACKET_GET_TYPE(h) (((h) >> 30) & 3)
-#define CP_PACKET_GET_COUNT(h) (((h) >> 16) & 0x3FFF)
-#define CP_PACKET0_GET_REG(h) (((h) & 0x1FFF) << 2)
-#define CP_PACKET0_GET_ONE_REG_WR(h) (((h) >> 15) & 1)
-#define CP_PACKET3_GET_OPCODE(h) (((h) >> 8) & 0xFF)
-
-static void cs_gem_print(struct radeon_cs *cs, FILE *file)
-{
-    unsigned opcode;
-    unsigned reg;
-    unsigned cnt;
-    unsigned int i, j;
-
-    for (i = 0; i < cs->cdw;) {
-        cnt = CP_PACKET_GET_COUNT(cs->packets[i]) + 1;
-        switch (CP_PACKET_GET_TYPE(cs->packets[i])) {
-        case PACKET_TYPE0:
-            fprintf(file, "Pkt0 at %d (%d dwords):\n", i, cnt);
-            reg = CP_PACKET0_GET_REG(cs->packets[i]);
-            if (CP_PACKET0_GET_ONE_REG_WR(cs->packets[i++])) {
-                for (j = 0; j < cnt; j++) {
-                    fprintf(file, "    0x%08X -> 0x%04X\n",
-                            cs->packets[i++], reg);
-                }
-            } else {
-                for (j = 0; j < cnt; j++) {
-                    fprintf(file, "    0x%08X -> 0x%04X\n",
-                            cs->packets[i++], reg);
-                    reg += 4;
-                }
-            }
-            break;
-        case PACKET_TYPE3:
-            fprintf(file, "Pkt3 at %d :\n", i);
-            opcode = CP_PACKET3_GET_OPCODE(cs->packets[i++]);
-            switch (opcode) {
-            case PACKET3_NOP:
-                fprintf(file, "    PACKET3_NOP:\n");
-                break;
-            case PACKET3_3D_DRAW_VBUF:
-                fprintf(file, "    PACKET3_3D_DRAW_VBUF:\n");
-                break;
-            case PACKET3_3D_DRAW_IMMD:
-                fprintf(file, "    PACKET3_3D_DRAW_IMMD:\n");
-                break;
-            case PACKET3_3D_DRAW_INDX:
-                fprintf(file, "    PACKET3_3D_DRAW_INDX:\n");
-                break;
-            case PACKET3_3D_LOAD_VBPNTR:
-                fprintf(file, "    PACKET3_3D_LOAD_VBPNTR:\n");
-                break;
-            case PACKET3_INDX_BUFFER:
-                fprintf(file, "    PACKET3_INDX_BUFFER:\n");
-                break;
-            case PACKET3_3D_DRAW_VBUF_2:
-                fprintf(file, "    PACKET3_3D_DRAW_VBUF_2:\n");
-                break;
-            case PACKET3_3D_DRAW_IMMD_2:
-                fprintf(file, "    PACKET3_3D_DRAW_IMMD_2:\n");
-                break;
-            case PACKET3_3D_DRAW_INDX_2:
-                fprintf(file, "    PACKET3_3D_DRAW_INDX_2:\n");
-                break;
-            default:
-                fprintf(file, "Unknow opcode 0x%02X at %d\n", opcode, i);
-                return;
-            }
-            for (j = 0; j < cnt; j++) {
-                fprintf(file, "        0x%08X\n", cs->packets[i++]);
-            }
-            break;
-        case PACKET_TYPE1:
-        case PACKET_TYPE2:
-        default:
-            fprintf(file, "Unknow packet 0x%08X at %d\n", cs->packets[i], i);
-            return;
-        }
-    }
-}
-
-
-
-static struct radeon_cs_funcs radeon_cs_gem_funcs = {
-    cs_gem_create,
-    cs_gem_write_reloc,
-    cs_gem_begin,
-    cs_gem_end,
-    cs_gem_emit,
-    cs_gem_destroy,
-    cs_gem_erase,
-    cs_gem_need_flush,
-    cs_gem_print,
-};
-
-struct radeon_cs_manager *radeon_cs_manager_gem_ctor(int fd)
-{
-    struct radeon_cs_manager *csm;
-
-    csm = (struct radeon_cs_manager*)calloc(1,
-                                            sizeof(struct radeon_cs_manager));
-    if (csm == NULL) {
-        return NULL;
-    }
-    csm->funcs = &radeon_cs_gem_funcs;
-    csm->fd = fd;
-    return csm;
-}
-
-void radeon_cs_manager_gem_dtor(struct radeon_cs_manager *csm)
-{
-    free(csm);
-}
diff --git a/libdrm/radeon/radeon_cs_gem.h b/libdrm/radeon/radeon_cs_gem.h
deleted file mode 100644
index 5efd146f..00000000
--- a/libdrm/radeon/radeon_cs_gem.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/* 
- * Copyright © 2008 Nicolai Haehnle
- * Copyright © 2008 Jérôme Glisse
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
- * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- */
-/*
- * Authors:
- *      Aapo Tahkola <aet@rasterburn.org>
- *      Nicolai Haehnle <prefect_@gmx.net>
- *      Jérôme Glisse <glisse@freedesktop.org>
- */
-#ifndef RADEON_CS_GEM_H
-#define RADEON_CS_GEM_H
-
-#include "radeon_cs.h"
-
-struct radeon_cs_manager *radeon_cs_manager_gem_ctor(int fd);
-void radeon_cs_manager_gem_dtor(struct radeon_cs_manager *csm);
-
-#endif
diff --git a/libdrm/radeon/radeon_cs_space.c b/libdrm/radeon/radeon_cs_space.c
deleted file mode 100644
index 4c1ef93e..00000000
--- a/libdrm/radeon/radeon_cs_space.c
+++ /dev/null
@@ -1,234 +0,0 @@
-/* 
- * Copyright © 2009 Red Hat Inc.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
- * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- */
-/*
- */
-#include <assert.h>
-#include <errno.h>
-#include <stdlib.h>
-#include "radeon_cs.h"
-
-struct rad_sizes {
-    int32_t op_read;
-    int32_t op_gart_write;
-    int32_t op_vram_write;
-};
-
-static inline int radeon_cs_setup_bo(struct radeon_cs_space_check *sc, struct rad_sizes *sizes)
-{
-    uint32_t read_domains, write_domain;
-    struct radeon_bo *bo;
-
-    bo = sc->bo;
-    sc->new_accounted = 0;
-    read_domains = sc->read_domains;
-    write_domain = sc->write_domain;
-
-    /* legacy needs a static check */
-    if (radeon_bo_is_static(bo)) {
-	bo->space_accounted = sc->new_accounted = (read_domains << 16) | write_domain;
-	return 0;
-    }
-
-    /* already accounted this bo */
-    if (write_domain && (write_domain == bo->space_accounted)) {
-	sc->new_accounted = bo->space_accounted;
-	return 0;
-    }
-    if (read_domains && ((read_domains << 16) == bo->space_accounted)) {
-	sc->new_accounted = bo->space_accounted;
-	return 0;
-    }
-
-    if (bo->space_accounted == 0) {
-	if (write_domain == RADEON_GEM_DOMAIN_VRAM)
-	    sizes->op_vram_write += bo->size;
-	else if (write_domain == RADEON_GEM_DOMAIN_GTT)
-	  sizes->op_gart_write += bo->size;
-	else
-	    sizes->op_read += bo->size;
-	sc->new_accounted = (read_domains << 16) | write_domain;
-    } else {
-	uint16_t old_read, old_write;
-	
-	old_read = bo->space_accounted >> 16;
-	old_write = bo->space_accounted & 0xffff;
-	
-	if (write_domain && (old_read & write_domain)) {
-	    sc->new_accounted = write_domain;
-	    /* moving from read to a write domain */
-	    if (write_domain == RADEON_GEM_DOMAIN_VRAM) {
-		sizes->op_read -= bo->size;
-		sizes->op_vram_write += bo->size;
-	    } else if (write_domain == RADEON_GEM_DOMAIN_GTT) {
-		sizes->op_read -= bo->size;
-		sizes->op_gart_write += bo->size;
-	    }
-	} else if (read_domains & old_write) {
-	    sc->new_accounted = bo->space_accounted & 0xffff;
-	} else {
-	    /* rewrite the domains */
-	    if (write_domain != old_write)
-		fprintf(stderr,"WRITE DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, write_domain, old_write);
-	    if (read_domains != old_read)
-		fprintf(stderr,"READ DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, read_domains, old_read);
-	    return RADEON_CS_SPACE_FLUSH;
-	}
-    }
-    return 0;
-}
-
-static int radeon_cs_do_space_check(struct radeon_cs *cs, struct radeon_cs_space_check *new_tmp)
-{
-    struct radeon_cs_manager *csm = cs->csm;
-    int i;
-    struct radeon_bo *bo;
-    struct rad_sizes sizes;
-    int ret;
-
-    /* check the totals for this operation */
-
-    if (cs->bo_count == 0 && !new_tmp)
-	return 0;
-
-    memset(&sizes, 0, sizeof(struct rad_sizes));
-
-    /* prepare */
-    for (i = 0; i < cs->bo_count; i++) {
-	ret = radeon_cs_setup_bo(&cs->bos[i], &sizes);
-	if (ret)
-	    return ret;
-    }
-
-    if (new_tmp) {
-	ret = radeon_cs_setup_bo(new_tmp, &sizes);
-	if (ret)
-	    return ret;
-    }
-	
-    if (sizes.op_read < 0)
-	    sizes.op_read = 0;
-
-    /* check sizes - operation first */
-    if ((sizes.op_read + sizes.op_gart_write > csm->gart_limit) ||
-	(sizes.op_vram_write > csm->vram_limit)) {
-	    return RADEON_CS_SPACE_OP_TO_BIG;
-    }
-    
-    if (((csm->vram_write_used + sizes.op_vram_write) > csm->vram_limit) ||
-	((csm->read_used + csm->gart_write_used + sizes.op_gart_write + sizes.op_read) > csm->gart_limit)) {
-	    return RADEON_CS_SPACE_FLUSH;
-    }
-    
-    csm->gart_write_used += sizes.op_gart_write;
-    csm->vram_write_used += sizes.op_vram_write;
-    csm->read_used += sizes.op_read;
-    /* commit */
-    for (i = 0; i < cs->bo_count; i++) {
-	    bo = cs->bos[i].bo;
-	    bo->space_accounted = cs->bos[i].new_accounted;
-    }
-    if (new_tmp)
-	new_tmp->bo->space_accounted = new_tmp->new_accounted;
-    
-    return RADEON_CS_SPACE_OK;
-}
-
-void radeon_cs_space_add_persistent_bo(struct radeon_cs *cs, struct radeon_bo *bo, uint32_t read_domains, uint32_t write_domain)
-{
-    int i;
-    for (i = 0; i < cs->bo_count; i++) {
-	if (cs->bos[i].bo == bo &&
-	    cs->bos[i].read_domains == read_domains &&
-	    cs->bos[i].write_domain == write_domain)
-	    return;
-    }
-    radeon_bo_ref(bo);
-    i = cs->bo_count;
-    cs->bos[i].bo = bo;
-    cs->bos[i].read_domains = read_domains;
-    cs->bos[i].write_domain = write_domain;
-    cs->bos[i].new_accounted = 0;
-    cs->bo_count++;
-
-    assert(cs->bo_count < MAX_SPACE_BOS);
-}
-
-static int radeon_cs_check_space_internal(struct radeon_cs *cs, struct radeon_cs_space_check *tmp_bo)
-{
-    int ret;
-    int flushed = 0;
-
-again:
-    ret = radeon_cs_do_space_check(cs, tmp_bo);
-    if (ret == RADEON_CS_SPACE_OP_TO_BIG)
-	return -1;
-    if (ret == RADEON_CS_SPACE_FLUSH) {
-	(*cs->space_flush_fn)(cs->space_flush_data);
-	if (flushed)
-	    return -1;
-	flushed = 1;
-	goto again;
-    }
-    return 0;
-}
-
-int radeon_cs_space_check_with_bo(struct radeon_cs *cs,
-				  struct radeon_bo *bo,
-				  uint32_t read_domains, uint32_t write_domain)
-{									
-    struct radeon_cs_space_check temp_bo;
-    int ret = 0;
-
-    if (bo) {
-	temp_bo.bo = bo;
-	temp_bo.read_domains = read_domains;
-	temp_bo.write_domain = write_domain;
-	temp_bo.new_accounted = 0;
-    }
-
-    ret = radeon_cs_check_space_internal(cs, bo ? &temp_bo : NULL);
-    return ret;
-}
-
-int radeon_cs_space_check(struct radeon_cs *cs)
-{
-    return radeon_cs_check_space_internal(cs, NULL);
-}
-
-void radeon_cs_space_reset_bos(struct radeon_cs *cs)
-{
-    int i;
-    for (i = 0; i < cs->bo_count; i++) {
-	radeon_bo_unref(cs->bos[i].bo);
-	cs->bos[i].bo = NULL;
-	cs->bos[i].read_domains = 0;
-	cs->bos[i].write_domain = 0;
-	cs->bos[i].new_accounted = 0;
-    }
-    cs->bo_count = 0;
-}
-
-
diff --git a/libdrm/radeon/radeon_track.c b/libdrm/radeon/radeon_track.c
deleted file mode 100644
index 9ab09275..00000000
--- a/libdrm/radeon/radeon_track.c
+++ /dev/null
@@ -1,141 +0,0 @@
-/* 
- * Copyright © 2008 Jérôme Glisse
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
- * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- */
-/*
- * Authors:
- *      Jérôme Glisse <glisse@freedesktop.org>
- */
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include "radeon_track.h"
-
-void radeon_track_add_event(struct radeon_track *track,
-                            const char *file,
-                            const char *func,
-                            const char *op,
-                            unsigned line)
-{
-    struct radeon_track_event *event;
-
-    if (track == NULL) {
-        return;
-    }
-    event = (void*)calloc(1,sizeof(struct radeon_track_event));
-    if (event == NULL) {
-        return;
-    }
-    event->line = line;
-    event->file = strdup(file);
-    event->func = strdup(func);
-    event->op = strdup(op);
-    if (event->file == NULL || event->func == NULL || event->op == NULL) {
-        free(event->file);
-        free(event->func);
-        free(event->op);
-        free(event);
-        return;
-    }
-    event->next = track->events;
-    track->events = event;
-}
-
-struct radeon_track *radeon_tracker_add_track(struct radeon_tracker *tracker,
-                                              unsigned key)
-{
-    struct radeon_track *track;
-
-    track = (struct radeon_track*)calloc(1, sizeof(struct radeon_track));
-    if (track) {
-        track->next = tracker->tracks.next;
-        track->prev = &tracker->tracks;
-        tracker->tracks.next = track;
-        if (track->next) {
-            track->next->prev = track;
-        }
-        track->key = key;
-        track->events = NULL;
-    }
-    return track;
-}
-
-void radeon_tracker_remove_track(struct radeon_tracker *tracker,
-                                 struct radeon_track *track)
-{
-    struct radeon_track_event *event;
-    void *tmp;
-
-    if (track == NULL) {
-        return;
-    }
-    track->prev->next = track->next;
-    if (track->next) {
-        track->next->prev = track->prev;
-    }
-    track->next = track->prev = NULL;
-    event = track->events;
-    while (event) {
-        tmp = event;
-        free(event->file);
-        free(event->func);
-        free(event->op);
-        event = event->next;
-        free(tmp);
-    }
-    track->events = NULL;
-    free(track);
-}
-
-void radeon_tracker_print(struct radeon_tracker *tracker, FILE *file)
-{
-    struct radeon_track *track;
-    struct radeon_track_event *event;
-    void *tmp;
-
-    track = tracker->tracks.next;
-    while (track) {
-        event = track->events;
-        fprintf(file, "[0x%08X] :\n", track->key);
-        while (event) {
-            tmp = event;
-            fprintf(file, "  [0x%08X:%s](%s:%s:%d)\n",
-                    track->key, event->op,  event->file,
-                    event->func, event->line);
-            free(event->file);
-            free(event->func);
-            free(event->op);
-            event->file = NULL;
-            event->func = NULL;
-            event->op = NULL;
-            event = event->next;
-            free(tmp);
-        }
-        track->events = NULL;
-        tmp = track;
-        track = track->next;
-        free(tmp);
-    }
-	tracker->tracks.next = NULL;
-}
diff --git a/libdrm/radeon/radeon_track.h b/libdrm/radeon/radeon_track.h
deleted file mode 100644
index 838d1f38..00000000
--- a/libdrm/radeon/radeon_track.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/* 
- * Copyright © 2008 Jérôme Glisse
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
- * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- */
-/*
- * Authors:
- *      Jérôme Glisse <glisse@freedesktop.org>
- */
-#ifndef RADEON_TRACK_H
-#define RADEON_TRACK_H
-
-struct radeon_track_event {
-    struct radeon_track_event   *next;
-    char                        *file;
-    char                        *func;
-    char                        *op;
-    unsigned                    line;
-};
-
-struct radeon_track {
-    struct radeon_track         *next;
-    struct radeon_track         *prev;
-    unsigned                    key;
-    struct radeon_track_event   *events;
-};
-
-struct radeon_tracker {
-    struct radeon_track         tracks; 
-};
-
-void radeon_track_add_event(struct radeon_track *track,
-                            const char *file,
-                            const char *func,
-                            const char *op,
-                            unsigned line);
-struct radeon_track *radeon_tracker_add_track(struct radeon_tracker *tracker,
-                                              unsigned key);
-void radeon_tracker_remove_track(struct radeon_tracker *tracker,
-                                 struct radeon_track *track);
-void radeon_tracker_print(struct radeon_tracker *tracker,
-                          FILE *file);
-
-#endif
diff --git a/libdrm/xf86drm.c b/libdrm/xf86drm.c
deleted file mode 100644
index 26dd8129..00000000
--- a/libdrm/xf86drm.c
+++ /dev/null
@@ -1,2512 +0,0 @@
-/**
- * \file xf86drm.c 
- * User-level interface to DRM device
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- * \author Kevin E. Martin <martin@valinux.com>
- */
-
-/*
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#ifdef HAVE_CONFIG_H
-# include <config.h>
-#endif
-#include <stdio.h>
-#include <stdlib.h>
-#include <unistd.h>
-#include <string.h>
-#include <strings.h>
-#include <ctype.h>
-#include <fcntl.h>
-#include <errno.h>
-#include <signal.h>
-#include <time.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#define stat_t struct stat
-#include <sys/ioctl.h>
-#include <sys/mman.h>
-#include <sys/time.h>
-#include <stdarg.h>
-
-/* Not all systems have MAP_FAILED defined */
-#ifndef MAP_FAILED
-#define MAP_FAILED ((void *)-1)
-#endif
-
-#include "xf86drm.h"
-
-#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__)
-#define DRM_MAJOR 145
-#endif
-
-#ifdef __NetBSD__
-#define DRM_MAJOR 34
-#endif
-
-# ifdef __OpenBSD__
-#  define DRM_MAJOR 81
-# endif
-
-#ifndef DRM_MAJOR
-#define DRM_MAJOR 226		/* Linux */
-#endif
-
-#ifndef DRM_MAX_MINOR
-#define DRM_MAX_MINOR 16
-#endif
-
-/*
- * This definition needs to be changed on some systems if dev_t is a structure.
- * If there is a header file we can get it from, there would be best.
- */
-#ifndef makedev
-#define makedev(x,y)    ((dev_t)(((x) << 8) | (y)))
-#endif
-
-#define DRM_MSG_VERBOSITY 3
-
-#define DRM_NODE_CONTROL 0
-#define DRM_NODE_RENDER 1
-
-static drmServerInfoPtr drm_server_info;
-
-void drmSetServerInfo(drmServerInfoPtr info)
-{
-    drm_server_info = info;
-}
-
-/**
- * Output a message to stderr.
- *
- * \param format printf() like format string.
- *
- * \internal
- * This function is a wrapper around vfprintf().
- */
-
-static int drmDebugPrint(const char *format, va_list ap)
-{
-    return vfprintf(stderr, format, ap);
-}
-
-static int (*drm_debug_print)(const char *format, va_list ap) = drmDebugPrint;
-
-void
-drmMsg(const char *format, ...)
-{
-    va_list	ap;
-    const char *env;
-    if (((env = getenv("LIBGL_DEBUG")) && strstr(env, "verbose")) || drm_server_info)
-    {
-	va_start(ap, format);
-	if (drm_server_info) {
-	  drm_server_info->debug_print(format,ap);
-	} else {
-	  drm_debug_print(format, ap);
-	}
-	va_end(ap);
-    }
-}
-
-void
-drmSetDebugMsgFunction(int (*debug_msg_ptr)(const char *format, va_list ap))
-{
-    drm_debug_print = debug_msg_ptr;
-}
-
-static void *drmHashTable = NULL; /* Context switch callbacks */
-
-void *drmGetHashTable(void)
-{
-    return drmHashTable;
-}
-
-void *drmMalloc(int size)
-{
-    void *pt;
-    if ((pt = malloc(size)))
-	memset(pt, 0, size);
-    return pt;
-}
-
-void drmFree(void *pt)
-{
-    if (pt)
-	free(pt);
-}
-
-/* drmStrdup can't use strdup(3), since it doesn't call _DRM_MALLOC... */
-static char *drmStrdup(const char *s)
-{
-    char *retval;
-
-    if (!s)
-        return NULL;
-
-    retval = malloc(strlen(s)+1);
-    if (!retval)
-        return NULL;
-
-    strcpy(retval, s);
-
-    return retval;
-}
-
-/**
- * Call ioctl, restarting if it is interupted
- */
-int
-drmIoctl(int fd, unsigned long request, void *arg)
-{
-    int	ret;
-
-    do {
-	ret = ioctl(fd, request, arg);
-    } while (ret == -1 && (errno == EINTR || errno == EAGAIN));
-    return ret;
-}
-
-static unsigned long drmGetKeyFromFd(int fd)
-{
-    stat_t     st;
-
-    st.st_rdev = 0;
-    fstat(fd, &st);
-    return st.st_rdev;
-}
-
-drmHashEntry *drmGetEntry(int fd)
-{
-    unsigned long key = drmGetKeyFromFd(fd);
-    void          *value;
-    drmHashEntry  *entry;
-
-    if (!drmHashTable)
-	drmHashTable = drmHashCreate();
-
-    if (drmHashLookup(drmHashTable, key, &value)) {
-	entry           = drmMalloc(sizeof(*entry));
-	entry->fd       = fd;
-	entry->f        = NULL;
-	entry->tagTable = drmHashCreate();
-	drmHashInsert(drmHashTable, key, entry);
-    } else {
-	entry = value;
-    }
-    return entry;
-}
-
-/**
- * Compare two busid strings
- *
- * \param first
- * \param second
- *
- * \return 1 if matched.
- *
- * \internal
- * This function compares two bus ID strings.  It understands the older
- * PCI:b:d:f format and the newer pci:oooo:bb:dd.f format.  In the format, o is
- * domain, b is bus, d is device, f is function.
- */
-static int drmMatchBusID(const char *id1, const char *id2)
-{
-    /* First, check if the IDs are exactly the same */
-    if (strcasecmp(id1, id2) == 0)
-	return 1;
-
-    /* Try to match old/new-style PCI bus IDs. */
-    if (strncasecmp(id1, "pci", 3) == 0) {
-	unsigned int o1, b1, d1, f1;
-	unsigned int o2, b2, d2, f2;
-	int ret;
-
-	ret = sscanf(id1, "pci:%04x:%02x:%02x.%u", &o1, &b1, &d1, &f1);
-	if (ret != 4) {
-	    o1 = 0;
-	    ret = sscanf(id1, "PCI:%u:%u:%u", &b1, &d1, &f1);
-	    if (ret != 3)
-		return 0;
-	}
-
-	ret = sscanf(id2, "pci:%04x:%02x:%02x.%u", &o2, &b2, &d2, &f2);
-	if (ret != 4) {
-	    o2 = 0;
-	    ret = sscanf(id2, "PCI:%u:%u:%u", &b2, &d2, &f2);
-	    if (ret != 3)
-		return 0;
-	}
-
-	if ((o1 != o2) || (b1 != b2) || (d1 != d2) || (f1 != f2))
-	    return 0;
-	else
-	    return 1;
-    }
-    return 0;
-}
-
-/**
- * Handles error checking for chown call.
- *
- * \param path to file.
- * \param id of the new owner.
- * \param id of the new group.
- *
- * \return zero if success or -1 if failure.
- *
- * \internal
- * Checks for failure. If failure was caused by signal call chown again.
- * If any other failure happened then it will output error mesage using
- * drmMsg() call.
- */
-static int chown_check_return(const char *path, uid_t owner, gid_t group)
-{
-	int rv;
-
-	do {
-		rv = chown(path, owner, group);
-	} while (rv != 0 && errno == EINTR);
-
-	if (rv == 0)
-		return 0;
-
-	drmMsg("Failed to change owner or group for file %s! %d: %s\n",
-			path, errno, strerror(errno));
-	return -1;
-}
-
-/**
- * Open the DRM device, creating it if necessary.
- *
- * \param dev major and minor numbers of the device.
- * \param minor minor number of the device.
- * 
- * \return a file descriptor on success, or a negative value on error.
- *
- * \internal
- * Assembles the device name from \p minor and opens it, creating the device
- * special file node with the major and minor numbers specified by \p dev and
- * parent directory if necessary and was called by root.
- */
-static int drmOpenDevice(long dev, int minor, int type)
-{
-    stat_t          st;
-    char            buf[64];
-    int             fd;
-    mode_t          devmode = DRM_DEV_MODE, serv_mode;
-    int             isroot  = !geteuid();
-    uid_t           user    = DRM_DEV_UID;
-    gid_t           group   = DRM_DEV_GID, serv_group;
-    
-    sprintf(buf, type ? DRM_DEV_NAME : DRM_CONTROL_DEV_NAME, DRM_DIR_NAME, minor);
-    drmMsg("drmOpenDevice: node name is %s\n", buf);
-
-    if (drm_server_info) {
-	drm_server_info->get_perms(&serv_group, &serv_mode);
-	devmode  = serv_mode ? serv_mode : DRM_DEV_MODE;
-	devmode &= ~(S_IXUSR|S_IXGRP|S_IXOTH);
-	group = (serv_group >= 0) ? serv_group : DRM_DEV_GID;
-    }
-
-#if !defined(UDEV)
-    if (stat(DRM_DIR_NAME, &st)) {
-	if (!isroot)
-	    return DRM_ERR_NOT_ROOT;
-	mkdir(DRM_DIR_NAME, DRM_DEV_DIRMODE);
-	chown_check_return(DRM_DIR_NAME, 0, 0); /* root:root */
-	chmod(DRM_DIR_NAME, DRM_DEV_DIRMODE);
-    }
-
-    /* Check if the device node exists and create it if necessary. */
-    if (stat(buf, &st)) {
-	if (!isroot)
-	    return DRM_ERR_NOT_ROOT;
-	remove(buf);
-	mknod(buf, S_IFCHR | devmode, dev);
-    }
-
-    if (drm_server_info) {
-	chown_check_return(buf, user, group);
-	chmod(buf, devmode);
-    }
-#else
-    /* if we modprobed then wait for udev */
-    {
-	int udev_count = 0;
-wait_for_udev:
-        if (stat(DRM_DIR_NAME, &st)) {
-		usleep(20);
-		udev_count++;
-
-		if (udev_count == 50)
-			return -1;
-		goto wait_for_udev;
-	}
-
-    	if (stat(buf, &st)) {
-		usleep(20);
-		udev_count++;
-
-		if (udev_count == 50)
-			return -1;
-		goto wait_for_udev;
-    	}
-    }
-#endif
-
-    fd = open(buf, O_RDWR, 0);
-    drmMsg("drmOpenDevice: open result is %d, (%s)\n",
-		fd, fd < 0 ? strerror(errno) : "OK");
-    if (fd >= 0)
-	return fd;
-
-    /* Check if the device node is not what we expect it to be, and recreate it
-     * and try again if so.
-     */
-    if (st.st_rdev != dev) {
-	if (!isroot)
-	    return DRM_ERR_NOT_ROOT;
-	remove(buf);
-	mknod(buf, S_IFCHR | devmode, dev);
-	if (drm_server_info) {
-	    chown_check_return(buf, user, group);
-	    chmod(buf, devmode);
-	}
-    }
-    fd = open(buf, O_RDWR, 0);
-    drmMsg("drmOpenDevice: open result is %d, (%s)\n",
-		fd, fd < 0 ? strerror(errno) : "OK");
-    if (fd >= 0)
-	return fd;
-
-    drmMsg("drmOpenDevice: Open failed\n");
-    remove(buf);
-    return -errno;
-}
-
-
-/**
- * Open the DRM device
- *
- * \param minor device minor number.
- * \param create allow to create the device if set.
- *
- * \return a file descriptor on success, or a negative value on error.
- * 
- * \internal
- * Calls drmOpenDevice() if \p create is set, otherwise assembles the device
- * name from \p minor and opens it.
- */
-static int drmOpenMinor(int minor, int create, int type)
-{
-    int  fd;
-    char buf[64];
-    
-    if (create)
-	return drmOpenDevice(makedev(DRM_MAJOR, minor), minor, type);
-    
-    sprintf(buf, type ? DRM_DEV_NAME : DRM_CONTROL_DEV_NAME, DRM_DIR_NAME, minor);
-    if ((fd = open(buf, O_RDWR, 0)) >= 0)
-	return fd;
-    return -errno;
-}
-
-
-/**
- * Determine whether the DRM kernel driver has been loaded.
- * 
- * \return 1 if the DRM driver is loaded, 0 otherwise.
- *
- * \internal 
- * Determine the presence of the kernel driver by attempting to open the 0
- * minor and get version information.  For backward compatibility with older
- * Linux implementations, /proc/dri is also checked.
- */
-int drmAvailable(void)
-{
-    drmVersionPtr version;
-    int           retval = 0;
-    int           fd;
-
-    if ((fd = drmOpenMinor(0, 1, DRM_NODE_RENDER)) < 0) {
-#ifdef __linux__
-	/* Try proc for backward Linux compatibility */
-	if (!access("/proc/dri/0", R_OK))
-	    return 1;
-#endif
-	return 0;
-    }
-    
-    if ((version = drmGetVersion(fd))) {
-	retval = 1;
-	drmFreeVersion(version);
-    }
-    close(fd);
-
-    return retval;
-}
-
-
-/**
- * Open the device by bus ID.
- *
- * \param busid bus ID.
- *
- * \return a file descriptor on success, or a negative value on error.
- *
- * \internal
- * This function attempts to open every possible minor (up to DRM_MAX_MINOR),
- * comparing the device bus ID with the one supplied.
- *
- * \sa drmOpenMinor() and drmGetBusid().
- */
-static int drmOpenByBusid(const char *busid)
-{
-    int        i;
-    int        fd;
-    const char *buf;
-    drmSetVersion sv;
-
-    drmMsg("drmOpenByBusid: Searching for BusID %s\n", busid);
-    for (i = 0; i < DRM_MAX_MINOR; i++) {
-	fd = drmOpenMinor(i, 1, DRM_NODE_RENDER);
-	drmMsg("drmOpenByBusid: drmOpenMinor returns %d\n", fd);
-	if (fd >= 0) {
-	    sv.drm_di_major = 1;
-	    sv.drm_di_minor = 1;
-	    sv.drm_dd_major = -1;	/* Don't care */
-	    sv.drm_dd_minor = -1;	/* Don't care */
-	    drmSetInterfaceVersion(fd, &sv);
-	    buf = drmGetBusid(fd);
-	    drmMsg("drmOpenByBusid: drmGetBusid reports %s\n", buf);
-	    if (buf && drmMatchBusID(buf, busid)) {
-		drmFreeBusid(buf);
-		return fd;
-	    }
-	    if (buf)
-		drmFreeBusid(buf);
-	    close(fd);
-	}
-    }
-    return -1;
-}
-
-
-/**
- * Open the device by name.
- *
- * \param name driver name.
- * 
- * \return a file descriptor on success, or a negative value on error.
- * 
- * \internal
- * This function opens the first minor number that matches the driver name and
- * isn't already in use.  If it's in use it then it will already have a bus ID
- * assigned.
- * 
- * \sa drmOpenMinor(), drmGetVersion() and drmGetBusid().
- */
-static int drmOpenByName(const char *name)
-{
-    int           i;
-    int           fd;
-    drmVersionPtr version;
-    char *        id;
-    
-    if (!drmAvailable()) {
-	if (!drm_server_info) {
-	    return -1;
-	}
-	else {
-	    /* try to load the kernel module now */
-	    if (!drm_server_info->load_module(name)) {
-		drmMsg("[drm] failed to load kernel module \"%s\"\n", name);
-		return -1;
-	    }
-	}
-    }
-
-    /*
-     * Open the first minor number that matches the driver name and isn't
-     * already in use.  If it's in use it will have a busid assigned already.
-     */
-    for (i = 0; i < DRM_MAX_MINOR; i++) {
-	if ((fd = drmOpenMinor(i, 1, DRM_NODE_RENDER)) >= 0) {
-	    if ((version = drmGetVersion(fd))) {
-		if (!strcmp(version->name, name)) {
-		    drmFreeVersion(version);
-		    id = drmGetBusid(fd);
-		    drmMsg("drmGetBusid returned '%s'\n", id ? id : "NULL");
-		    if (!id || !*id) {
-			if (id)
-			    drmFreeBusid(id);
-			return fd;
-		    } else {
-			drmFreeBusid(id);
-		    }
-		} else {
-		    drmFreeVersion(version);
-		}
-	    }
-	    close(fd);
-	}
-    }
-
-#ifdef __linux__
-    /* Backward-compatibility /proc support */
-    for (i = 0; i < 8; i++) {
-	char proc_name[64], buf[512];
-	char *driver, *pt, *devstring;
-	int  retcode;
-	
-	sprintf(proc_name, "/proc/dri/%d/name", i);
-	if ((fd = open(proc_name, 0, 0)) >= 0) {
-	    retcode = read(fd, buf, sizeof(buf)-1);
-	    close(fd);
-	    if (retcode) {
-		buf[retcode-1] = '\0';
-		for (driver = pt = buf; *pt && *pt != ' '; ++pt)
-		    ;
-		if (*pt) { /* Device is next */
-		    *pt = '\0';
-		    if (!strcmp(driver, name)) { /* Match */
-			for (devstring = ++pt; *pt && *pt != ' '; ++pt)
-			    ;
-			if (*pt) { /* Found busid */
-			    return drmOpenByBusid(++pt);
-			} else { /* No busid */
-			    return drmOpenDevice(strtol(devstring, NULL, 0),i, DRM_NODE_RENDER);
-			}
-		    }
-		}
-	    }
-	}
-    }
-#endif
-
-    return -1;
-}
-
-
-/**
- * Open the DRM device.
- *
- * Looks up the specified name and bus ID, and opens the device found.  The
- * entry in /dev/dri is created if necessary and if called by root.
- *
- * \param name driver name. Not referenced if bus ID is supplied.
- * \param busid bus ID. Zero if not known.
- * 
- * \return a file descriptor on success, or a negative value on error.
- * 
- * \internal
- * It calls drmOpenByBusid() if \p busid is specified or drmOpenByName()
- * otherwise.
- */
-int drmOpen(const char *name, const char *busid)
-{
-    if (!drmAvailable() && name != NULL && drm_server_info) {
-	/* try to load the kernel */
-	if (!drm_server_info->load_module(name)) {
-	    drmMsg("[drm] failed to load kernel module \"%s\"\n", name);
-	    return -1;
-	}
-    }
-
-    if (busid) {
-	int fd = drmOpenByBusid(busid);
-	if (fd >= 0)
-	    return fd;
-    }
-    
-    if (name)
-	return drmOpenByName(name);
-
-    return -1;
-}
-
-int drmOpenControl(int minor)
-{
-    return drmOpenMinor(minor, 0, DRM_NODE_CONTROL);
-}
-
-/**
- * Free the version information returned by drmGetVersion().
- *
- * \param v pointer to the version information.
- *
- * \internal
- * It frees the memory pointed by \p %v as well as all the non-null strings
- * pointers in it.
- */
-void drmFreeVersion(drmVersionPtr v)
-{
-    if (!v)
-	return;
-    drmFree(v->name);
-    drmFree(v->date);
-    drmFree(v->desc);
-    drmFree(v);
-}
-
-
-/**
- * Free the non-public version information returned by the kernel.
- *
- * \param v pointer to the version information.
- *
- * \internal
- * Used by drmGetVersion() to free the memory pointed by \p %v as well as all
- * the non-null strings pointers in it.
- */
-static void drmFreeKernelVersion(drm_version_t *v)
-{
-    if (!v)
-	return;
-    drmFree(v->name);
-    drmFree(v->date);
-    drmFree(v->desc);
-    drmFree(v);
-}
-
-
-/**
- * Copy version information.
- * 
- * \param d destination pointer.
- * \param s source pointer.
- * 
- * \internal
- * Used by drmGetVersion() to translate the information returned by the ioctl
- * interface in a private structure into the public structure counterpart.
- */
-static void drmCopyVersion(drmVersionPtr d, const drm_version_t *s)
-{
-    d->version_major      = s->version_major;
-    d->version_minor      = s->version_minor;
-    d->version_patchlevel = s->version_patchlevel;
-    d->name_len           = s->name_len;
-    d->name               = drmStrdup(s->name);
-    d->date_len           = s->date_len;
-    d->date               = drmStrdup(s->date);
-    d->desc_len           = s->desc_len;
-    d->desc               = drmStrdup(s->desc);
-}
-
-
-/**
- * Query the driver version information.
- *
- * \param fd file descriptor.
- * 
- * \return pointer to a drmVersion structure which should be freed with
- * drmFreeVersion().
- * 
- * \note Similar information is available via /proc/dri.
- * 
- * \internal
- * It gets the version information via successive DRM_IOCTL_VERSION ioctls,
- * first with zeros to get the string lengths, and then the actually strings.
- * It also null-terminates them since they might not be already.
- */
-drmVersionPtr drmGetVersion(int fd)
-{
-    drmVersionPtr retval;
-    drm_version_t *version = drmMalloc(sizeof(*version));
-
-    version->name_len    = 0;
-    version->name        = NULL;
-    version->date_len    = 0;
-    version->date        = NULL;
-    version->desc_len    = 0;
-    version->desc        = NULL;
-
-    if (drmIoctl(fd, DRM_IOCTL_VERSION, version)) {
-	drmFreeKernelVersion(version);
-	return NULL;
-    }
-
-    if (version->name_len)
-	version->name    = drmMalloc(version->name_len + 1);
-    if (version->date_len)
-	version->date    = drmMalloc(version->date_len + 1);
-    if (version->desc_len)
-	version->desc    = drmMalloc(version->desc_len + 1);
-
-    if (drmIoctl(fd, DRM_IOCTL_VERSION, version)) {
-	drmMsg("DRM_IOCTL_VERSION: %s\n", strerror(errno));
-	drmFreeKernelVersion(version);
-	return NULL;
-    }
-
-    /* The results might not be null-terminated strings, so terminate them. */
-    if (version->name_len) version->name[version->name_len] = '\0';
-    if (version->date_len) version->date[version->date_len] = '\0';
-    if (version->desc_len) version->desc[version->desc_len] = '\0';
-
-    retval = drmMalloc(sizeof(*retval));
-    drmCopyVersion(retval, version);
-    drmFreeKernelVersion(version);
-    return retval;
-}
-
-
-/**
- * Get version information for the DRM user space library.
- * 
- * This version number is driver independent.
- * 
- * \param fd file descriptor.
- *
- * \return version information.
- * 
- * \internal
- * This function allocates and fills a drm_version structure with a hard coded
- * version number.
- */
-drmVersionPtr drmGetLibVersion(int fd)
-{
-    drm_version_t *version = drmMalloc(sizeof(*version));
-
-    /* Version history:
-     *   NOTE THIS MUST NOT GO ABOVE VERSION 1.X due to drivers needing it
-     *   revision 1.0.x = original DRM interface with no drmGetLibVersion
-     *                    entry point and many drm<Device> extensions
-     *   revision 1.1.x = added drmCommand entry points for device extensions
-     *                    added drmGetLibVersion to identify libdrm.a version
-     *   revision 1.2.x = added drmSetInterfaceVersion
-     *                    modified drmOpen to handle both busid and name
-     *   revision 1.3.x = added server + memory manager
-     */
-    version->version_major      = 1;
-    version->version_minor      = 3;
-    version->version_patchlevel = 0;
-
-    return (drmVersionPtr)version;
-}
-
-
-/**
- * Free the bus ID information.
- *
- * \param busid bus ID information string as given by drmGetBusid().
- *
- * \internal
- * This function is just frees the memory pointed by \p busid.
- */
-void drmFreeBusid(const char *busid)
-{
-    drmFree((void *)busid);
-}
-
-
-/**
- * Get the bus ID of the device.
- *
- * \param fd file descriptor.
- *
- * \return bus ID string.
- *
- * \internal
- * This function gets the bus ID via successive DRM_IOCTL_GET_UNIQUE ioctls to
- * get the string length and data, passing the arguments in a drm_unique
- * structure.
- */
-char *drmGetBusid(int fd)
-{
-    drm_unique_t u;
-
-    u.unique_len = 0;
-    u.unique     = NULL;
-
-    if (drmIoctl(fd, DRM_IOCTL_GET_UNIQUE, &u))
-	return NULL;
-    u.unique = drmMalloc(u.unique_len + 1);
-    if (drmIoctl(fd, DRM_IOCTL_GET_UNIQUE, &u))
-	return NULL;
-    u.unique[u.unique_len] = '\0';
-
-    return u.unique;
-}
-
-
-/**
- * Set the bus ID of the device.
- *
- * \param fd file descriptor.
- * \param busid bus ID string.
- *
- * \return zero on success, negative on failure.
- *
- * \internal
- * This function is a wrapper around the DRM_IOCTL_SET_UNIQUE ioctl, passing
- * the arguments in a drm_unique structure.
- */
-int drmSetBusid(int fd, const char *busid)
-{
-    drm_unique_t u;
-
-    u.unique     = (char *)busid;
-    u.unique_len = strlen(busid);
-
-    if (drmIoctl(fd, DRM_IOCTL_SET_UNIQUE, &u)) {
-	return -errno;
-    }
-    return 0;
-}
-
-int drmGetMagic(int fd, drm_magic_t * magic)
-{
-    drm_auth_t auth;
-
-    *magic = 0;
-    if (drmIoctl(fd, DRM_IOCTL_GET_MAGIC, &auth))
-	return -errno;
-    *magic = auth.magic;
-    return 0;
-}
-
-int drmAuthMagic(int fd, drm_magic_t magic)
-{
-    drm_auth_t auth;
-
-    auth.magic = magic;
-    if (drmIoctl(fd, DRM_IOCTL_AUTH_MAGIC, &auth))
-	return -errno;
-    return 0;
-}
-
-/**
- * Specifies a range of memory that is available for mapping by a
- * non-root process.
- *
- * \param fd file descriptor.
- * \param offset usually the physical address. The actual meaning depends of
- * the \p type parameter. See below.
- * \param size of the memory in bytes.
- * \param type type of the memory to be mapped.
- * \param flags combination of several flags to modify the function actions.
- * \param handle will be set to a value that may be used as the offset
- * parameter for mmap().
- * 
- * \return zero on success or a negative value on error.
- *
- * \par Mapping the frame buffer
- * For the frame buffer
- * - \p offset will be the physical address of the start of the frame buffer,
- * - \p size will be the size of the frame buffer in bytes, and
- * - \p type will be DRM_FRAME_BUFFER.
- *
- * \par
- * The area mapped will be uncached. If MTRR support is available in the
- * kernel, the frame buffer area will be set to write combining. 
- *
- * \par Mapping the MMIO register area
- * For the MMIO register area,
- * - \p offset will be the physical address of the start of the register area,
- * - \p size will be the size of the register area bytes, and
- * - \p type will be DRM_REGISTERS.
- * \par
- * The area mapped will be uncached. 
- * 
- * \par Mapping the SAREA
- * For the SAREA,
- * - \p offset will be ignored and should be set to zero,
- * - \p size will be the desired size of the SAREA in bytes,
- * - \p type will be DRM_SHM.
- * 
- * \par
- * A shared memory area of the requested size will be created and locked in
- * kernel memory. This area may be mapped into client-space by using the handle
- * returned. 
- * 
- * \note May only be called by root.
- *
- * \internal
- * This function is a wrapper around the DRM_IOCTL_ADD_MAP ioctl, passing
- * the arguments in a drm_map structure.
- */
-int drmAddMap(int fd, drm_handle_t offset, drmSize size, drmMapType type,
-	      drmMapFlags flags, drm_handle_t *handle)
-{
-    drm_map_t map;
-
-    map.offset  = offset;
-    map.size    = size;
-    map.handle  = 0;
-    map.type    = type;
-    map.flags   = flags;
-    if (drmIoctl(fd, DRM_IOCTL_ADD_MAP, &map))
-	return -errno;
-    if (handle)
-	*handle = (drm_handle_t)map.handle;
-    return 0;
-}
-
-int drmRmMap(int fd, drm_handle_t handle)
-{
-    drm_map_t map;
-
-    map.handle = (void *)handle;
-
-    if(drmIoctl(fd, DRM_IOCTL_RM_MAP, &map))
-	return -errno;
-    return 0;
-}
-
-/**
- * Make buffers available for DMA transfers.
- * 
- * \param fd file descriptor.
- * \param count number of buffers.
- * \param size size of each buffer.
- * \param flags buffer allocation flags.
- * \param agp_offset offset in the AGP aperture 
- *
- * \return number of buffers allocated, negative on error.
- *
- * \internal
- * This function is a wrapper around DRM_IOCTL_ADD_BUFS ioctl.
- *
- * \sa drm_buf_desc.
- */
-int drmAddBufs(int fd, int count, int size, drmBufDescFlags flags,
-	       int agp_offset)
-{
-    drm_buf_desc_t request;
-
-    request.count     = count;
-    request.size      = size;
-    request.low_mark  = 0;
-    request.high_mark = 0;
-    request.flags     = flags;
-    request.agp_start = agp_offset;
-
-    if (drmIoctl(fd, DRM_IOCTL_ADD_BUFS, &request))
-	return -errno;
-    return request.count;
-}
-
-int drmMarkBufs(int fd, double low, double high)
-{
-    drm_buf_info_t info;
-    int            i;
-
-    info.count = 0;
-    info.list  = NULL;
-
-    if (drmIoctl(fd, DRM_IOCTL_INFO_BUFS, &info))
-	return -EINVAL;
-
-    if (!info.count)
-	return -EINVAL;
-
-    if (!(info.list = drmMalloc(info.count * sizeof(*info.list))))
-	return -ENOMEM;
-
-    if (drmIoctl(fd, DRM_IOCTL_INFO_BUFS, &info)) {
-	int retval = -errno;
-	drmFree(info.list);
-	return retval;
-    }
-
-    for (i = 0; i < info.count; i++) {
-	info.list[i].low_mark  = low  * info.list[i].count;
-	info.list[i].high_mark = high * info.list[i].count;
-	if (drmIoctl(fd, DRM_IOCTL_MARK_BUFS, &info.list[i])) {
-	    int retval = -errno;
-	    drmFree(info.list);
-	    return retval;
-	}
-    }
-    drmFree(info.list);
-
-    return 0;
-}
-
-/**
- * Free buffers.
- *
- * \param fd file descriptor.
- * \param count number of buffers to free.
- * \param list list of buffers to be freed.
- *
- * \return zero on success, or a negative value on failure.
- * 
- * \note This function is primarily used for debugging.
- * 
- * \internal
- * This function is a wrapper around the DRM_IOCTL_FREE_BUFS ioctl, passing
- * the arguments in a drm_buf_free structure.
- */
-int drmFreeBufs(int fd, int count, int *list)
-{
-    drm_buf_free_t request;
-
-    request.count = count;
-    request.list  = list;
-    if (drmIoctl(fd, DRM_IOCTL_FREE_BUFS, &request))
-	return -errno;
-    return 0;
-}
-
-
-/**
- * Close the device.
- *
- * \param fd file descriptor.
- *
- * \internal
- * This function closes the file descriptor.
- */
-int drmClose(int fd)
-{
-    unsigned long key    = drmGetKeyFromFd(fd);
-    drmHashEntry  *entry = drmGetEntry(fd);
-
-    drmHashDestroy(entry->tagTable);
-    entry->fd       = 0;
-    entry->f        = NULL;
-    entry->tagTable = NULL;
-
-    drmHashDelete(drmHashTable, key);
-    drmFree(entry);
-
-    return close(fd);
-}
-
-
-/**
- * Map a region of memory.
- *
- * \param fd file descriptor.
- * \param handle handle returned by drmAddMap().
- * \param size size in bytes. Must match the size used by drmAddMap().
- * \param address will contain the user-space virtual address where the mapping
- * begins.
- *
- * \return zero on success, or a negative value on failure.
- * 
- * \internal
- * This function is a wrapper for mmap().
- */
-int drmMap(int fd, drm_handle_t handle, drmSize size, drmAddressPtr address)
-{
-    static unsigned long pagesize_mask = 0;
-
-    if (fd < 0)
-	return -EINVAL;
-
-    if (!pagesize_mask)
-	pagesize_mask = getpagesize() - 1;
-
-    size = (size + pagesize_mask) & ~pagesize_mask;
-
-    *address = mmap(0, size, PROT_READ|PROT_WRITE, MAP_SHARED, fd, handle);
-    if (*address == MAP_FAILED)
-	return -errno;
-    return 0;
-}
-
-
-/**
- * Unmap mappings obtained with drmMap().
- *
- * \param address address as given by drmMap().
- * \param size size in bytes. Must match the size used by drmMap().
- * 
- * \return zero on success, or a negative value on failure.
- *
- * \internal
- * This function is a wrapper for munmap().
- */
-int drmUnmap(drmAddress address, drmSize size)
-{
-    return munmap(address, size);
-}
-
-drmBufInfoPtr drmGetBufInfo(int fd)
-{
-    drm_buf_info_t info;
-    drmBufInfoPtr  retval;
-    int            i;
-
-    info.count = 0;
-    info.list  = NULL;
-
-    if (drmIoctl(fd, DRM_IOCTL_INFO_BUFS, &info))
-	return NULL;
-
-    if (info.count) {
-	if (!(info.list = drmMalloc(info.count * sizeof(*info.list))))
-	    return NULL;
-
-	if (drmIoctl(fd, DRM_IOCTL_INFO_BUFS, &info)) {
-	    drmFree(info.list);
-	    return NULL;
-	}
-
-	retval = drmMalloc(sizeof(*retval));
-	retval->count = info.count;
-	retval->list  = drmMalloc(info.count * sizeof(*retval->list));
-	for (i = 0; i < info.count; i++) {
-	    retval->list[i].count     = info.list[i].count;
-	    retval->list[i].size      = info.list[i].size;
-	    retval->list[i].low_mark  = info.list[i].low_mark;
-	    retval->list[i].high_mark = info.list[i].high_mark;
-	}
-	drmFree(info.list);
-	return retval;
-    }
-    return NULL;
-}
-
-/**
- * Map all DMA buffers into client-virtual space.
- *
- * \param fd file descriptor.
- *
- * \return a pointer to a ::drmBufMap structure.
- *
- * \note The client may not use these buffers until obtaining buffer indices
- * with drmDMA().
- * 
- * \internal
- * This function calls the DRM_IOCTL_MAP_BUFS ioctl and copies the returned
- * information about the buffers in a drm_buf_map structure into the
- * client-visible data structures.
- */ 
-drmBufMapPtr drmMapBufs(int fd)
-{
-    drm_buf_map_t bufs;
-    drmBufMapPtr  retval;
-    int           i;
-
-    bufs.count = 0;
-    bufs.list  = NULL;
-    bufs.virtual = NULL;
-    if (drmIoctl(fd, DRM_IOCTL_MAP_BUFS, &bufs))
-	return NULL;
-
-    if (!bufs.count)
-	return NULL;
-
-	if (!(bufs.list = drmMalloc(bufs.count * sizeof(*bufs.list))))
-	    return NULL;
-
-	if (drmIoctl(fd, DRM_IOCTL_MAP_BUFS, &bufs)) {
-	    drmFree(bufs.list);
-	    return NULL;
-	}
-
-	retval = drmMalloc(sizeof(*retval));
-	retval->count = bufs.count;
-	retval->list  = drmMalloc(bufs.count * sizeof(*retval->list));
-	for (i = 0; i < bufs.count; i++) {
-	    retval->list[i].idx     = bufs.list[i].idx;
-	    retval->list[i].total   = bufs.list[i].total;
-	    retval->list[i].used    = 0;
-	    retval->list[i].address = bufs.list[i].address;
-	}
-
-	drmFree(bufs.list);
-	
-	return retval;
-}
-
-
-/**
- * Unmap buffers allocated with drmMapBufs().
- *
- * \return zero on success, or negative value on failure.
- *
- * \internal
- * Calls munmap() for every buffer stored in \p bufs and frees the
- * memory allocated by drmMapBufs().
- */
-int drmUnmapBufs(drmBufMapPtr bufs)
-{
-    int i;
-
-    for (i = 0; i < bufs->count; i++) {
-	munmap(bufs->list[i].address, bufs->list[i].total);
-    }
-
-    drmFree(bufs->list);
-    drmFree(bufs);
-	
-    return 0;
-}
-
-
-#define DRM_DMA_RETRY		16
-
-/**
- * Reserve DMA buffers.
- *
- * \param fd file descriptor.
- * \param request 
- * 
- * \return zero on success, or a negative value on failure.
- *
- * \internal
- * Assemble the arguments into a drm_dma structure and keeps issuing the
- * DRM_IOCTL_DMA ioctl until success or until maximum number of retries.
- */
-int drmDMA(int fd, drmDMAReqPtr request)
-{
-    drm_dma_t dma;
-    int ret, i = 0;
-
-    dma.context         = request->context;
-    dma.send_count      = request->send_count;
-    dma.send_indices    = request->send_list;
-    dma.send_sizes      = request->send_sizes;
-    dma.flags           = request->flags;
-    dma.request_count   = request->request_count;
-    dma.request_size    = request->request_size;
-    dma.request_indices = request->request_list;
-    dma.request_sizes   = request->request_sizes;
-    dma.granted_count   = 0;
-
-    do {
-	ret = ioctl( fd, DRM_IOCTL_DMA, &dma );
-    } while ( ret && errno == EAGAIN && i++ < DRM_DMA_RETRY );
-
-    if ( ret == 0 ) {
-	request->granted_count = dma.granted_count;
-	return 0;
-    } else {
-	return -errno;
-    }
-}
-
-
-/**
- * Obtain heavyweight hardware lock.
- *
- * \param fd file descriptor.
- * \param context context.
- * \param flags flags that determine the sate of the hardware when the function
- * returns.
- * 
- * \return always zero.
- * 
- * \internal
- * This function translates the arguments into a drm_lock structure and issue
- * the DRM_IOCTL_LOCK ioctl until the lock is successfully acquired.
- */
-int drmGetLock(int fd, drm_context_t context, drmLockFlags flags)
-{
-    drm_lock_t lock;
-
-    lock.context = context;
-    lock.flags   = 0;
-    if (flags & DRM_LOCK_READY)      lock.flags |= _DRM_LOCK_READY;
-    if (flags & DRM_LOCK_QUIESCENT)  lock.flags |= _DRM_LOCK_QUIESCENT;
-    if (flags & DRM_LOCK_FLUSH)      lock.flags |= _DRM_LOCK_FLUSH;
-    if (flags & DRM_LOCK_FLUSH_ALL)  lock.flags |= _DRM_LOCK_FLUSH_ALL;
-    if (flags & DRM_HALT_ALL_QUEUES) lock.flags |= _DRM_HALT_ALL_QUEUES;
-    if (flags & DRM_HALT_CUR_QUEUES) lock.flags |= _DRM_HALT_CUR_QUEUES;
-
-    while (drmIoctl(fd, DRM_IOCTL_LOCK, &lock))
-	;
-    return 0;
-}
-
-/**
- * Release the hardware lock.
- *
- * \param fd file descriptor.
- * \param context context.
- * 
- * \return zero on success, or a negative value on failure.
- * 
- * \internal
- * This function is a wrapper around the DRM_IOCTL_UNLOCK ioctl, passing the
- * argument in a drm_lock structure.
- */
-int drmUnlock(int fd, drm_context_t context)
-{
-    drm_lock_t lock;
-
-    lock.context = context;
-    lock.flags   = 0;
-    return drmIoctl(fd, DRM_IOCTL_UNLOCK, &lock);
-}
-
-drm_context_t *drmGetReservedContextList(int fd, int *count)
-{
-    drm_ctx_res_t res;
-    drm_ctx_t     *list;
-    drm_context_t * retval;
-    int           i;
-
-    res.count    = 0;
-    res.contexts = NULL;
-    if (drmIoctl(fd, DRM_IOCTL_RES_CTX, &res))
-	return NULL;
-
-    if (!res.count)
-	return NULL;
-
-    if (!(list   = drmMalloc(res.count * sizeof(*list))))
-	return NULL;
-    if (!(retval = drmMalloc(res.count * sizeof(*retval)))) {
-	drmFree(list);
-	return NULL;
-    }
-
-    res.contexts = list;
-    if (drmIoctl(fd, DRM_IOCTL_RES_CTX, &res))
-	return NULL;
-
-    for (i = 0; i < res.count; i++)
-	retval[i] = list[i].handle;
-    drmFree(list);
-
-    *count = res.count;
-    return retval;
-}
-
-void drmFreeReservedContextList(drm_context_t *pt)
-{
-    drmFree(pt);
-}
-
-/**
- * Create context.
- *
- * Used by the X server during GLXContext initialization. This causes
- * per-context kernel-level resources to be allocated.
- *
- * \param fd file descriptor.
- * \param handle is set on success. To be used by the client when requesting DMA
- * dispatch with drmDMA().
- * 
- * \return zero on success, or a negative value on failure.
- * 
- * \note May only be called by root.
- * 
- * \internal
- * This function is a wrapper around the DRM_IOCTL_ADD_CTX ioctl, passing the
- * argument in a drm_ctx structure.
- */
-int drmCreateContext(int fd, drm_context_t *handle)
-{
-    drm_ctx_t ctx;
-
-    ctx.flags = 0;	/* Modified with functions below */
-    if (drmIoctl(fd, DRM_IOCTL_ADD_CTX, &ctx))
-	return -errno;
-    *handle = ctx.handle;
-    return 0;
-}
-
-int drmSwitchToContext(int fd, drm_context_t context)
-{
-    drm_ctx_t ctx;
-
-    ctx.handle = context;
-    if (drmIoctl(fd, DRM_IOCTL_SWITCH_CTX, &ctx))
-	return -errno;
-    return 0;
-}
-
-int drmSetContextFlags(int fd, drm_context_t context, drm_context_tFlags flags)
-{
-    drm_ctx_t ctx;
-
-    /*
-     * Context preserving means that no context switches are done between DMA
-     * buffers from one context and the next.  This is suitable for use in the
-     * X server (which promises to maintain hardware context), or in the
-     * client-side library when buffers are swapped on behalf of two threads.
-     */
-    ctx.handle = context;
-    ctx.flags  = 0;
-    if (flags & DRM_CONTEXT_PRESERVED)
-	ctx.flags |= _DRM_CONTEXT_PRESERVED;
-    if (flags & DRM_CONTEXT_2DONLY)
-	ctx.flags |= _DRM_CONTEXT_2DONLY;
-    if (drmIoctl(fd, DRM_IOCTL_MOD_CTX, &ctx))
-	return -errno;
-    return 0;
-}
-
-int drmGetContextFlags(int fd, drm_context_t context,
-                       drm_context_tFlagsPtr flags)
-{
-    drm_ctx_t ctx;
-
-    ctx.handle = context;
-    if (drmIoctl(fd, DRM_IOCTL_GET_CTX, &ctx))
-	return -errno;
-    *flags = 0;
-    if (ctx.flags & _DRM_CONTEXT_PRESERVED)
-	*flags |= DRM_CONTEXT_PRESERVED;
-    if (ctx.flags & _DRM_CONTEXT_2DONLY)
-	*flags |= DRM_CONTEXT_2DONLY;
-    return 0;
-}
-
-/**
- * Destroy context.
- *
- * Free any kernel-level resources allocated with drmCreateContext() associated
- * with the context.
- * 
- * \param fd file descriptor.
- * \param handle handle given by drmCreateContext().
- * 
- * \return zero on success, or a negative value on failure.
- * 
- * \note May only be called by root.
- * 
- * \internal
- * This function is a wrapper around the DRM_IOCTL_RM_CTX ioctl, passing the
- * argument in a drm_ctx structure.
- */
-int drmDestroyContext(int fd, drm_context_t handle)
-{
-    drm_ctx_t ctx;
-    ctx.handle = handle;
-    if (drmIoctl(fd, DRM_IOCTL_RM_CTX, &ctx))
-	return -errno;
-    return 0;
-}
-
-int drmCreateDrawable(int fd, drm_drawable_t *handle)
-{
-    drm_draw_t draw;
-    if (drmIoctl(fd, DRM_IOCTL_ADD_DRAW, &draw))
-	return -errno;
-    *handle = draw.handle;
-    return 0;
-}
-
-int drmDestroyDrawable(int fd, drm_drawable_t handle)
-{
-    drm_draw_t draw;
-    draw.handle = handle;
-    if (drmIoctl(fd, DRM_IOCTL_RM_DRAW, &draw))
-	return -errno;
-    return 0;
-}
-
-int drmUpdateDrawableInfo(int fd, drm_drawable_t handle,
-			   drm_drawable_info_type_t type, unsigned int num,
-			   void *data)
-{
-    drm_update_draw_t update;
-
-    update.handle = handle;
-    update.type = type;
-    update.num = num;
-    update.data = (unsigned long long)(unsigned long)data;
-
-    if (drmIoctl(fd, DRM_IOCTL_UPDATE_DRAW, &update))
-	return -errno;
-
-    return 0;
-}
-
-/**
- * Acquire the AGP device.
- *
- * Must be called before any of the other AGP related calls.
- *
- * \param fd file descriptor.
- * 
- * \return zero on success, or a negative value on failure.
- * 
- * \internal
- * This function is a wrapper around the DRM_IOCTL_AGP_ACQUIRE ioctl.
- */
-int drmAgpAcquire(int fd)
-{
-    if (drmIoctl(fd, DRM_IOCTL_AGP_ACQUIRE, NULL))
-	return -errno;
-    return 0;
-}
-
-
-/**
- * Release the AGP device.
- *
- * \param fd file descriptor.
- * 
- * \return zero on success, or a negative value on failure.
- * 
- * \internal
- * This function is a wrapper around the DRM_IOCTL_AGP_RELEASE ioctl.
- */
-int drmAgpRelease(int fd)
-{
-    if (drmIoctl(fd, DRM_IOCTL_AGP_RELEASE, NULL))
-	return -errno;
-    return 0;
-}
-
-
-/**
- * Set the AGP mode.
- *
- * \param fd file descriptor.
- * \param mode AGP mode.
- * 
- * \return zero on success, or a negative value on failure.
- * 
- * \internal
- * This function is a wrapper around the DRM_IOCTL_AGP_ENABLE ioctl, passing the
- * argument in a drm_agp_mode structure.
- */
-int drmAgpEnable(int fd, unsigned long mode)
-{
-    drm_agp_mode_t m;
-
-    m.mode = mode;
-    if (drmIoctl(fd, DRM_IOCTL_AGP_ENABLE, &m))
-	return -errno;
-    return 0;
-}
-
-
-/**
- * Allocate a chunk of AGP memory.
- *
- * \param fd file descriptor.
- * \param size requested memory size in bytes. Will be rounded to page boundary.
- * \param type type of memory to allocate.
- * \param address if not zero, will be set to the physical address of the
- * allocated memory.
- * \param handle on success will be set to a handle of the allocated memory.
- * 
- * \return zero on success, or a negative value on failure.
- * 
- * \internal
- * This function is a wrapper around the DRM_IOCTL_AGP_ALLOC ioctl, passing the
- * arguments in a drm_agp_buffer structure.
- */
-int drmAgpAlloc(int fd, unsigned long size, unsigned long type,
-		unsigned long *address, drm_handle_t *handle)
-{
-    drm_agp_buffer_t b;
-
-    *handle = DRM_AGP_NO_HANDLE;
-    b.size   = size;
-    b.handle = 0;
-    b.type   = type;
-    if (drmIoctl(fd, DRM_IOCTL_AGP_ALLOC, &b))
-	return -errno;
-    if (address != 0UL)
-	*address = b.physical;
-    *handle = b.handle;
-    return 0;
-}
-
-
-/**
- * Free a chunk of AGP memory.
- *
- * \param fd file descriptor.
- * \param handle handle to the allocated memory, as given by drmAgpAllocate().
- * 
- * \return zero on success, or a negative value on failure.
- * 
- * \internal
- * This function is a wrapper around the DRM_IOCTL_AGP_FREE ioctl, passing the
- * argument in a drm_agp_buffer structure.
- */
-int drmAgpFree(int fd, drm_handle_t handle)
-{
-    drm_agp_buffer_t b;
-
-    b.size   = 0;
-    b.handle = handle;
-    if (drmIoctl(fd, DRM_IOCTL_AGP_FREE, &b))
-	return -errno;
-    return 0;
-}
-
-
-/**
- * Bind a chunk of AGP memory.
- *
- * \param fd file descriptor.
- * \param handle handle to the allocated memory, as given by drmAgpAllocate().
- * \param offset offset in bytes. It will round to page boundary.
- * 
- * \return zero on success, or a negative value on failure.
- * 
- * \internal
- * This function is a wrapper around the DRM_IOCTL_AGP_BIND ioctl, passing the
- * argument in a drm_agp_binding structure.
- */
-int drmAgpBind(int fd, drm_handle_t handle, unsigned long offset)
-{
-    drm_agp_binding_t b;
-
-    b.handle = handle;
-    b.offset = offset;
-    if (drmIoctl(fd, DRM_IOCTL_AGP_BIND, &b))
-	return -errno;
-    return 0;
-}
-
-
-/**
- * Unbind a chunk of AGP memory.
- *
- * \param fd file descriptor.
- * \param handle handle to the allocated memory, as given by drmAgpAllocate().
- * 
- * \return zero on success, or a negative value on failure.
- * 
- * \internal
- * This function is a wrapper around the DRM_IOCTL_AGP_UNBIND ioctl, passing
- * the argument in a drm_agp_binding structure.
- */
-int drmAgpUnbind(int fd, drm_handle_t handle)
-{
-    drm_agp_binding_t b;
-
-    b.handle = handle;
-    b.offset = 0;
-    if (drmIoctl(fd, DRM_IOCTL_AGP_UNBIND, &b))
-	return -errno;
-    return 0;
-}
-
-
-/**
- * Get AGP driver major version number.
- *
- * \param fd file descriptor.
- * 
- * \return major version number on success, or a negative value on failure..
- * 
- * \internal
- * This function is a wrapper around the DRM_IOCTL_AGP_INFO ioctl, getting the
- * necessary information in a drm_agp_info structure.
- */
-int drmAgpVersionMajor(int fd)
-{
-    drm_agp_info_t i;
-
-    if (drmIoctl(fd, DRM_IOCTL_AGP_INFO, &i))
-	return -errno;
-    return i.agp_version_major;
-}
-
-
-/**
- * Get AGP driver minor version number.
- *
- * \param fd file descriptor.
- * 
- * \return minor version number on success, or a negative value on failure.
- * 
- * \internal
- * This function is a wrapper around the DRM_IOCTL_AGP_INFO ioctl, getting the
- * necessary information in a drm_agp_info structure.
- */
-int drmAgpVersionMinor(int fd)
-{
-    drm_agp_info_t i;
-
-    if (drmIoctl(fd, DRM_IOCTL_AGP_INFO, &i))
-	return -errno;
-    return i.agp_version_minor;
-}
-
-
-/**
- * Get AGP mode.
- *
- * \param fd file descriptor.
- * 
- * \return mode on success, or zero on failure.
- * 
- * \internal
- * This function is a wrapper around the DRM_IOCTL_AGP_INFO ioctl, getting the
- * necessary information in a drm_agp_info structure.
- */
-unsigned long drmAgpGetMode(int fd)
-{
-    drm_agp_info_t i;
-
-    if (drmIoctl(fd, DRM_IOCTL_AGP_INFO, &i))
-	return 0;
-    return i.mode;
-}
-
-
-/**
- * Get AGP aperture base.
- *
- * \param fd file descriptor.
- * 
- * \return aperture base on success, zero on failure.
- * 
- * \internal
- * This function is a wrapper around the DRM_IOCTL_AGP_INFO ioctl, getting the
- * necessary information in a drm_agp_info structure.
- */
-unsigned long drmAgpBase(int fd)
-{
-    drm_agp_info_t i;
-
-    if (drmIoctl(fd, DRM_IOCTL_AGP_INFO, &i))
-	return 0;
-    return i.aperture_base;
-}
-
-
-/**
- * Get AGP aperture size.
- *
- * \param fd file descriptor.
- * 
- * \return aperture size on success, zero on failure.
- * 
- * \internal
- * This function is a wrapper around the DRM_IOCTL_AGP_INFO ioctl, getting the
- * necessary information in a drm_agp_info structure.
- */
-unsigned long drmAgpSize(int fd)
-{
-    drm_agp_info_t i;
-
-    if (drmIoctl(fd, DRM_IOCTL_AGP_INFO, &i))
-	return 0;
-    return i.aperture_size;
-}
-
-
-/**
- * Get used AGP memory.
- *
- * \param fd file descriptor.
- * 
- * \return memory used on success, or zero on failure.
- * 
- * \internal
- * This function is a wrapper around the DRM_IOCTL_AGP_INFO ioctl, getting the
- * necessary information in a drm_agp_info structure.
- */
-unsigned long drmAgpMemoryUsed(int fd)
-{
-    drm_agp_info_t i;
-
-    if (drmIoctl(fd, DRM_IOCTL_AGP_INFO, &i))
-	return 0;
-    return i.memory_used;
-}
-
-
-/**
- * Get available AGP memory.
- *
- * \param fd file descriptor.
- * 
- * \return memory available on success, or zero on failure.
- * 
- * \internal
- * This function is a wrapper around the DRM_IOCTL_AGP_INFO ioctl, getting the
- * necessary information in a drm_agp_info structure.
- */
-unsigned long drmAgpMemoryAvail(int fd)
-{
-    drm_agp_info_t i;
-
-    if (drmIoctl(fd, DRM_IOCTL_AGP_INFO, &i))
-	return 0;
-    return i.memory_allowed;
-}
-
-
-/**
- * Get hardware vendor ID.
- *
- * \param fd file descriptor.
- * 
- * \return vendor ID on success, or zero on failure.
- * 
- * \internal
- * This function is a wrapper around the DRM_IOCTL_AGP_INFO ioctl, getting the
- * necessary information in a drm_agp_info structure.
- */
-unsigned int drmAgpVendorId(int fd)
-{
-    drm_agp_info_t i;
-
-    if (drmIoctl(fd, DRM_IOCTL_AGP_INFO, &i))
-	return 0;
-    return i.id_vendor;
-}
-
-
-/**
- * Get hardware device ID.
- *
- * \param fd file descriptor.
- * 
- * \return zero on success, or zero on failure.
- * 
- * \internal
- * This function is a wrapper around the DRM_IOCTL_AGP_INFO ioctl, getting the
- * necessary information in a drm_agp_info structure.
- */
-unsigned int drmAgpDeviceId(int fd)
-{
-    drm_agp_info_t i;
-
-    if (drmIoctl(fd, DRM_IOCTL_AGP_INFO, &i))
-	return 0;
-    return i.id_device;
-}
-
-int drmScatterGatherAlloc(int fd, unsigned long size, drm_handle_t *handle)
-{
-    drm_scatter_gather_t sg;
-
-    *handle = 0;
-    sg.size   = size;
-    sg.handle = 0;
-    if (drmIoctl(fd, DRM_IOCTL_SG_ALLOC, &sg))
-	return -errno;
-    *handle = sg.handle;
-    return 0;
-}
-
-int drmScatterGatherFree(int fd, drm_handle_t handle)
-{
-    drm_scatter_gather_t sg;
-
-    sg.size   = 0;
-    sg.handle = handle;
-    if (drmIoctl(fd, DRM_IOCTL_SG_FREE, &sg))
-	return -errno;
-    return 0;
-}
-
-/**
- * Wait for VBLANK.
- *
- * \param fd file descriptor.
- * \param vbl pointer to a drmVBlank structure.
- * 
- * \return zero on success, or a negative value on failure.
- * 
- * \internal
- * This function is a wrapper around the DRM_IOCTL_WAIT_VBLANK ioctl.
- */
-int drmWaitVBlank(int fd, drmVBlankPtr vbl)
-{
-    struct timespec timeout, cur;
-    int ret;
-
-    ret = clock_gettime(CLOCK_MONOTONIC, &timeout);
-    if (ret < 0) {
-	fprintf(stderr, "clock_gettime failed: %s\n", strerror(ret));
-	goto out;
-    }
-    timeout.tv_sec++;
-
-    do {
-       ret = ioctl(fd, DRM_IOCTL_WAIT_VBLANK, vbl);
-       vbl->request.type &= ~DRM_VBLANK_RELATIVE;
-       if (ret && errno == EINTR) {
-	       clock_gettime(CLOCK_MONOTONIC, &cur);
-	       /* Timeout after 1s */
-	       if (cur.tv_sec > timeout.tv_sec + 1 ||
-		   (cur.tv_sec == timeout.tv_sec && cur.tv_nsec >=
-		    timeout.tv_nsec)) {
-		       errno = EBUSY;
-		       ret = -1;
-		       break;
-	       }
-       }
-    } while (ret && errno == EINTR);
-
-out:
-    return ret;
-}
-
-int drmError(int err, const char *label)
-{
-    switch (err) {
-    case DRM_ERR_NO_DEVICE:
-	fprintf(stderr, "%s: no device\n", label);
-	break;
-    case DRM_ERR_NO_ACCESS:
-	fprintf(stderr, "%s: no access\n", label);
-	break;
-    case DRM_ERR_NOT_ROOT:
-	fprintf(stderr, "%s: not root\n", label);
-	break;
-    case DRM_ERR_INVALID:
-	fprintf(stderr, "%s: invalid args\n", label);
-	break;
-    default:
-	if (err < 0)
-	    err = -err;
-	fprintf( stderr, "%s: error %d (%s)\n", label, err, strerror(err) );
-	break;
-    }
-
-    return 1;
-}
-
-/**
- * Install IRQ handler.
- *
- * \param fd file descriptor.
- * \param irq IRQ number.
- * 
- * \return zero on success, or a negative value on failure.
- * 
- * \internal
- * This function is a wrapper around the DRM_IOCTL_CONTROL ioctl, passing the
- * argument in a drm_control structure.
- */
-int drmCtlInstHandler(int fd, int irq)
-{
-    drm_control_t ctl;
-
-    ctl.func  = DRM_INST_HANDLER;
-    ctl.irq   = irq;
-    if (drmIoctl(fd, DRM_IOCTL_CONTROL, &ctl))
-	return -errno;
-    return 0;
-}
-
-
-/**
- * Uninstall IRQ handler.
- *
- * \param fd file descriptor.
- * 
- * \return zero on success, or a negative value on failure.
- * 
- * \internal
- * This function is a wrapper around the DRM_IOCTL_CONTROL ioctl, passing the
- * argument in a drm_control structure.
- */
-int drmCtlUninstHandler(int fd)
-{
-    drm_control_t ctl;
-
-    ctl.func  = DRM_UNINST_HANDLER;
-    ctl.irq   = 0;
-    if (drmIoctl(fd, DRM_IOCTL_CONTROL, &ctl))
-	return -errno;
-    return 0;
-}
-
-int drmFinish(int fd, int context, drmLockFlags flags)
-{
-    drm_lock_t lock;
-
-    lock.context = context;
-    lock.flags   = 0;
-    if (flags & DRM_LOCK_READY)      lock.flags |= _DRM_LOCK_READY;
-    if (flags & DRM_LOCK_QUIESCENT)  lock.flags |= _DRM_LOCK_QUIESCENT;
-    if (flags & DRM_LOCK_FLUSH)      lock.flags |= _DRM_LOCK_FLUSH;
-    if (flags & DRM_LOCK_FLUSH_ALL)  lock.flags |= _DRM_LOCK_FLUSH_ALL;
-    if (flags & DRM_HALT_ALL_QUEUES) lock.flags |= _DRM_HALT_ALL_QUEUES;
-    if (flags & DRM_HALT_CUR_QUEUES) lock.flags |= _DRM_HALT_CUR_QUEUES;
-    if (drmIoctl(fd, DRM_IOCTL_FINISH, &lock))
-	return -errno;
-    return 0;
-}
-
-/**
- * Get IRQ from bus ID.
- *
- * \param fd file descriptor.
- * \param busnum bus number.
- * \param devnum device number.
- * \param funcnum function number.
- * 
- * \return IRQ number on success, or a negative value on failure.
- * 
- * \internal
- * This function is a wrapper around the DRM_IOCTL_IRQ_BUSID ioctl, passing the
- * arguments in a drm_irq_busid structure.
- */
-int drmGetInterruptFromBusID(int fd, int busnum, int devnum, int funcnum)
-{
-    drm_irq_busid_t p;
-
-    p.busnum  = busnum;
-    p.devnum  = devnum;
-    p.funcnum = funcnum;
-    if (drmIoctl(fd, DRM_IOCTL_IRQ_BUSID, &p))
-	return -errno;
-    return p.irq;
-}
-
-int drmAddContextTag(int fd, drm_context_t context, void *tag)
-{
-    drmHashEntry  *entry = drmGetEntry(fd);
-
-    if (drmHashInsert(entry->tagTable, context, tag)) {
-	drmHashDelete(entry->tagTable, context);
-	drmHashInsert(entry->tagTable, context, tag);
-    }
-    return 0;
-}
-
-int drmDelContextTag(int fd, drm_context_t context)
-{
-    drmHashEntry  *entry = drmGetEntry(fd);
-
-    return drmHashDelete(entry->tagTable, context);
-}
-
-void *drmGetContextTag(int fd, drm_context_t context)
-{
-    drmHashEntry  *entry = drmGetEntry(fd);
-    void          *value;
-
-    if (drmHashLookup(entry->tagTable, context, &value))
-	return NULL;
-
-    return value;
-}
-
-int drmAddContextPrivateMapping(int fd, drm_context_t ctx_id,
-                                drm_handle_t handle)
-{
-    drm_ctx_priv_map_t map;
-
-    map.ctx_id = ctx_id;
-    map.handle = (void *)handle;
-
-    if (drmIoctl(fd, DRM_IOCTL_SET_SAREA_CTX, &map))
-	return -errno;
-    return 0;
-}
-
-int drmGetContextPrivateMapping(int fd, drm_context_t ctx_id,
-                                drm_handle_t *handle)
-{
-    drm_ctx_priv_map_t map;
-
-    map.ctx_id = ctx_id;
-
-    if (drmIoctl(fd, DRM_IOCTL_GET_SAREA_CTX, &map))
-	return -errno;
-    if (handle)
-	*handle = (drm_handle_t)map.handle;
-
-    return 0;
-}
-
-int drmGetMap(int fd, int idx, drm_handle_t *offset, drmSize *size,
-	      drmMapType *type, drmMapFlags *flags, drm_handle_t *handle,
-	      int *mtrr)
-{
-    drm_map_t map;
-
-    map.offset = idx;
-    if (drmIoctl(fd, DRM_IOCTL_GET_MAP, &map))
-	return -errno;
-    *offset = map.offset;
-    *size   = map.size;
-    *type   = map.type;
-    *flags  = map.flags;
-    *handle = (unsigned long)map.handle;
-    *mtrr   = map.mtrr;
-    return 0;
-}
-
-int drmGetClient(int fd, int idx, int *auth, int *pid, int *uid,
-		 unsigned long *magic, unsigned long *iocs)
-{
-    drm_client_t client;
-
-    client.idx = idx;
-    if (drmIoctl(fd, DRM_IOCTL_GET_CLIENT, &client))
-	return -errno;
-    *auth      = client.auth;
-    *pid       = client.pid;
-    *uid       = client.uid;
-    *magic     = client.magic;
-    *iocs      = client.iocs;
-    return 0;
-}
-
-int drmGetStats(int fd, drmStatsT *stats)
-{
-    drm_stats_t s;
-    int         i;
-
-    if (drmIoctl(fd, DRM_IOCTL_GET_STATS, &s))
-	return -errno;
-
-    stats->count = 0;
-    memset(stats, 0, sizeof(*stats));
-    if (s.count > sizeof(stats->data)/sizeof(stats->data[0]))
-	return -1;
-
-#define SET_VALUE                              \
-    stats->data[i].long_format = "%-20.20s";   \
-    stats->data[i].rate_format = "%8.8s";      \
-    stats->data[i].isvalue     = 1;            \
-    stats->data[i].verbose     = 0
-
-#define SET_COUNT                              \
-    stats->data[i].long_format = "%-20.20s";   \
-    stats->data[i].rate_format = "%5.5s";      \
-    stats->data[i].isvalue     = 0;            \
-    stats->data[i].mult_names  = "kgm";        \
-    stats->data[i].mult        = 1000;         \
-    stats->data[i].verbose     = 0
-
-#define SET_BYTE                               \
-    stats->data[i].long_format = "%-20.20s";   \
-    stats->data[i].rate_format = "%5.5s";      \
-    stats->data[i].isvalue     = 0;            \
-    stats->data[i].mult_names  = "KGM";        \
-    stats->data[i].mult        = 1024;         \
-    stats->data[i].verbose     = 0
-
-
-    stats->count = s.count;
-    for (i = 0; i < s.count; i++) {
-	stats->data[i].value = s.data[i].value;
-	switch (s.data[i].type) {
-	case _DRM_STAT_LOCK:
-	    stats->data[i].long_name = "Lock";
-	    stats->data[i].rate_name = "Lock";
-	    SET_VALUE;
-	    break;
-	case _DRM_STAT_OPENS:
-	    stats->data[i].long_name = "Opens";
-	    stats->data[i].rate_name = "O";
-	    SET_COUNT;
-	    stats->data[i].verbose   = 1;
-	    break;
-	case _DRM_STAT_CLOSES:
-	    stats->data[i].long_name = "Closes";
-	    stats->data[i].rate_name = "Lock";
-	    SET_COUNT;
-	    stats->data[i].verbose   = 1;
-	    break;
-	case _DRM_STAT_IOCTLS:
-	    stats->data[i].long_name = "Ioctls";
-	    stats->data[i].rate_name = "Ioc/s";
-	    SET_COUNT;
-	    break;
-	case _DRM_STAT_LOCKS:
-	    stats->data[i].long_name = "Locks";
-	    stats->data[i].rate_name = "Lck/s";
-	    SET_COUNT;
-	    break;
-	case _DRM_STAT_UNLOCKS:
-	    stats->data[i].long_name = "Unlocks";
-	    stats->data[i].rate_name = "Unl/s";
-	    SET_COUNT;
-	    break;
-	case _DRM_STAT_IRQ:
-	    stats->data[i].long_name = "IRQs";
-	    stats->data[i].rate_name = "IRQ/s";
-	    SET_COUNT;
-	    break;
-	case _DRM_STAT_PRIMARY:
-	    stats->data[i].long_name = "Primary Bytes";
-	    stats->data[i].rate_name = "PB/s";
-	    SET_BYTE;
-	    break;
-	case _DRM_STAT_SECONDARY:
-	    stats->data[i].long_name = "Secondary Bytes";
-	    stats->data[i].rate_name = "SB/s";
-	    SET_BYTE;
-	    break;
-	case _DRM_STAT_DMA:
-	    stats->data[i].long_name = "DMA";
-	    stats->data[i].rate_name = "DMA/s";
-	    SET_COUNT;
-	    break;
-	case _DRM_STAT_SPECIAL:
-	    stats->data[i].long_name = "Special DMA";
-	    stats->data[i].rate_name = "dma/s";
-	    SET_COUNT;
-	    break;
-	case _DRM_STAT_MISSED:
-	    stats->data[i].long_name = "Miss";
-	    stats->data[i].rate_name = "Ms/s";
-	    SET_COUNT;
-	    break;
-	case _DRM_STAT_VALUE:
-	    stats->data[i].long_name = "Value";
-	    stats->data[i].rate_name = "Value";
-	    SET_VALUE;
-	    break;
-	case _DRM_STAT_BYTE:
-	    stats->data[i].long_name = "Bytes";
-	    stats->data[i].rate_name = "B/s";
-	    SET_BYTE;
-	    break;
-	case _DRM_STAT_COUNT:
-	default:
-	    stats->data[i].long_name = "Count";
-	    stats->data[i].rate_name = "Cnt/s";
-	    SET_COUNT;
-	    break;
-	}
-    }
-    return 0;
-}
-
-/**
- * Issue a set-version ioctl.
- *
- * \param fd file descriptor.
- * \param drmCommandIndex command index 
- * \param data source pointer of the data to be read and written.
- * \param size size of the data to be read and written.
- * 
- * \return zero on success, or a negative value on failure.
- * 
- * \internal
- * It issues a read-write ioctl given by 
- * \code DRM_COMMAND_BASE + drmCommandIndex \endcode.
- */
-int drmSetInterfaceVersion(int fd, drmSetVersion *version)
-{
-    int retcode = 0;
-    drm_set_version_t sv;
-
-    sv.drm_di_major = version->drm_di_major;
-    sv.drm_di_minor = version->drm_di_minor;
-    sv.drm_dd_major = version->drm_dd_major;
-    sv.drm_dd_minor = version->drm_dd_minor;
-
-    if (drmIoctl(fd, DRM_IOCTL_SET_VERSION, &sv)) {
-	retcode = -errno;
-    }
-
-    version->drm_di_major = sv.drm_di_major;
-    version->drm_di_minor = sv.drm_di_minor;
-    version->drm_dd_major = sv.drm_dd_major;
-    version->drm_dd_minor = sv.drm_dd_minor;
-
-    return retcode;
-}
-
-/**
- * Send a device-specific command.
- *
- * \param fd file descriptor.
- * \param drmCommandIndex command index 
- * 
- * \return zero on success, or a negative value on failure.
- * 
- * \internal
- * It issues a ioctl given by 
- * \code DRM_COMMAND_BASE + drmCommandIndex \endcode.
- */
-int drmCommandNone(int fd, unsigned long drmCommandIndex)
-{
-    void *data = NULL; /* dummy */
-    unsigned long request;
-
-    request = DRM_IO( DRM_COMMAND_BASE + drmCommandIndex);
-
-    if (drmIoctl(fd, request, data)) {
-	return -errno;
-    }
-    return 0;
-}
-
-
-/**
- * Send a device-specific read command.
- *
- * \param fd file descriptor.
- * \param drmCommandIndex command index 
- * \param data destination pointer of the data to be read.
- * \param size size of the data to be read.
- * 
- * \return zero on success, or a negative value on failure.
- *
- * \internal
- * It issues a read ioctl given by 
- * \code DRM_COMMAND_BASE + drmCommandIndex \endcode.
- */
-int drmCommandRead(int fd, unsigned long drmCommandIndex, void *data,
-                   unsigned long size)
-{
-    unsigned long request;
-
-    request = DRM_IOC( DRM_IOC_READ, DRM_IOCTL_BASE, 
-	DRM_COMMAND_BASE + drmCommandIndex, size);
-
-    if (drmIoctl(fd, request, data)) {
-	return -errno;
-    }
-    return 0;
-}
-
-
-/**
- * Send a device-specific write command.
- *
- * \param fd file descriptor.
- * \param drmCommandIndex command index 
- * \param data source pointer of the data to be written.
- * \param size size of the data to be written.
- * 
- * \return zero on success, or a negative value on failure.
- * 
- * \internal
- * It issues a write ioctl given by 
- * \code DRM_COMMAND_BASE + drmCommandIndex \endcode.
- */
-int drmCommandWrite(int fd, unsigned long drmCommandIndex, void *data,
-                    unsigned long size)
-{
-    unsigned long request;
-
-    request = DRM_IOC( DRM_IOC_WRITE, DRM_IOCTL_BASE, 
-	DRM_COMMAND_BASE + drmCommandIndex, size);
-
-    if (drmIoctl(fd, request, data)) {
-	return -errno;
-    }
-    return 0;
-}
-
-
-/**
- * Send a device-specific read-write command.
- *
- * \param fd file descriptor.
- * \param drmCommandIndex command index 
- * \param data source pointer of the data to be read and written.
- * \param size size of the data to be read and written.
- * 
- * \return zero on success, or a negative value on failure.
- * 
- * \internal
- * It issues a read-write ioctl given by 
- * \code DRM_COMMAND_BASE + drmCommandIndex \endcode.
- */
-int drmCommandWriteRead(int fd, unsigned long drmCommandIndex, void *data,
-                        unsigned long size)
-{
-    unsigned long request;
-
-    request = DRM_IOC( DRM_IOC_READ|DRM_IOC_WRITE, DRM_IOCTL_BASE, 
-	DRM_COMMAND_BASE + drmCommandIndex, size);
-
-    if (drmIoctl(fd, request, data))
-	return -errno;
-    return 0;
-}
-
-#define DRM_MAX_FDS 16
-static struct {
-    char *BusID;
-    int fd;
-    int refcount;
-} connection[DRM_MAX_FDS];
-
-static int nr_fds = 0;
-
-int drmOpenOnce(void *unused, 
-		const char *BusID,
-		int *newlyopened)
-{
-    int i;
-    int fd;
-   
-    for (i = 0; i < nr_fds; i++)
-	if (strcmp(BusID, connection[i].BusID) == 0) {
-	    connection[i].refcount++;
-	    *newlyopened = 0;
-	    return connection[i].fd;
-	}
-
-    fd = drmOpen(unused, BusID);
-    if (fd <= 0 || nr_fds == DRM_MAX_FDS)
-	return fd;
-   
-    connection[nr_fds].BusID = strdup(BusID);
-    connection[nr_fds].fd = fd;
-    connection[nr_fds].refcount = 1;
-    *newlyopened = 1;
-
-    if (0)
-	fprintf(stderr, "saved connection %d for %s %d\n", 
-		nr_fds, connection[nr_fds].BusID, 
-		strcmp(BusID, connection[nr_fds].BusID));
-
-    nr_fds++;
-
-    return fd;
-}
-
-void drmCloseOnce(int fd)
-{
-    int i;
-
-    for (i = 0; i < nr_fds; i++) {
-	if (fd == connection[i].fd) {
-	    if (--connection[i].refcount == 0) {
-		drmClose(connection[i].fd);
-		free(connection[i].BusID);
-	    
-		if (i < --nr_fds) 
-		    connection[i] = connection[nr_fds];
-
-		return;
-	    }
-	}
-    }
-}
-
-int drmSetMaster(int fd)
-{
-	int ret;
-
-	fprintf(stderr,"Setting master \n");
-	ret = ioctl(fd, DRM_IOCTL_SET_MASTER, 0);
-	return ret;
-}
-
-int drmDropMaster(int fd)
-{
-	int ret;
-	fprintf(stderr,"Dropping master \n");
-	ret = ioctl(fd, DRM_IOCTL_DROP_MASTER, 0);
-	return ret;
-}
diff --git a/libdrm/xf86drm.h b/libdrm/xf86drm.h
deleted file mode 100644
index 2cb9c9e9..00000000
--- a/libdrm/xf86drm.h
+++ /dev/null
@@ -1,689 +0,0 @@
-/**
- * \file xf86drm.h 
- * OS-independent header for DRM user-level library interface.
- *
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- */
- 
-/*
- * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- */
-
-#ifndef _XF86DRM_H_
-#define _XF86DRM_H_
-
-#include <stdarg.h>
-#include <sys/types.h>
-#include <stdint.h>
-#include <drm.h>
-
-				/* Defaults, if nothing set in xf86config */
-#define DRM_DEV_UID	 0
-#define DRM_DEV_GID	 0
-/* Default /dev/dri directory permissions 0755 */
-#define DRM_DEV_DIRMODE	 	\
-	(S_IRUSR|S_IWUSR|S_IXUSR|S_IRGRP|S_IXGRP|S_IROTH|S_IXOTH)
-#define DRM_DEV_MODE	 (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP)
-
-#define DRM_DIR_NAME  "/dev/dri"
-#define DRM_DEV_NAME  "%s/card%d"
-#define DRM_CONTROL_DEV_NAME  "%s/controlD%d"
-#define DRM_PROC_NAME "/proc/dri/" /* For backward Linux compatibility */
-
-#define DRM_ERR_NO_DEVICE  (-1001)
-#define DRM_ERR_NO_ACCESS  (-1002)
-#define DRM_ERR_NOT_ROOT   (-1003)
-#define DRM_ERR_INVALID    (-1004)
-#define DRM_ERR_NO_FD      (-1005)
-
-#define DRM_AGP_NO_HANDLE 0
-
-typedef unsigned int  drmSize,     *drmSizePtr;	    /**< For mapped regions */
-typedef void          *drmAddress, **drmAddressPtr; /**< For mapped regions */
-
-typedef struct _drmServerInfo {
-  int (*debug_print)(const char *format, va_list ap);
-  int (*load_module)(const char *name);
-  void (*get_perms)(gid_t *, mode_t *);
-} drmServerInfo, *drmServerInfoPtr;
-
-typedef struct drmHashEntry {
-    int      fd;
-    void     (*f)(int, void *, void *);
-    void     *tagTable;
-} drmHashEntry;
-
-extern int drmIoctl(int fd, unsigned long request, void *arg);
-extern void *drmGetHashTable(void);
-extern drmHashEntry *drmGetEntry(int fd);
-
-/**
- * Driver version information.
- *
- * \sa drmGetVersion() and drmSetVersion().
- */
-typedef struct _drmVersion {
-    int     version_major;        /**< Major version */
-    int     version_minor;        /**< Minor version */
-    int     version_patchlevel;   /**< Patch level */
-    int     name_len; 	          /**< Length of name buffer */
-    char    *name;	          /**< Name of driver */
-    int     date_len;             /**< Length of date buffer */
-    char    *date;                /**< User-space buffer to hold date */
-    int     desc_len;	          /**< Length of desc buffer */
-    char    *desc;                /**< User-space buffer to hold desc */
-} drmVersion, *drmVersionPtr;
-
-typedef struct _drmStats {
-    unsigned long count;	     /**< Number of data */
-    struct {
-	unsigned long value;	     /**< Value from kernel */
-	const char    *long_format;  /**< Suggested format for long_name */
-	const char    *long_name;    /**< Long name for value */
-	const char    *rate_format;  /**< Suggested format for rate_name */
-	const char    *rate_name;    /**< Short name for value per second */
-	int           isvalue;       /**< True if value (vs. counter) */
-	const char    *mult_names;   /**< Multiplier names (e.g., "KGM") */
-	int           mult;          /**< Multiplier value (e.g., 1024) */
-	int           verbose;       /**< Suggest only in verbose output */
-    } data[15];
-} drmStatsT;
-
-
-				/* All of these enums *MUST* match with the
-                                   kernel implementation -- so do *NOT*
-                                   change them!  (The drmlib implementation
-                                   will just copy the flags instead of
-                                   translating them.) */
-typedef enum {
-    DRM_FRAME_BUFFER    = 0,      /**< WC, no caching, no core dump */
-    DRM_REGISTERS       = 1,      /**< no caching, no core dump */
-    DRM_SHM             = 2,      /**< shared, cached */
-    DRM_AGP             = 3,	  /**< AGP/GART */
-    DRM_SCATTER_GATHER  = 4,	  /**< PCI scatter/gather */
-    DRM_CONSISTENT      = 5	  /**< PCI consistent */
-} drmMapType;
-
-typedef enum {
-    DRM_RESTRICTED      = 0x0001, /**< Cannot be mapped to client-virtual */
-    DRM_READ_ONLY       = 0x0002, /**< Read-only in client-virtual */
-    DRM_LOCKED          = 0x0004, /**< Physical pages locked */
-    DRM_KERNEL          = 0x0008, /**< Kernel requires access */
-    DRM_WRITE_COMBINING = 0x0010, /**< Use write-combining, if available */
-    DRM_CONTAINS_LOCK   = 0x0020, /**< SHM page that contains lock */
-    DRM_REMOVABLE	= 0x0040  /**< Removable mapping */
-} drmMapFlags;
-
-/**
- * \warning These values *MUST* match drm.h
- */
-typedef enum {
-    /** \name Flags for DMA buffer dispatch */
-    /*@{*/
-    DRM_DMA_BLOCK        = 0x01, /**< 
-				  * Block until buffer dispatched.
-				  * 
-				  * \note the buffer may not yet have been
-				  * processed by the hardware -- getting a
-				  * hardware lock with the hardware quiescent
-				  * will ensure that the buffer has been
-				  * processed.
-				  */
-    DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */
-    DRM_DMA_PRIORITY     = 0x04, /**< High priority dispatch */
-    /*@}*/
-
-    /** \name Flags for DMA buffer request */
-    /*@{*/
-    DRM_DMA_WAIT         = 0x10, /**< Wait for free buffers */
-    DRM_DMA_SMALLER_OK   = 0x20, /**< Smaller-than-requested buffers OK */
-    DRM_DMA_LARGER_OK    = 0x40  /**< Larger-than-requested buffers OK */
-    /*@}*/
-} drmDMAFlags;
-
-typedef enum {
-    DRM_PAGE_ALIGN       = 0x01,
-    DRM_AGP_BUFFER       = 0x02,
-    DRM_SG_BUFFER        = 0x04,
-    DRM_FB_BUFFER        = 0x08,
-    DRM_PCI_BUFFER_RO    = 0x10
-} drmBufDescFlags;
-
-typedef enum {
-    DRM_LOCK_READY      = 0x01, /**< Wait until hardware is ready for DMA */
-    DRM_LOCK_QUIESCENT  = 0x02, /**< Wait until hardware quiescent */
-    DRM_LOCK_FLUSH      = 0x04, /**< Flush this context's DMA queue first */
-    DRM_LOCK_FLUSH_ALL  = 0x08, /**< Flush all DMA queues first */
-				/* These *HALT* flags aren't supported yet
-                                   -- they will be used to support the
-                                   full-screen DGA-like mode. */
-    DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */
-    DRM_HALT_CUR_QUEUES = 0x20  /**< Halt all current queues */
-} drmLockFlags;
-
-typedef enum {
-    DRM_CONTEXT_PRESERVED = 0x01, /**< This context is preserved and
-				     never swapped. */
-    DRM_CONTEXT_2DONLY    = 0x02  /**< This context is for 2D rendering only. */
-} drm_context_tFlags, *drm_context_tFlagsPtr;
-
-typedef struct _drmBufDesc {
-    int              count;	  /**< Number of buffers of this size */
-    int              size;	  /**< Size in bytes */
-    int              low_mark;	  /**< Low water mark */
-    int              high_mark;	  /**< High water mark */
-} drmBufDesc, *drmBufDescPtr;
-
-typedef struct _drmBufInfo {
-    int              count;	  /**< Number of buffers described in list */
-    drmBufDescPtr    list;	  /**< List of buffer descriptions */
-} drmBufInfo, *drmBufInfoPtr;
-
-typedef struct _drmBuf {
-    int              idx;	  /**< Index into the master buffer list */
-    int              total;	  /**< Buffer size */
-    int              used;	  /**< Amount of buffer in use (for DMA) */
-    drmAddress       address;	  /**< Address */
-} drmBuf, *drmBufPtr;
-
-/**
- * Buffer mapping information.
- *
- * Used by drmMapBufs() and drmUnmapBufs() to store information about the
- * mapped buffers.
- */
-typedef struct _drmBufMap {
-    int              count;	  /**< Number of buffers mapped */
-    drmBufPtr        list;	  /**< Buffers */
-} drmBufMap, *drmBufMapPtr;
-
-typedef struct _drmLock {
-    volatile unsigned int lock;
-    char                      padding[60];
-    /* This is big enough for most current (and future?) architectures:
-       DEC Alpha:              32 bytes
-       Intel Merced:           ?
-       Intel P5/PPro/PII/PIII: 32 bytes
-       Intel StrongARM:        32 bytes
-       Intel i386/i486:        16 bytes
-       MIPS:                   32 bytes (?)
-       Motorola 68k:           16 bytes
-       Motorola PowerPC:       32 bytes
-       Sun SPARC:              32 bytes
-    */
-} drmLock, *drmLockPtr;
-
-/**
- * Indices here refer to the offset into
- * list in drmBufInfo
- */
-typedef struct _drmDMAReq {
-    drm_context_t    context;  	  /**< Context handle */
-    int           send_count;     /**< Number of buffers to send */
-    int           *send_list;     /**< List of handles to buffers */
-    int           *send_sizes;    /**< Lengths of data to send, in bytes */
-    drmDMAFlags   flags;          /**< Flags */
-    int           request_count;  /**< Number of buffers requested */
-    int           request_size;	  /**< Desired size of buffers requested */
-    int           *request_list;  /**< Buffer information */
-    int           *request_sizes; /**< Minimum acceptable sizes */
-    int           granted_count;  /**< Number of buffers granted at this size */
-} drmDMAReq, *drmDMAReqPtr;
-
-typedef struct _drmRegion {
-    drm_handle_t     handle;
-    unsigned int  offset;
-    drmSize       size;
-    drmAddress    map;
-} drmRegion, *drmRegionPtr;
-
-typedef struct _drmTextureRegion {
-    unsigned char next;
-    unsigned char prev;
-    unsigned char in_use;
-    unsigned char padding;	/**< Explicitly pad this out */
-    unsigned int  age;
-} drmTextureRegion, *drmTextureRegionPtr;
-
-
-typedef enum {
-    DRM_VBLANK_ABSOLUTE = 0x0,	/**< Wait for specific vblank sequence number */
-    DRM_VBLANK_RELATIVE = 0x1,	/**< Wait for given number of vblanks */
-    DRM_VBLANK_EVENT = 0x4000000,	/**< Send event instead of blocking */
-    DRM_VBLANK_FLIP = 0x8000000,	/**< Scheduled buffer swap should flip */
-    DRM_VBLANK_NEXTONMISS = 0x10000000,	/**< If missed, wait for next vblank */
-    DRM_VBLANK_SECONDARY = 0x20000000,	/**< Secondary display controller */
-    DRM_VBLANK_SIGNAL   = 0x40000000	/* Send signal instead of blocking */
-} drmVBlankSeqType;
-
-typedef struct _drmVBlankReq {
-	drmVBlankSeqType type;
-	unsigned int sequence;
-	unsigned long signal;
-} drmVBlankReq, *drmVBlankReqPtr;
-
-typedef struct _drmVBlankReply {
-	drmVBlankSeqType type;
-	unsigned int sequence;
-	long tval_sec;
-	long tval_usec;
-} drmVBlankReply, *drmVBlankReplyPtr;
-
-typedef union _drmVBlank {
-	drmVBlankReq request;
-	drmVBlankReply reply;
-} drmVBlank, *drmVBlankPtr;
-
-typedef struct _drmSetVersion {
-	int drm_di_major;
-	int drm_di_minor;
-	int drm_dd_major;
-	int drm_dd_minor;
-} drmSetVersion, *drmSetVersionPtr;
-
-#define __drm_dummy_lock(lock) (*(__volatile__ unsigned int *)lock)
-
-#define DRM_LOCK_HELD  0x80000000U /**< Hardware lock is held */
-#define DRM_LOCK_CONT  0x40000000U /**< Hardware lock is contended */
-
-#if defined(__GNUC__) && (__GNUC__ >= 2)
-# if defined(__i386) || defined(__AMD64__) || defined(__x86_64__) || defined(__amd64__)
-				/* Reflect changes here to drmP.h */
-#define DRM_CAS(lock,old,new,__ret)                                    \
-	do {                                                           \
-                int __dummy;	/* Can't mark eax as clobbered */      \
-		__asm__ __volatile__(                                  \
-			"lock ; cmpxchg %4,%1\n\t"                     \
-                        "setnz %0"                                     \
-			: "=d" (__ret),                                \
-   			  "=m" (__drm_dummy_lock(lock)),               \
-                          "=a" (__dummy)                               \
-			: "2" (old),                                   \
-			  "r" (new));                                  \
-	} while (0)
-
-#elif defined(__alpha__)
-
-#define	DRM_CAS(lock, old, new, ret)		\
-	do {					\
-		int tmp, old32;			\
-		__asm__ __volatile__(		\
-		"	addl	$31, %5, %3\n"	\
-		"1:	ldl_l	%0, %2\n"	\
-		"	cmpeq	%0, %3, %1\n"	\
-		"	beq	%1, 2f\n"	\
-		"	mov	%4, %0\n"	\
-		"	stl_c	%0, %2\n"	\
-		"	beq	%0, 3f\n"	\
-		"	mb\n"			\
-		"2:	cmpeq	%1, 0, %1\n"	\
-		".subsection 2\n"		\
-		"3:	br	1b\n"		\
-		".previous"			\
-		: "=&r"(tmp), "=&r"(ret),	\
-		  "=m"(__drm_dummy_lock(lock)),	\
-		  "=&r"(old32)			\
-		: "r"(new), "r"(old)		\
-		: "memory");			\
-	} while (0)
-
-#elif defined(__sparc__)
-
-#define DRM_CAS(lock,old,new,__ret)				\
-do {	register unsigned int __old __asm("o0");		\
-	register unsigned int __new __asm("o1");		\
-	register volatile unsigned int *__lock __asm("o2");	\
-	__old = old;						\
-	__new = new;						\
-	__lock = (volatile unsigned int *)lock;			\
-	__asm__ __volatile__(					\
-		/*"cas [%2], %3, %0"*/				\
-		".word 0xd3e29008\n\t"				\
-		/*"membar #StoreStore | #StoreLoad"*/		\
-		".word 0x8143e00a"				\
-		: "=&r" (__new)					\
-		: "0" (__new),					\
-		  "r" (__lock),					\
-		  "r" (__old)					\
-		: "memory");					\
-	__ret = (__new != __old);				\
-} while(0)
-
-#elif defined(__ia64__)
-
-#ifdef __INTEL_COMPILER
-/* this currently generates bad code (missing stop bits)... */
-#include <ia64intrin.h>
-
-#define DRM_CAS(lock,old,new,__ret)					      \
-	do {								      \
-		unsigned long __result, __old = (old) & 0xffffffff;		\
-		__mf();							      	\
-		__result = _InterlockedCompareExchange_acq(&__drm_dummy_lock(lock), (new), __old);\
-		__ret = (__result) != (__old);					\
-/*		__ret = (__sync_val_compare_and_swap(&__drm_dummy_lock(lock), \
-						     (old), (new))	      \
-			 != (old));					      */\
-	} while (0)
-
-#else
-#define DRM_CAS(lock,old,new,__ret)					  \
-	do {								  \
-		unsigned int __result, __old = (old);			  \
-		__asm__ __volatile__(					  \
-			"mf\n"						  \
-			"mov ar.ccv=%2\n"				  \
-			";;\n"						  \
-			"cmpxchg4.acq %0=%1,%3,ar.ccv"			  \
-			: "=r" (__result), "=m" (__drm_dummy_lock(lock))  \
-			: "r" ((unsigned long)__old), "r" (new)			  \
-			: "memory");					  \
-		__ret = (__result) != (__old);				  \
-	} while (0)
-
-#endif
-
-#elif defined(__powerpc__)
-
-#define DRM_CAS(lock,old,new,__ret)			\
-	do {						\
-		__asm__ __volatile__(			\
-			"sync;"				\
-			"0:    lwarx %0,0,%1;"		\
-			"      xor. %0,%3,%0;"		\
-			"      bne 1f;"			\
-			"      stwcx. %2,0,%1;"		\
-			"      bne- 0b;"		\
-			"1:    "			\
-			"sync;"				\
-		: "=&r"(__ret)				\
-		: "r"(lock), "r"(new), "r"(old)		\
-		: "cr0", "memory");			\
-	} while (0)
-
-#endif /* architecture */
-#endif /* __GNUC__ >= 2 */
-
-#ifndef DRM_CAS
-#define DRM_CAS(lock,old,new,ret) do { ret=1; } while (0) /* FAST LOCK FAILS */
-#endif
-
-#if defined(__alpha__)
-#define DRM_CAS_RESULT(_result)		long _result
-#elif defined(__powerpc__)
-#define DRM_CAS_RESULT(_result)		int _result
-#else
-#define DRM_CAS_RESULT(_result)		char _result
-#endif
-
-#define DRM_LIGHT_LOCK(fd,lock,context)                                \
-	do {                                                           \
-                DRM_CAS_RESULT(__ret);                                 \
-		DRM_CAS(lock,context,DRM_LOCK_HELD|context,__ret);     \
-                if (__ret) drmGetLock(fd,context,0);                   \
-        } while(0)
-
-				/* This one counts fast locks -- for
-                                   benchmarking only. */
-#define DRM_LIGHT_LOCK_COUNT(fd,lock,context,count)                    \
-	do {                                                           \
-                DRM_CAS_RESULT(__ret);                                 \
-		DRM_CAS(lock,context,DRM_LOCK_HELD|context,__ret);     \
-                if (__ret) drmGetLock(fd,context,0);                   \
-                else       ++count;                                    \
-        } while(0)
-
-#define DRM_LOCK(fd,lock,context,flags)                                \
-	do {                                                           \
-		if (flags) drmGetLock(fd,context,flags);               \
-		else       DRM_LIGHT_LOCK(fd,lock,context);            \
-	} while(0)
-
-#define DRM_UNLOCK(fd,lock,context)                                    \
-	do {                                                           \
-                DRM_CAS_RESULT(__ret);                                 \
-		DRM_CAS(lock,DRM_LOCK_HELD|context,context,__ret);     \
-                if (__ret) drmUnlock(fd,context);                      \
-        } while(0)
-
-				/* Simple spin locks */
-#define DRM_SPINLOCK(spin,val)                                         \
-	do {                                                           \
-            DRM_CAS_RESULT(__ret);                                     \
-	    do {                                                       \
-		DRM_CAS(spin,0,val,__ret);                             \
-		if (__ret) while ((spin)->lock);                       \
-	    } while (__ret);                                           \
-	} while(0)
-
-#define DRM_SPINLOCK_TAKE(spin,val)                                    \
-	do {                                                           \
-            DRM_CAS_RESULT(__ret);                                     \
-            int  cur;                                                  \
-	    do {                                                       \
-                cur = (*spin).lock;                                    \
-		DRM_CAS(spin,cur,val,__ret);                           \
-	    } while (__ret);                                           \
-	} while(0)
-
-#define DRM_SPINLOCK_COUNT(spin,val,count,__ret)                       \
-	do {                                                           \
-            int  __i;                                                  \
-            __ret = 1;                                                 \
-            for (__i = 0; __ret && __i < count; __i++) {               \
-		DRM_CAS(spin,0,val,__ret);                             \
-		if (__ret) for (;__i < count && (spin)->lock; __i++);  \
-	    }                                                          \
-	} while(0)
-
-#define DRM_SPINUNLOCK(spin,val)                                       \
-	do {                                                           \
-            DRM_CAS_RESULT(__ret);                                     \
-            if ((*spin).lock == val) { /* else server stole lock */    \
-	        do {                                                   \
-		    DRM_CAS(spin,val,0,__ret);                         \
-	        } while (__ret);                                       \
-            }                                                          \
-	} while(0)
-
-
-
-/* General user-level programmer's API: unprivileged */
-extern int           drmAvailable(void);
-extern int           drmOpen(const char *name, const char *busid);
-extern int drmOpenControl(int minor);
-extern int           drmClose(int fd);
-extern drmVersionPtr drmGetVersion(int fd);
-extern drmVersionPtr drmGetLibVersion(int fd);
-extern void          drmFreeVersion(drmVersionPtr);
-extern int           drmGetMagic(int fd, drm_magic_t * magic);
-extern char          *drmGetBusid(int fd);
-extern int           drmGetInterruptFromBusID(int fd, int busnum, int devnum,
-					      int funcnum);
-extern int           drmGetMap(int fd, int idx, drm_handle_t *offset,
-			       drmSize *size, drmMapType *type,
-			       drmMapFlags *flags, drm_handle_t *handle,
-			       int *mtrr);
-extern int           drmGetClient(int fd, int idx, int *auth, int *pid,
-				  int *uid, unsigned long *magic,
-				  unsigned long *iocs);
-extern int           drmGetStats(int fd, drmStatsT *stats);
-extern int           drmSetInterfaceVersion(int fd, drmSetVersion *version);
-extern int           drmCommandNone(int fd, unsigned long drmCommandIndex);
-extern int           drmCommandRead(int fd, unsigned long drmCommandIndex,
-                                    void *data, unsigned long size);
-extern int           drmCommandWrite(int fd, unsigned long drmCommandIndex,
-                                     void *data, unsigned long size);
-extern int           drmCommandWriteRead(int fd, unsigned long drmCommandIndex,
-                                         void *data, unsigned long size);
-
-/* General user-level programmer's API: X server (root) only  */
-extern void          drmFreeBusid(const char *busid);
-extern int           drmSetBusid(int fd, const char *busid);
-extern int           drmAuthMagic(int fd, drm_magic_t magic);
-extern int           drmAddMap(int fd,
-			       drm_handle_t offset,
-			       drmSize size,
-			       drmMapType type,
-			       drmMapFlags flags,
-			       drm_handle_t * handle);
-extern int	     drmRmMap(int fd, drm_handle_t handle);
-extern int	     drmAddContextPrivateMapping(int fd, drm_context_t ctx_id,
-						 drm_handle_t handle);
-
-extern int           drmAddBufs(int fd, int count, int size,
-				drmBufDescFlags flags,
-				int agp_offset);
-extern int           drmMarkBufs(int fd, double low, double high);
-extern int           drmCreateContext(int fd, drm_context_t * handle);
-extern int           drmSetContextFlags(int fd, drm_context_t context,
-					drm_context_tFlags flags);
-extern int           drmGetContextFlags(int fd, drm_context_t context,
-					drm_context_tFlagsPtr flags);
-extern int           drmAddContextTag(int fd, drm_context_t context, void *tag);
-extern int           drmDelContextTag(int fd, drm_context_t context);
-extern void          *drmGetContextTag(int fd, drm_context_t context);
-extern drm_context_t * drmGetReservedContextList(int fd, int *count);
-extern void          drmFreeReservedContextList(drm_context_t *);
-extern int           drmSwitchToContext(int fd, drm_context_t context);
-extern int           drmDestroyContext(int fd, drm_context_t handle);
-extern int           drmCreateDrawable(int fd, drm_drawable_t * handle);
-extern int           drmDestroyDrawable(int fd, drm_drawable_t handle);
-extern int           drmUpdateDrawableInfo(int fd, drm_drawable_t handle,
-					   drm_drawable_info_type_t type,
-					   unsigned int num, void *data);
-extern int           drmCtlInstHandler(int fd, int irq);
-extern int           drmCtlUninstHandler(int fd);
-
-/* General user-level programmer's API: authenticated client and/or X */
-extern int           drmMap(int fd,
-			    drm_handle_t handle,
-			    drmSize size,
-			    drmAddressPtr address);
-extern int           drmUnmap(drmAddress address, drmSize size);
-extern drmBufInfoPtr drmGetBufInfo(int fd);
-extern drmBufMapPtr  drmMapBufs(int fd);
-extern int           drmUnmapBufs(drmBufMapPtr bufs);
-extern int           drmDMA(int fd, drmDMAReqPtr request);
-extern int           drmFreeBufs(int fd, int count, int *list);
-extern int           drmGetLock(int fd,
-			        drm_context_t context,
-			        drmLockFlags flags);
-extern int           drmUnlock(int fd, drm_context_t context);
-extern int           drmFinish(int fd, int context, drmLockFlags flags);
-extern int	     drmGetContextPrivateMapping(int fd, drm_context_t ctx_id, 
-						 drm_handle_t * handle);
-
-/* AGP/GART support: X server (root) only */
-extern int           drmAgpAcquire(int fd);
-extern int           drmAgpRelease(int fd);
-extern int           drmAgpEnable(int fd, unsigned long mode);
-extern int           drmAgpAlloc(int fd, unsigned long size,
-				 unsigned long type, unsigned long *address,
-				 drm_handle_t *handle);
-extern int           drmAgpFree(int fd, drm_handle_t handle);
-extern int 	     drmAgpBind(int fd, drm_handle_t handle,
-				unsigned long offset);
-extern int           drmAgpUnbind(int fd, drm_handle_t handle);
-
-/* AGP/GART info: authenticated client and/or X */
-extern int           drmAgpVersionMajor(int fd);
-extern int           drmAgpVersionMinor(int fd);
-extern unsigned long drmAgpGetMode(int fd);
-extern unsigned long drmAgpBase(int fd); /* Physical location */
-extern unsigned long drmAgpSize(int fd); /* Bytes */
-extern unsigned long drmAgpMemoryUsed(int fd);
-extern unsigned long drmAgpMemoryAvail(int fd);
-extern unsigned int  drmAgpVendorId(int fd);
-extern unsigned int  drmAgpDeviceId(int fd);
-
-/* PCI scatter/gather support: X server (root) only */
-extern int           drmScatterGatherAlloc(int fd, unsigned long size,
-					   drm_handle_t *handle);
-extern int           drmScatterGatherFree(int fd, drm_handle_t handle);
-
-extern int           drmWaitVBlank(int fd, drmVBlankPtr vbl);
-
-/* Support routines */
-extern void          drmSetServerInfo(drmServerInfoPtr info);
-extern int           drmError(int err, const char *label);
-extern void          *drmMalloc(int size);
-extern void          drmFree(void *pt);
-
-/* Hash table routines */
-extern void *drmHashCreate(void);
-extern int  drmHashDestroy(void *t);
-extern int  drmHashLookup(void *t, unsigned long key, void **value);
-extern int  drmHashInsert(void *t, unsigned long key, void *value);
-extern int  drmHashDelete(void *t, unsigned long key);
-extern int  drmHashFirst(void *t, unsigned long *key, void **value);
-extern int  drmHashNext(void *t, unsigned long *key, void **value);
-
-/* PRNG routines */
-extern void          *drmRandomCreate(unsigned long seed);
-extern int           drmRandomDestroy(void *state);
-extern unsigned long drmRandom(void *state);
-extern double        drmRandomDouble(void *state);
-
-/* Skip list routines */
-
-extern void *drmSLCreate(void);
-extern int  drmSLDestroy(void *l);
-extern int  drmSLLookup(void *l, unsigned long key, void **value);
-extern int  drmSLInsert(void *l, unsigned long key, void *value);
-extern int  drmSLDelete(void *l, unsigned long key);
-extern int  drmSLNext(void *l, unsigned long *key, void **value);
-extern int  drmSLFirst(void *l, unsigned long *key, void **value);
-extern void drmSLDump(void *l);
-extern int  drmSLLookupNeighbors(void *l, unsigned long key,
-				 unsigned long *prev_key, void **prev_value,
-				 unsigned long *next_key, void **next_value);
-
-extern int drmOpenOnce(void *unused, const char *BusID, int *newlyopened);
-extern void drmCloseOnce(int fd);
-extern void drmMsg(const char *format, ...);
-
-extern int drmSetMaster(int fd);
-extern int drmDropMaster(int fd);
-
-#define DRM_EVENT_CONTEXT_VERSION 1
-
-typedef struct _drmEventContext {
-
-	/* This struct is versioned so we can add more pointers if we
-	 * add more events. */
-	int version;
-
-	void (*vblank_handler)(int fd,
-			       unsigned int sequence, 
-			       unsigned int tv_sec,
-			       unsigned int tv_usec,
-			       void *user_data);
-
-} drmEventContext, *drmEventContextPtr;
-
-extern int drmHandleEvent(int fd, drmEventContextPtr evctx);
-
-#endif
diff --git a/libdrm/xf86drmHash.c b/libdrm/xf86drmHash.c
deleted file mode 100644
index 82cbc2a5..00000000
--- a/libdrm/xf86drmHash.c
+++ /dev/null
@@ -1,428 +0,0 @@
-/* xf86drmHash.c -- Small hash table support for integer -> integer mapping
- * Created: Sun Apr 18 09:35:45 1999 by faith@precisioninsight.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
- *
- * DESCRIPTION
- *
- * This file contains a straightforward implementation of a fixed-sized
- * hash table using self-organizing linked lists [Knuth73, pp. 398-399] for
- * collision resolution.  There are two potentially interesting things
- * about this implementation:
- *
- * 1) The table is power-of-two sized.  Prime sized tables are more
- * traditional, but do not have a significant advantage over power-of-two
- * sized table, especially when double hashing is not used for collision
- * resolution.
- *
- * 2) The hash computation uses a table of random integers [Hanson97,
- * pp. 39-41].
- *
- * FUTURE ENHANCEMENTS
- *
- * With a table size of 512, the current implementation is sufficient for a
- * few hundred keys.  Since this is well above the expected size of the
- * tables for which this implementation was designed, the implementation of
- * dynamic hash tables was postponed until the need arises.  A common (and
- * naive) approach to dynamic hash table implementation simply creates a
- * new hash table when necessary, rehashes all the data into the new table,
- * and destroys the old table.  The approach in [Larson88] is superior in
- * two ways: 1) only a portion of the table is expanded when needed,
- * distributing the expansion cost over several insertions, and 2) portions
- * of the table can be locked, enabling a scalable thread-safe
- * implementation.
- *
- * REFERENCES
- *
- * [Hanson97] David R. Hanson.  C Interfaces and Implementations:
- * Techniques for Creating Reusable Software.  Reading, Massachusetts:
- * Addison-Wesley, 1997.
- *
- * [Knuth73] Donald E. Knuth. The Art of Computer Programming.  Volume 3:
- * Sorting and Searching.  Reading, Massachusetts: Addison-Wesley, 1973.
- *
- * [Larson88] Per-Ake Larson. "Dynamic Hash Tables".  CACM 31(4), April
- * 1988, pp. 446-457.
- *
- */
-
-#include <stdio.h>
-#include <stdlib.h>
-
-#define HASH_MAIN 0
-
-#if !HASH_MAIN
-# include "xf86drm.h"
-#endif
-
-#define HASH_MAGIC 0xdeadbeef
-#define HASH_DEBUG 0
-#define HASH_SIZE  512		/* Good for about 100 entries */
-				/* If you change this value, you probably
-                                   have to change the HashHash hashing
-                                   function! */
-
-#if HASH_MAIN
-#define HASH_ALLOC malloc
-#define HASH_FREE  free
-#define HASH_RANDOM_DECL
-#define HASH_RANDOM_INIT(seed)  srandom(seed)
-#define HASH_RANDOM             random()
-#define HASH_RANDOM_DESTROY
-#else
-#define HASH_ALLOC drmMalloc
-#define HASH_FREE  drmFree
-#define HASH_RANDOM_DECL        void *state
-#define HASH_RANDOM_INIT(seed)  state = drmRandomCreate(seed)
-#define HASH_RANDOM             drmRandom(state)
-#define HASH_RANDOM_DESTROY     drmRandomDestroy(state)
-
-#endif
-
-typedef struct HashBucket {
-    unsigned long     key;
-    void              *value;
-    struct HashBucket *next;
-} HashBucket, *HashBucketPtr;
-
-typedef struct HashTable {
-    unsigned long    magic;
-    unsigned long    entries;
-    unsigned long    hits;	/* At top of linked list */
-    unsigned long    partials;	/* Not at top of linked list */
-    unsigned long    misses;	/* Not in table */
-    HashBucketPtr    buckets[HASH_SIZE];
-    int              p0;
-    HashBucketPtr    p1;
-} HashTable, *HashTablePtr;
-
-#if HASH_MAIN
-extern void *drmHashCreate(void);
-extern int  drmHashDestroy(void *t);
-extern int  drmHashLookup(void *t, unsigned long key, unsigned long *value);
-extern int  drmHashInsert(void *t, unsigned long key, unsigned long value);
-extern int  drmHashDelete(void *t, unsigned long key);
-#endif
-
-static unsigned long HashHash(unsigned long key)
-{
-    unsigned long        hash = 0;
-    unsigned long        tmp  = key;
-    static int           init = 0;
-    static unsigned long scatter[256];
-    int                  i;
-
-    if (!init) {
-	HASH_RANDOM_DECL;
-	HASH_RANDOM_INIT(37);
-	for (i = 0; i < 256; i++) scatter[i] = HASH_RANDOM;
-	HASH_RANDOM_DESTROY;
-	++init;
-    }
-
-    while (tmp) {
-	hash = (hash << 1) + scatter[tmp & 0xff];
-	tmp >>= 8;
-    }
-
-    hash %= HASH_SIZE;
-#if HASH_DEBUG
-    printf( "Hash(%d) = %d\n", key, hash);
-#endif
-    return hash;
-}
-
-void *drmHashCreate(void)
-{
-    HashTablePtr table;
-    int          i;
-
-    table           = HASH_ALLOC(sizeof(*table));
-    if (!table) return NULL;
-    table->magic    = HASH_MAGIC;
-    table->entries  = 0;
-    table->hits     = 0;
-    table->partials = 0;
-    table->misses   = 0;
-
-    for (i = 0; i < HASH_SIZE; i++) table->buckets[i] = NULL;
-    return table;
-}
-
-int drmHashDestroy(void *t)
-{
-    HashTablePtr  table = (HashTablePtr)t;
-    HashBucketPtr bucket;
-    HashBucketPtr next;
-    int           i;
-
-    if (table->magic != HASH_MAGIC) return -1; /* Bad magic */
-
-    for (i = 0; i < HASH_SIZE; i++) {
-	for (bucket = table->buckets[i]; bucket;) {
-	    next = bucket->next;
-	    HASH_FREE(bucket);
-	    bucket = next;
-	}
-    }
-    HASH_FREE(table);
-    return 0;
-}
-
-/* Find the bucket and organize the list so that this bucket is at the
-   top. */
-
-static HashBucketPtr HashFind(HashTablePtr table,
-			      unsigned long key, unsigned long *h)
-{
-    unsigned long hash = HashHash(key);
-    HashBucketPtr prev = NULL;
-    HashBucketPtr bucket;
-
-    if (h) *h = hash;
-
-    for (bucket = table->buckets[hash]; bucket; bucket = bucket->next) {
-	if (bucket->key == key) {
-	    if (prev) {
-				/* Organize */
-		prev->next           = bucket->next;
-		bucket->next         = table->buckets[hash];
-		table->buckets[hash] = bucket;
-		++table->partials;
-	    } else {
-		++table->hits;
-	    }
-	    return bucket;
-	}
-	prev = bucket;
-    }
-    ++table->misses;
-    return NULL;
-}
-
-int drmHashLookup(void *t, unsigned long key, void **value)
-{
-    HashTablePtr  table = (HashTablePtr)t;
-    HashBucketPtr bucket;
-
-    if (!table || table->magic != HASH_MAGIC) return -1; /* Bad magic */
-
-    bucket = HashFind(table, key, NULL);
-    if (!bucket) return 1;	/* Not found */
-    *value = bucket->value;
-    return 0;			/* Found */
-}
-
-int drmHashInsert(void *t, unsigned long key, void *value)
-{
-    HashTablePtr  table = (HashTablePtr)t;
-    HashBucketPtr bucket;
-    unsigned long hash;
-
-    if (table->magic != HASH_MAGIC) return -1; /* Bad magic */
-
-    if (HashFind(table, key, &hash)) return 1; /* Already in table */
-
-    bucket               = HASH_ALLOC(sizeof(*bucket));
-    if (!bucket) return -1;	/* Error */
-    bucket->key          = key;
-    bucket->value        = value;
-    bucket->next         = table->buckets[hash];
-    table->buckets[hash] = bucket;
-#if HASH_DEBUG
-    printf("Inserted %d at %d/%p\n", key, hash, bucket);
-#endif
-    return 0;			/* Added to table */
-}
-
-int drmHashDelete(void *t, unsigned long key)
-{
-    HashTablePtr  table = (HashTablePtr)t;
-    unsigned long hash;
-    HashBucketPtr bucket;
-
-    if (table->magic != HASH_MAGIC) return -1; /* Bad magic */
-
-    bucket = HashFind(table, key, &hash);
-
-    if (!bucket) return 1;	/* Not found */
-
-    table->buckets[hash] = bucket->next;
-    HASH_FREE(bucket);
-    return 0;
-}
-
-int drmHashNext(void *t, unsigned long *key, void **value)
-{
-    HashTablePtr  table = (HashTablePtr)t;
-
-    while (table->p0 < HASH_SIZE) {
-	if (table->p1) {
-	    *key       = table->p1->key;
-	    *value     = table->p1->value;
-	    table->p1  = table->p1->next;
-	    return 1;
-	}
-	table->p1 = table->buckets[table->p0];
-	++table->p0;
-    }
-    return 0;
-}
-
-int drmHashFirst(void *t, unsigned long *key, void **value)
-{
-    HashTablePtr  table = (HashTablePtr)t;
-
-    if (table->magic != HASH_MAGIC) return -1; /* Bad magic */
-
-    table->p0 = 0;
-    table->p1 = table->buckets[0];
-    return drmHashNext(table, key, value);
-}
-
-#if HASH_MAIN
-#define DIST_LIMIT 10
-static int dist[DIST_LIMIT];
-
-static void clear_dist(void) {
-    int i;
-
-    for (i = 0; i < DIST_LIMIT; i++) dist[i] = 0;
-}
-
-static int count_entries(HashBucketPtr bucket)
-{
-    int count = 0;
-
-    for (; bucket; bucket = bucket->next) ++count;
-    return count;
-}
-
-static void update_dist(int count)
-{
-    if (count >= DIST_LIMIT) ++dist[DIST_LIMIT-1];
-    else                     ++dist[count];
-}
-
-static void compute_dist(HashTablePtr table)
-{
-    int           i;
-    HashBucketPtr bucket;
-
-    printf("Entries = %ld, hits = %ld, partials = %ld, misses = %ld\n",
-	   table->entries, table->hits, table->partials, table->misses);
-    clear_dist();
-    for (i = 0; i < HASH_SIZE; i++) {
-	bucket = table->buckets[i];
-	update_dist(count_entries(bucket));
-    }
-    for (i = 0; i < DIST_LIMIT; i++) {
-	if (i != DIST_LIMIT-1) printf("%5d %10d\n", i, dist[i]);
-	else                   printf("other %10d\n", dist[i]);
-    }
-}
-
-static void check_table(HashTablePtr table,
-			unsigned long key, unsigned long value)
-{
-    unsigned long retval  = 0;
-    int           retcode = drmHashLookup(table, key, &retval);
-
-    switch (retcode) {
-    case -1:
-	printf("Bad magic = 0x%08lx:"
-	       " key = %lu, expected = %lu, returned = %lu\n",
-	       table->magic, key, value, retval);
-	break;
-    case 1:
-	printf("Not found: key = %lu, expected = %lu returned = %lu\n",
-	       key, value, retval);
-	break;
-    case 0:
-	if (value != retval)
-	    printf("Bad value: key = %lu, expected = %lu, returned = %lu\n",
-		   key, value, retval);
-	break;
-    default:
-	printf("Bad retcode = %d: key = %lu, expected = %lu, returned = %lu\n",
-	       retcode, key, value, retval);
-	break;
-    }
-}
-
-int main(void)
-{
-    HashTablePtr table;
-    int          i;
-
-    printf("\n***** 256 consecutive integers ****\n");
-    table = drmHashCreate();
-    for (i = 0; i < 256; i++) drmHashInsert(table, i, i);
-    for (i = 0; i < 256; i++) check_table(table, i, i);
-    for (i = 256; i >= 0; i--) check_table(table, i, i);
-    compute_dist(table);
-    drmHashDestroy(table);
-
-    printf("\n***** 1024 consecutive integers ****\n");
-    table = drmHashCreate();
-    for (i = 0; i < 1024; i++) drmHashInsert(table, i, i);
-    for (i = 0; i < 1024; i++) check_table(table, i, i);
-    for (i = 1024; i >= 0; i--) check_table(table, i, i);
-    compute_dist(table);
-    drmHashDestroy(table);
-
-    printf("\n***** 1024 consecutive page addresses (4k pages) ****\n");
-    table = drmHashCreate();
-    for (i = 0; i < 1024; i++) drmHashInsert(table, i*4096, i);
-    for (i = 0; i < 1024; i++) check_table(table, i*4096, i);
-    for (i = 1024; i >= 0; i--) check_table(table, i*4096, i);
-    compute_dist(table);
-    drmHashDestroy(table);
-
-    printf("\n***** 1024 random integers ****\n");
-    table = drmHashCreate();
-    srandom(0xbeefbeef);
-    for (i = 0; i < 1024; i++) drmHashInsert(table, random(), i);
-    srandom(0xbeefbeef);
-    for (i = 0; i < 1024; i++) check_table(table, random(), i);
-    srandom(0xbeefbeef);
-    for (i = 0; i < 1024; i++) check_table(table, random(), i);
-    compute_dist(table);
-    drmHashDestroy(table);
-
-    printf("\n***** 5000 random integers ****\n");
-    table = drmHashCreate();
-    srandom(0xbeefbeef);
-    for (i = 0; i < 5000; i++) drmHashInsert(table, random(), i);
-    srandom(0xbeefbeef);
-    for (i = 0; i < 5000; i++) check_table(table, random(), i);
-    srandom(0xbeefbeef);
-    for (i = 0; i < 5000; i++) check_table(table, random(), i);
-    compute_dist(table);
-    drmHashDestroy(table);
-
-    return 0;
-}
-#endif
diff --git a/libdrm/xf86drmMode.c b/libdrm/xf86drmMode.c
deleted file mode 100644
index 6d85113a..00000000
--- a/libdrm/xf86drmMode.c
+++ /dev/null
@@ -1,712 +0,0 @@
-/*
- * \file xf86drmMode.c
- * Header for DRM modesetting interface.
- *
- * \author Jakob Bornecrantz <wallbraker@gmail.com>
- *
- * \par Acknowledgements:
- * Feb 2007, Dave Airlie <airlied@linux.ie>
- */
-
-/*
- * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
- * Copyright (c) 2007-2008 Dave Airlie <airlied@linux.ie>
- * Copyright (c) 2007-2008 Jakob Bornecrantz <wallbraker@gmail.com>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- *
- */
-
-/*
- * TODO the types we are after are defined in diffrent headers on diffrent
- * platforms find which headers to include to get uint32_t
- */
-#include <stdint.h>
-#include <sys/ioctl.h>
-#include <stdio.h>
-
-#include "xf86drmMode.h"
-#include "xf86drm.h"
-#include <drm.h>
-#include <string.h>
-#include <dirent.h>
-#include <unistd.h>
-#include <errno.h>
-
-#define U642VOID(x) ((void *)(unsigned long)(x))
-#define VOID2U64(x) ((uint64_t)(unsigned long)(x))
-
-/*
- * Util functions
- */
-
-void* drmAllocCpy(void *array, int count, int entry_size)
-{
-	char *r;
-	int i;
-
-	if (!count || !array || !entry_size)
-		return 0;
-
-	if (!(r = drmMalloc(count*entry_size)))
-		return 0;
-
-	for (i = 0; i < count; i++)
-		memcpy(r+(entry_size*i), array+(entry_size*i), entry_size);
-
-	return r;
-}
-
-/*
- * A couple of free functions.
- */
-
-void drmModeFreeModeInfo(drmModeModeInfoPtr ptr)
-{
-	if (!ptr)
-		return;
-
-	drmFree(ptr);
-}
-
-void drmModeFreeResources(drmModeResPtr ptr)
-{
-	if (!ptr)
-		return;
-
-	drmFree(ptr);
-
-}
-
-void drmModeFreeFB(drmModeFBPtr ptr)
-{
-	if (!ptr)
-		return;
-
-	/* we might add more frees later. */
-	drmFree(ptr);
-}
-
-void drmModeFreeCrtc(drmModeCrtcPtr ptr)
-{
-	if (!ptr)
-		return;
-
-	drmFree(ptr);
-
-}
-
-void drmModeFreeConnector(drmModeConnectorPtr ptr)
-{
-	if (!ptr)
-		return;
-
-	drmFree(ptr->encoders);
-	drmFree(ptr->prop_values);
-	drmFree(ptr->props);
-	drmFree(ptr->modes);
-	drmFree(ptr);
-
-}
-
-void drmModeFreeEncoder(drmModeEncoderPtr ptr)
-{
-	drmFree(ptr);
-}
-
-/*
- * ModeSetting functions.
- */
-
-drmModeResPtr drmModeGetResources(int fd)
-{
-	struct drm_mode_card_res res;
-	drmModeResPtr r = 0;
-
-	memset(&res, 0, sizeof(struct drm_mode_card_res));
-
-	if (drmIoctl(fd, DRM_IOCTL_MODE_GETRESOURCES, &res))
-		return 0;
-
-	if (res.count_fbs)
-		res.fb_id_ptr = VOID2U64(drmMalloc(res.count_fbs*sizeof(uint32_t)));
-	if (res.count_crtcs)
-		res.crtc_id_ptr = VOID2U64(drmMalloc(res.count_crtcs*sizeof(uint32_t)));
-	if (res.count_connectors)
-		res.connector_id_ptr = VOID2U64(drmMalloc(res.count_connectors*sizeof(uint32_t)));
-	if (res.count_encoders)
-		res.encoder_id_ptr = VOID2U64(drmMalloc(res.count_encoders*sizeof(uint32_t)));
-
-	if (drmIoctl(fd, DRM_IOCTL_MODE_GETRESOURCES, &res)) {
-		r = NULL;
-		goto err_allocs;
-	}
-
-	/*
-	 * return
-	 */
-
-
-	if (!(r = drmMalloc(sizeof(*r))))
-		return 0;
-
-	r->min_width     = res.min_width;
-	r->max_width     = res.max_width;
-	r->min_height    = res.min_height;
-	r->max_height    = res.max_height;
-	r->count_fbs     = res.count_fbs;
-	r->count_crtcs   = res.count_crtcs;
-	r->count_connectors = res.count_connectors;
-	r->count_encoders = res.count_encoders;
-	/* TODO we realy should test if these allocs fails. */
-	r->fbs           = drmAllocCpy(U642VOID(res.fb_id_ptr), res.count_fbs, sizeof(uint32_t));
-	r->crtcs         = drmAllocCpy(U642VOID(res.crtc_id_ptr), res.count_crtcs, sizeof(uint32_t));
-	r->connectors       = drmAllocCpy(U642VOID(res.connector_id_ptr), res.count_connectors, sizeof(uint32_t));
-	r->encoders      = drmAllocCpy(U642VOID(res.encoder_id_ptr), res.count_encoders, sizeof(uint32_t));
-
-err_allocs:
-	drmFree(U642VOID(res.fb_id_ptr));
-	drmFree(U642VOID(res.crtc_id_ptr));
-	drmFree(U642VOID(res.connector_id_ptr));
-	drmFree(U642VOID(res.encoder_id_ptr));
-
-	return r;
-}
-
-int drmModeAddFB(int fd, uint32_t width, uint32_t height, uint8_t depth,
-                 uint8_t bpp, uint32_t pitch, uint32_t bo_handle,
-		 uint32_t *buf_id)
-{
-	struct drm_mode_fb_cmd f;
-	int ret;
-
-	f.width  = width;
-	f.height = height;
-	f.pitch  = pitch;
-	f.bpp    = bpp;
-	f.depth  = depth;
-	f.handle = bo_handle;
-
-	if ((ret = drmIoctl(fd, DRM_IOCTL_MODE_ADDFB, &f)))
-		return ret;
-
-	*buf_id = f.fb_id;
-	return 0;
-}
-
-int drmModeRmFB(int fd, uint32_t bufferId)
-{
-	return drmIoctl(fd, DRM_IOCTL_MODE_RMFB, &bufferId);
-
-
-}
-
-drmModeFBPtr drmModeGetFB(int fd, uint32_t buf)
-{
-	struct drm_mode_fb_cmd info;
-	drmModeFBPtr r;
-
-	info.fb_id = buf;
-
-	if (drmIoctl(fd, DRM_IOCTL_MODE_GETFB, &info))
-		return NULL;
-
-	if (!(r = drmMalloc(sizeof(*r))))
-		return NULL;
-
-	r->fb_id = info.fb_id;
-	r->width = info.width;
-	r->height = info.height;
-	r->pitch = info.pitch;
-	r->bpp = info.bpp;
-	r->handle = info.handle;
-	r->depth = info.depth;
-
-	return r;
-}
-
-
-/*
- * Crtc functions
- */
-
-drmModeCrtcPtr drmModeGetCrtc(int fd, uint32_t crtcId)
-{
-	struct drm_mode_crtc crtc;
-	drmModeCrtcPtr r;
-
-	crtc.crtc_id = crtcId;
-
-	if (drmIoctl(fd, DRM_IOCTL_MODE_GETCRTC, &crtc))
-		return 0;
-
-	/*
-	 * return
-	 */
-
-	if (!(r = drmMalloc(sizeof(*r))))
-		return 0;
-
-	r->crtc_id         = crtc.crtc_id;
-	r->x               = crtc.x;
-	r->y               = crtc.y;
-	r->mode_valid      = crtc.mode_valid;
-	if (r->mode_valid)
-		memcpy(&r->mode, &crtc.mode, sizeof(struct drm_mode_modeinfo));
-	r->buffer_id       = crtc.fb_id;
-	r->gamma_size      = crtc.gamma_size;
-	return r;
-}
-
-
-int drmModeSetCrtc(int fd, uint32_t crtcId, uint32_t bufferId,
-                   uint32_t x, uint32_t y, uint32_t *connectors, int count,
-		   drmModeModeInfoPtr mode)
-{
-	struct drm_mode_crtc crtc;
-
-	crtc.x             = x;
-	crtc.y             = y;
-	crtc.crtc_id       = crtcId;
-	crtc.fb_id         = bufferId;
-	crtc.set_connectors_ptr = VOID2U64(connectors);
-	crtc.count_connectors = count;
-	if (mode) {
-	  memcpy(&crtc.mode, mode, sizeof(struct drm_mode_modeinfo));
-	  crtc.mode_valid = 1;
-	} else
-	  crtc.mode_valid = 0;
-
-	return drmIoctl(fd, DRM_IOCTL_MODE_SETCRTC, &crtc);
-}
-
-/*
- * Cursor manipulation
- */
-
-int drmModeSetCursor(int fd, uint32_t crtcId, uint32_t bo_handle, uint32_t width, uint32_t height)
-{
-	struct drm_mode_cursor arg;
-
-	arg.flags = DRM_MODE_CURSOR_BO;
-	arg.crtc_id = crtcId;
-	arg.width = width;
-	arg.height = height;
-	arg.handle = bo_handle;
-
-	return drmIoctl(fd, DRM_IOCTL_MODE_CURSOR, &arg);
-}
-
-int drmModeMoveCursor(int fd, uint32_t crtcId, int x, int y)
-{
-	struct drm_mode_cursor arg;
-
-	arg.flags = DRM_MODE_CURSOR_MOVE;
-	arg.crtc_id = crtcId;
-	arg.x = x;
-	arg.y = y;
-
-	return drmIoctl(fd, DRM_IOCTL_MODE_CURSOR, &arg);
-}
-
-/*
- * Encoder get
- */
-drmModeEncoderPtr drmModeGetEncoder(int fd, uint32_t encoder_id)
-{
-	struct drm_mode_get_encoder enc;
-	drmModeEncoderPtr r = NULL;
-
-	enc.encoder_id = encoder_id;
-	enc.encoder_type = 0;
-	enc.possible_crtcs = 0;
-	enc.possible_clones = 0;
-
-	if (drmIoctl(fd, DRM_IOCTL_MODE_GETENCODER, &enc))
-		return 0;
-
-	if (!(r = drmMalloc(sizeof(*r))))
-		return 0;
-
-	r->encoder_id = enc.encoder_id;
-	r->crtc_id = enc.crtc_id;
-	r->encoder_type = enc.encoder_type;
-	r->possible_crtcs = enc.possible_crtcs;
-	r->possible_clones = enc.possible_clones;
-
-	return r;
-}
-
-/*
- * Connector manipulation
- */
-
-drmModeConnectorPtr drmModeGetConnector(int fd, uint32_t connector_id)
-{
-	struct drm_mode_get_connector conn;
-	drmModeConnectorPtr r = NULL;
-
-	conn.connector_id = connector_id;
-	conn.connector_type_id = 0;
-	conn.connector_type  = 0;
-	conn.count_modes  = 0;
-	conn.modes_ptr    = 0;
-	conn.count_props  = 0;
-	conn.props_ptr    = 0;
-	conn.prop_values_ptr = 0;
-	conn.count_encoders  = 0;
-	conn.encoders_ptr = 0;
-
-	if (drmIoctl(fd, DRM_IOCTL_MODE_GETCONNECTOR, &conn))
-		return 0;
-
-	if (conn.count_props) {
-		conn.props_ptr = VOID2U64(drmMalloc(conn.count_props*sizeof(uint32_t)));
-		conn.prop_values_ptr = VOID2U64(drmMalloc(conn.count_props*sizeof(uint64_t)));
-	}
-
-	if (conn.count_modes)
-		conn.modes_ptr = VOID2U64(drmMalloc(conn.count_modes*sizeof(struct drm_mode_modeinfo)));
-
-	if (conn.count_encoders)
-		conn.encoders_ptr = VOID2U64(drmMalloc(conn.count_encoders*sizeof(uint32_t)));
-
-	if (drmIoctl(fd, DRM_IOCTL_MODE_GETCONNECTOR, &conn))
-		goto err_allocs;
-
-	if(!(r = drmMalloc(sizeof(*r)))) {
-		goto err_allocs;
-	}
-
-	r->connector_id = conn.connector_id;
-	r->encoder_id = conn.encoder_id;
-	r->connection   = conn.connection;
-	r->mmWidth      = conn.mm_width;
-	r->mmHeight     = conn.mm_height;
-	/* convert subpixel from kernel to userspace */
-	r->subpixel     = conn.subpixel + 1;
-	r->count_modes  = conn.count_modes;
-	/* TODO we should test if these alloc & cpy fails. */
-	r->count_props  = conn.count_props;
-	r->props        = drmAllocCpy(U642VOID(conn.props_ptr), conn.count_props, sizeof(uint32_t));
-	r->prop_values  = drmAllocCpy(U642VOID(conn.prop_values_ptr), conn.count_props, sizeof(uint64_t));
-	r->modes        = drmAllocCpy(U642VOID(conn.modes_ptr), conn.count_modes, sizeof(struct drm_mode_modeinfo));
-	r->count_encoders = conn.count_encoders;
-	r->encoders     = drmAllocCpy(U642VOID(conn.encoders_ptr), conn.count_encoders, sizeof(uint32_t));
-	r->connector_type  = conn.connector_type;
-	r->connector_type_id = conn.connector_type_id;
-
-	if (!r->props || !r->prop_values || !r->modes || !r->encoders)
-		goto err_allocs;
-
-err_allocs:
-	drmFree(U642VOID(conn.prop_values_ptr));
-	drmFree(U642VOID(conn.props_ptr));
-	drmFree(U642VOID(conn.modes_ptr));
-	drmFree(U642VOID(conn.encoders_ptr));
-
-	return r;
-}
-
-int drmModeAttachMode(int fd, uint32_t connector_id, drmModeModeInfoPtr mode_info)
-{
-	struct drm_mode_mode_cmd res;
-
-	memcpy(&res.mode, mode_info, sizeof(struct drm_mode_modeinfo));
-	res.connector_id = connector_id;
-
-	return drmIoctl(fd, DRM_IOCTL_MODE_ATTACHMODE, &res);
-}
-
-int drmModeDetachMode(int fd, uint32_t connector_id, drmModeModeInfoPtr mode_info)
-{
-	struct drm_mode_mode_cmd res;
-
-	memcpy(&res.mode, mode_info, sizeof(struct drm_mode_modeinfo));
-	res.connector_id = connector_id;
-
-	return drmIoctl(fd, DRM_IOCTL_MODE_DETACHMODE, &res);
-}
-
-
-drmModePropertyPtr drmModeGetProperty(int fd, uint32_t property_id)
-{
-	struct drm_mode_get_property prop;
-	drmModePropertyPtr r;
-
-	prop.prop_id = property_id;
-	prop.count_enum_blobs = 0;
-	prop.count_values = 0;
-	prop.flags = 0;
-	prop.enum_blob_ptr = 0;
-	prop.values_ptr = 0;
-
-	if (drmIoctl(fd, DRM_IOCTL_MODE_GETPROPERTY, &prop))
-		return 0;
-
-	if (prop.count_values)
-		prop.values_ptr = VOID2U64(drmMalloc(prop.count_values * sizeof(uint64_t)));
-
-	if (prop.count_enum_blobs && (prop.flags & DRM_MODE_PROP_ENUM))
-		prop.enum_blob_ptr = VOID2U64(drmMalloc(prop.count_enum_blobs * sizeof(struct drm_mode_property_enum)));
-
-	if (prop.count_enum_blobs && (prop.flags & DRM_MODE_PROP_BLOB)) {
-		prop.values_ptr = VOID2U64(drmMalloc(prop.count_enum_blobs * sizeof(uint32_t)));
-		prop.enum_blob_ptr = VOID2U64(drmMalloc(prop.count_enum_blobs * sizeof(uint32_t)));
-	}
-
-	if (drmIoctl(fd, DRM_IOCTL_MODE_GETPROPERTY, &prop)) {
-		r = NULL;
-		goto err_allocs;
-	}
-
-	if (!(r = drmMalloc(sizeof(*r))))
-		return NULL;
-
-	r->prop_id = prop.prop_id;
-	r->count_values = prop.count_values;
-
-	r->flags = prop.flags;
-	if (prop.count_values)
-		r->values = drmAllocCpy(U642VOID(prop.values_ptr), prop.count_values, sizeof(uint64_t));
-	if (prop.flags & DRM_MODE_PROP_ENUM) {
-		r->count_enums = prop.count_enum_blobs;
-		r->enums = drmAllocCpy(U642VOID(prop.enum_blob_ptr), prop.count_enum_blobs, sizeof(struct drm_mode_property_enum));
-	} else if (prop.flags & DRM_MODE_PROP_BLOB) {
-		r->values = drmAllocCpy(U642VOID(prop.values_ptr), prop.count_enum_blobs, sizeof(uint32_t));
-		r->blob_ids = drmAllocCpy(U642VOID(prop.enum_blob_ptr), prop.count_enum_blobs, sizeof(uint32_t));
-		r->count_blobs = prop.count_enum_blobs;
-	}
-	strncpy(r->name, prop.name, DRM_PROP_NAME_LEN);
-	r->name[DRM_PROP_NAME_LEN-1] = 0;
-
-err_allocs:
-	drmFree(U642VOID(prop.values_ptr));
-	drmFree(U642VOID(prop.enum_blob_ptr));
-
-	return r;
-}
-
-void drmModeFreeProperty(drmModePropertyPtr ptr)
-{
-	if (!ptr)
-		return;
-
-	drmFree(ptr->values);
-	drmFree(ptr->enums);
-	drmFree(ptr);
-}
-
-drmModePropertyBlobPtr drmModeGetPropertyBlob(int fd, uint32_t blob_id)
-{
-	struct drm_mode_get_blob blob;
-	drmModePropertyBlobPtr r;
-
-	blob.length = 0;
-	blob.data = 0;
-	blob.blob_id = blob_id;
-
-	if (drmIoctl(fd, DRM_IOCTL_MODE_GETPROPBLOB, &blob))
-		return NULL;
-
-	if (blob.length)
-		blob.data = VOID2U64(drmMalloc(blob.length));
-
-	if (drmIoctl(fd, DRM_IOCTL_MODE_GETPROPBLOB, &blob)) {
-		r = NULL;
-		goto err_allocs;
-	}
-
-	if (!(r = drmMalloc(sizeof(*r))))
-		return NULL;
-
-	r->id = blob.blob_id;
-	r->length = blob.length;
-	r->data = drmAllocCpy(U642VOID(blob.data), 1, blob.length);
-
-err_allocs:
-	drmFree(U642VOID(blob.data));
-	return r;
-}
-
-void drmModeFreePropertyBlob(drmModePropertyBlobPtr ptr)
-{
-	if (!ptr)
-		return;
-
-	drmFree(ptr->data);
-	drmFree(ptr);
-}
-
-int drmModeConnectorSetProperty(int fd, uint32_t connector_id, uint32_t property_id,
-			     uint64_t value)
-{
-	struct drm_mode_connector_set_property osp;
-	int ret;
-
-	osp.connector_id = connector_id;
-	osp.prop_id = property_id;
-	osp.value = value;
-
-	if ((ret = drmIoctl(fd, DRM_IOCTL_MODE_SETPROPERTY, &osp)))
-		return ret;
-
-	return 0;
-}
-
-/*
- * checks if a modesetting capable driver has attached to the pci id
- * returns 0 if modesetting supported.
- *  -EINVAL or invalid bus id
- *  -ENOSYS if no modesetting support
-*/
-int drmCheckModesettingSupported(const char *busid)
-{
-#ifdef __linux__
-	char pci_dev_dir[1024];
-	int domain, bus, dev, func;
-	DIR *sysdir;
-	struct dirent *dent;
-	int found = 0, ret;
-
-	ret = sscanf(busid, "pci:%04x:%02x:%02x.%d", &domain, &bus, &dev, &func);
-	if (ret != 4)
-		return -EINVAL;
-
-	sprintf(pci_dev_dir, "/sys/bus/pci/devices/%04x:%02x:%02x.%d/drm",
-		domain, bus, dev, func);
-
-	sysdir = opendir(pci_dev_dir);
-	if (sysdir) {
-		dent = readdir(sysdir);
-		while (dent) {
-			if (!strncmp(dent->d_name, "controlD", 8)) {
-				found = 1;
-				break;
-			}
-
-			dent = readdir(sysdir);
-		}
-		closedir(sysdir);
-		if (found)
-			return 0;
-	}
-
-	sprintf(pci_dev_dir, "/sys/bus/pci/devices/%04x:%02x:%02x.%d/",
-		domain, bus, dev, func);
-
-	sysdir = opendir(pci_dev_dir);
-	if (!sysdir)
-		return -EINVAL;
-
-	dent = readdir(sysdir);
-	while (dent) {
-		if (!strncmp(dent->d_name, "drm:controlD", 12)) {
-			found = 1;
-			break;
-		}
-
-		dent = readdir(sysdir);
-	}
-
-	closedir(sysdir);
-	if (found)
-		return 0;
-#endif
-	return -ENOSYS;
-
-}
-
-int drmModeCrtcGetGamma(int fd, uint32_t crtc_id, uint32_t size,
-			uint16_t *red, uint16_t *green, uint16_t *blue)
-{
-	int ret;
-	struct drm_mode_crtc_lut l;
-
-	l.crtc_id = crtc_id;
-	l.gamma_size = size;
-	l.red = VOID2U64(red);
-	l.green = VOID2U64(green);
-	l.blue = VOID2U64(blue);
-
-	if ((ret = drmIoctl(fd, DRM_IOCTL_MODE_GETGAMMA, &l)))
-		return ret;
-
-	return 0;
-}
-
-int drmModeCrtcSetGamma(int fd, uint32_t crtc_id, uint32_t size,
-			uint16_t *red, uint16_t *green, uint16_t *blue)
-{
-	int ret;
-	struct drm_mode_crtc_lut l;
-
-	l.crtc_id = crtc_id;
-	l.gamma_size = size;
-	l.red = VOID2U64(red);
-	l.green = VOID2U64(green);
-	l.blue = VOID2U64(blue);
-
-	if ((ret = drmIoctl(fd, DRM_IOCTL_MODE_SETGAMMA, &l)))
-		return ret;
-
-	return 0;
-}
-
-int drmHandleEvent(int fd, drmEventContextPtr evctx)
-{
-	char buffer[1024];
-	int len, i;
-	struct drm_event *e;
-	struct drm_event_vblank *vblank;
-	
-	/* The DRM read semantics guarantees that we always get only
-	 * complete events. */
-
-	len = read(fd, buffer, sizeof buffer);
-	if (len == 0)
-		return 0;
-	if (len < sizeof *e)
-		return -1;
-
-	i = 0;
-	while (i < len) {
-		e = (struct drm_event *) &buffer[i];
-		switch (e->type) {
-		case DRM_EVENT_VBLANK:
-			if (evctx->version < 1 ||
-			    evctx->vblank_handler == NULL)
-				break;
-			vblank = (struct drm_event_vblank *) e;
-			evctx->vblank_handler(fd,
-					      vblank->sequence, 
-					      vblank->tv_sec,
-					      vblank->tv_usec,
-					      U642VOID (vblank->user_data));
-			break;
-			
-		default:
-			break;
-		}
-		i += e->length;
-	}
-
-	return 0;
-}
-
diff --git a/libdrm/xf86drmMode.h b/libdrm/xf86drmMode.h
deleted file mode 100644
index 62304bb9..00000000
--- a/libdrm/xf86drmMode.h
+++ /dev/null
@@ -1,364 +0,0 @@
-/*
- * \file xf86drmMode.h
- * Header for DRM modesetting interface.
- *
- * \author Jakob Bornecrantz <wallbraker@gmail.com>
- *
- * \par Acknowledgements:
- * Feb 2007, Dave Airlie <airlied@linux.ie>
- */
-
-/*
- * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
- * Copyright (c) 2007-2008 Dave Airlie <airlied@linux.ie>
- * Copyright (c) 2007-2008 Jakob Bornecrantz <wallbraker@gmail.com>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- *
- */
-
-#include <drm.h>
-
-/*
- * This is the interface for modesetting for drm.
- *
- * In order to use this interface you must include either <stdint.h> or another
- * header defining uint32_t, int32_t and uint16_t.
- *
- * It aims to provide a randr1.2 compatible interface for modesettings in the
- * kernel, the interface is also ment to be used by libraries like EGL.
- *
- * More information can be found in randrproto.txt which can be found here:
- * http://gitweb.freedesktop.org/?p=xorg/proto/randrproto.git
- *
- * There are some major diffrences to be noted. Unlike the randr1.2 proto you
- * need to create the memory object of the framebuffer yourself with the ttm
- * buffer object interface. This object needs to be pinned.
- */
-
-/*
- * If we pickup an old version of drm.h which doesn't include drm_mode.h
- * we should redefine defines. This is so that builds doesn't breaks with
- * new libdrm on old kernels.
- */
-#ifndef _DRM_MODE_H
-
-#define DRM_DISPLAY_INFO_LEN    32
-#define DRM_CONNECTOR_NAME_LEN  32
-#define DRM_DISPLAY_MODE_LEN    32
-#define DRM_PROP_NAME_LEN       32
-
-#define DRM_MODE_TYPE_BUILTIN   (1<<0)
-#define DRM_MODE_TYPE_CLOCK_C   ((1<<1) | DRM_MODE_TYPE_BUILTIN)
-#define DRM_MODE_TYPE_CRTC_C    ((1<<2) | DRM_MODE_TYPE_BUILTIN)
-#define DRM_MODE_TYPE_PREFERRED (1<<3)
-#define DRM_MODE_TYPE_DEFAULT   (1<<4)
-#define DRM_MODE_TYPE_USERDEF   (1<<5)
-#define DRM_MODE_TYPE_DRIVER    (1<<6)
-
-/* Video mode flags */
-/* bit compatible with the xorg definitions. */
-#define DRM_MODE_FLAG_PHSYNC    (1<<0)
-#define DRM_MODE_FLAG_NHSYNC    (1<<1)
-#define DRM_MODE_FLAG_PVSYNC    (1<<2)
-#define DRM_MODE_FLAG_NVSYNC    (1<<3)
-#define DRM_MODE_FLAG_INTERLACE (1<<4)
-#define DRM_MODE_FLAG_DBLSCAN   (1<<5)
-#define DRM_MODE_FLAG_CSYNC     (1<<6)
-#define DRM_MODE_FLAG_PCSYNC    (1<<7)
-#define DRM_MODE_FLAG_NCSYNC    (1<<8)
-#define DRM_MODE_FLAG_HSKEW     (1<<9) /* hskew provided */
-#define DRM_MODE_FLAG_BCAST     (1<<10)
-#define DRM_MODE_FLAG_PIXMUX    (1<<11)
-#define DRM_MODE_FLAG_DBLCLK    (1<<12)
-#define DRM_MODE_FLAG_CLKDIV2   (1<<13)
-
-/* DPMS flags */
-/* bit compatible with the xorg definitions. */
-#define DRM_MODE_DPMS_ON        0
-#define DRM_MODE_DPMS_STANDBY   1
-#define DRM_MODE_DPMS_SUSPEND   2
-#define DRM_MODE_DPMS_OFF       3
-
-/* Scaling mode options */
-#define DRM_MODE_SCALE_NON_GPU          0
-#define DRM_MODE_SCALE_FULLSCREEN       1
-#define DRM_MODE_SCALE_NO_SCALE         2
-#define DRM_MODE_SCALE_ASPECT           3
-
-/* Dithering mode options */
-#define DRM_MODE_DITHERING_OFF  0
-#define DRM_MODE_DITHERING_ON   1
-
-#define DRM_MODE_ENCODER_NONE   0
-#define DRM_MODE_ENCODER_DAC    1
-#define DRM_MODE_ENCODER_TMDS   2
-#define DRM_MODE_ENCODER_LVDS   3
-#define DRM_MODE_ENCODER_TVDAC  4
-
-#define DRM_MODE_SUBCONNECTOR_Automatic 0
-#define DRM_MODE_SUBCONNECTOR_Unknown   0
-#define DRM_MODE_SUBCONNECTOR_DVID      3
-#define DRM_MODE_SUBCONNECTOR_DVIA      4
-#define DRM_MODE_SUBCONNECTOR_Composite 5
-#define DRM_MODE_SUBCONNECTOR_SVIDEO    6
-#define DRM_MODE_SUBCONNECTOR_Component 8
-
-#define DRM_MODE_CONNECTOR_Unknown      0
-#define DRM_MODE_CONNECTOR_VGA          1
-#define DRM_MODE_CONNECTOR_DVII         2
-#define DRM_MODE_CONNECTOR_DVID         3
-#define DRM_MODE_CONNECTOR_DVIA         4
-#define DRM_MODE_CONNECTOR_Composite    5
-#define DRM_MODE_CONNECTOR_SVIDEO       6
-#define DRM_MODE_CONNECTOR_LVDS         7
-#define DRM_MODE_CONNECTOR_Component    8
-#define DRM_MODE_CONNECTOR_9PinDIN      9
-#define DRM_MODE_CONNECTOR_DisplayPort  10
-#define DRM_MODE_CONNECTOR_HDMIA        11
-#define DRM_MODE_CONNECTOR_HDMIB        12
-
-#define DRM_MODE_PROP_PENDING   (1<<0)
-#define DRM_MODE_PROP_RANGE     (1<<1)
-#define DRM_MODE_PROP_IMMUTABLE (1<<2)
-#define DRM_MODE_PROP_ENUM      (1<<3) /* enumerated type with text strings */
-#define DRM_MODE_PROP_BLOB      (1<<4)
-
-#define DRM_MODE_CURSOR_BO      (1<<0)
-#define DRM_MODE_CURSOR_MOVE    (1<<1)
-
-#endif /* _DRM_MODE_H */
-
-typedef struct _drmModeRes {
-
-	int count_fbs;
-	uint32_t *fbs;
-
-	int count_crtcs;
-	uint32_t *crtcs;
-
-	int count_connectors;
-	uint32_t *connectors;
-
-	int count_encoders;
-	uint32_t *encoders;
-
-	uint32_t min_width, max_width;
-	uint32_t min_height, max_height;
-} drmModeRes, *drmModeResPtr;
-
-typedef struct _drmModeModeInfo {
-	uint32_t clock;
-	uint16_t hdisplay, hsync_start, hsync_end, htotal, hskew;
-	uint16_t vdisplay, vsync_start, vsync_end, vtotal, vscan;
-
-	uint32_t vrefresh; /* vertical refresh * 1000 */
-
-	uint32_t flags;
-	uint32_t type;
-	char name[DRM_DISPLAY_MODE_LEN];
-} drmModeModeInfo, *drmModeModeInfoPtr;
-
-typedef struct _drmModeFB {
-	uint32_t fb_id;
-	uint32_t width, height;
-	uint32_t pitch;
-	uint32_t bpp;
-	uint32_t depth;
-	/* driver specific handle */
-	uint32_t handle;
-} drmModeFB, *drmModeFBPtr;
-
-typedef struct _drmModePropertyBlob {
-	uint32_t id;
-	uint32_t length;
-	void *data;
-} drmModePropertyBlobRes, *drmModePropertyBlobPtr;
-
-typedef struct _drmModeProperty {
-	uint32_t prop_id;
-	uint32_t flags;
-	char name[DRM_PROP_NAME_LEN];
-	int count_values;
-	uint64_t *values; // store the blob lengths
-	int count_enums;
-	struct drm_mode_property_enum *enums;
-	int count_blobs;
-	uint32_t *blob_ids; // store the blob IDs
-} drmModePropertyRes, *drmModePropertyPtr;
-
-typedef struct _drmModeCrtc {
-	uint32_t crtc_id;
-	uint32_t buffer_id; /**< FB id to connect to 0 = disconnect */
-
-	uint32_t x, y; /**< Position on the framebuffer */
-	uint32_t width, height;
-	int mode_valid;
-	drmModeModeInfo mode;
-
-	int gamma_size; /**< Number of gamma stops */
-
-} drmModeCrtc, *drmModeCrtcPtr;
-
-typedef struct _drmModeEncoder {
-	uint32_t encoder_id;
-	uint32_t encoder_type;
-	uint32_t crtc_id;
-	uint32_t possible_crtcs;
-	uint32_t possible_clones;
-} drmModeEncoder, *drmModeEncoderPtr;
-
-typedef enum {
-	DRM_MODE_CONNECTED         = 1,
-	DRM_MODE_DISCONNECTED      = 2,
-	DRM_MODE_UNKNOWNCONNECTION = 3
-} drmModeConnection;
-
-typedef enum {
-	DRM_MODE_SUBPIXEL_UNKNOWN        = 1,
-	DRM_MODE_SUBPIXEL_HORIZONTAL_RGB = 2,
-	DRM_MODE_SUBPIXEL_HORIZONTAL_BGR = 3,
-	DRM_MODE_SUBPIXEL_VERTICAL_RGB   = 4,
-	DRM_MODE_SUBPIXEL_VERTICAL_BGR   = 5,
-	DRM_MODE_SUBPIXEL_NONE           = 6
-} drmModeSubPixel;
-
-typedef struct _drmModeConnector {
-	uint32_t connector_id;
-	uint32_t encoder_id; /**< Encoder currently connected to */
-	uint32_t connector_type;
-	uint32_t connector_type_id;
-	drmModeConnection connection;
-	uint32_t mmWidth, mmHeight; /**< HxW in millimeters */
-	drmModeSubPixel subpixel;
-
-	int count_modes;
-	drmModeModeInfoPtr modes;
-
-	int count_props;
-	uint32_t *props; /**< List of property ids */
-	uint64_t *prop_values; /**< List of property values */
-
-	int count_encoders;
-	uint32_t *encoders; /**< List of encoder ids */
-} drmModeConnector, *drmModeConnectorPtr;
-
-
-
-extern void drmModeFreeModeInfo( drmModeModeInfoPtr ptr );
-extern void drmModeFreeResources( drmModeResPtr ptr );
-extern void drmModeFreeFB( drmModeFBPtr ptr );
-extern void drmModeFreeCrtc( drmModeCrtcPtr ptr );
-extern void drmModeFreeConnector( drmModeConnectorPtr ptr );
-extern void drmModeFreeEncoder( drmModeEncoderPtr ptr );
-
-/**
- * Retrives all of the resources associated with a card.
- */
-extern drmModeResPtr drmModeGetResources(int fd);
-
-/*
- * FrameBuffer manipulation.
- */
-
-/**
- * Retrive information about framebuffer bufferId
- */
-extern drmModeFBPtr drmModeGetFB(int fd, uint32_t bufferId);
-
-/**
- * Creates a new framebuffer with an buffer object as its scanout buffer.
- */
-extern int drmModeAddFB(int fd, uint32_t width, uint32_t height, uint8_t depth,
-			uint8_t bpp, uint32_t pitch, uint32_t bo_handle,
-			uint32_t *buf_id);
-/**
- * Destroies the given framebuffer.
- */
-extern int drmModeRmFB(int fd, uint32_t bufferId);
-
-/*
- * Crtc functions
- */
-
-/**
- * Retrive information about the ctrt crtcId
- */
-extern drmModeCrtcPtr drmModeGetCrtc(int fd, uint32_t crtcId);
-
-/**
- * Set the mode on a crtc crtcId with the given mode modeId.
- */
-int drmModeSetCrtc(int fd, uint32_t crtcId, uint32_t bufferId,
-                   uint32_t x, uint32_t y, uint32_t *connectors, int count,
-		   drmModeModeInfoPtr mode);
-
-/*
- * Cursor functions
- */
-
-/**
- * Set the cursor on crtc
- */
-int drmModeSetCursor(int fd, uint32_t crtcId, uint32_t bo_handle, uint32_t width, uint32_t height);
-
-/**
- * Move the cursor on crtc
- */
-int drmModeMoveCursor(int fd, uint32_t crtcId, int x, int y);
-
-/**
- * Encoder functions
- */
-drmModeEncoderPtr drmModeGetEncoder(int fd, uint32_t encoder_id);
-
-/*
- * Connector manipulation
- */
-
-/**
- * Retrive information about the connector connectorId.
- */
-extern drmModeConnectorPtr drmModeGetConnector(int fd,
-		uint32_t connectorId);
-
-/**
- * Attaches the given mode to an connector.
- */
-extern int drmModeAttachMode(int fd, uint32_t connectorId, drmModeModeInfoPtr mode_info);
-
-/**
- * Detaches a mode from the connector
- * must be unused, by the given mode.
- */
-extern int drmModeDetachMode(int fd, uint32_t connectorId, drmModeModeInfoPtr mode_info);
-
-extern drmModePropertyPtr drmModeGetProperty(int fd, uint32_t propertyId);
-extern void drmModeFreeProperty(drmModePropertyPtr ptr);
-
-extern drmModePropertyBlobPtr drmModeGetPropertyBlob(int fd, uint32_t blob_id);
-extern void drmModeFreePropertyBlob(drmModePropertyBlobPtr ptr);
-extern int drmModeConnectorSetProperty(int fd, uint32_t connector_id, uint32_t property_id,
-				    uint64_t value);
-extern int drmCheckModesettingSupported(const char *busid);
-
-extern int drmModeCrtcSetGamma(int fd, uint32_t crtc_id, uint32_t size,
-			       uint16_t *red, uint16_t *green, uint16_t *blue);
-extern int drmModeCrtcGetGamma(int fd, uint32_t crtc_id, uint32_t size,
-			       uint16_t *red, uint16_t *green, uint16_t *blue);
diff --git a/libdrm/xf86drmRandom.c b/libdrm/xf86drmRandom.c
deleted file mode 100644
index ecab9e2d..00000000
--- a/libdrm/xf86drmRandom.c
+++ /dev/null
@@ -1,208 +0,0 @@
-/* xf86drmRandom.c -- "Minimal Standard" PRNG Implementation
- * Created: Mon Apr 19 08:28:13 1999 by faith@precisioninsight.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- * 
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- * 
- * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
- *
- * DESCRIPTION
- *
- * This file contains a simple, straightforward implementation of the Park
- * & Miller "Minimal Standard" PRNG [PM88, PMS93], which is a Lehmer
- * multiplicative linear congruential generator (MLCG) with a period of
- * 2^31-1.
- *
- * This implementation is intended to provide a reliable, portable PRNG
- * that is suitable for testing a hash table implementation and for
- * implementing skip lists.
- *
- * FUTURE ENHANCEMENTS
- *
- * If initial seeds are not selected randomly, two instances of the PRNG
- * can be correlated.  [Knuth81, pp. 32-33] describes a shuffling technique
- * that can eliminate this problem.
- *
- * If PRNGs are used for simulation, the period of the current
- * implementation may be too short.  [LE88] discusses methods of combining
- * MLCGs to produce much longer periods, and suggests some alternative
- * values for A and M.  [LE90 and Sch92] also provide information on
- * long-period PRNGs.
- *
- * REFERENCES
- *
- * [Knuth81] Donald E. Knuth. The Art of Computer Programming.  Volume 2:
- * Seminumerical Algorithms.  Reading, Massachusetts: Addison-Wesley, 1981.
- *
- * [LE88] Pierre L'Ecuyer. "Efficient and Portable Combined Random Number
- * Generators".  CACM 31(6), June 1988, pp. 742-774.
- *
- * [LE90] Pierre L'Ecuyer. "Random Numbers for Simulation". CACM 33(10,
- * October 1990, pp. 85-97.
- *
- * [PM88] Stephen K. Park and Keith W. Miller. "Random Number Generators:
- * Good Ones are Hard to Find". CACM 31(10), October 1988, pp. 1192-1201.
- *
- * [Sch92] Bruce Schneier. "Pseudo-Ransom Sequence Generator for 32-Bit
- * CPUs".  Dr. Dobb's Journal 17(2), February 1992, pp. 34, 37-38, 40.
- *
- * [PMS93] Stephen K. Park, Keith W. Miller, and Paul K. Stockmeyer.  In
- * "Technical Correspondence: Remarks on Choosing and Implementing Random
- * Number Generators". CACM 36(7), July 1993, pp. 105-110.
- *
- */
-
-#include <stdio.h>
-#include <stdlib.h>
-
-#define RANDOM_MAIN 0
-
-#if !RANDOM_MAIN
-# include "xf86drm.h"
-#endif
-
-#define RANDOM_MAGIC 0xfeedbeef
-#define RANDOM_DEBUG 0
-
-#if RANDOM_MAIN
-#define RANDOM_ALLOC malloc
-#define RANDOM_FREE  free
-#else
-#define RANDOM_ALLOC drmMalloc
-#define RANDOM_FREE  drmFree
-#endif
-
-typedef struct RandomState {
-    unsigned long magic;
-    unsigned long a;
-    unsigned long m;
-    unsigned long q;		/* m div a */
-    unsigned long r;		/* m mod a */
-    unsigned long check;
-    long          seed;
-} RandomState;
-
-#if RANDOM_MAIN
-extern void          *drmRandomCreate(unsigned long seed);
-extern int           drmRandomDestroy(void *state);
-extern unsigned long drmRandom(void *state);
-extern double        drmRandomDouble(void *state);
-#endif
-
-void *drmRandomCreate(unsigned long seed)
-{
-    RandomState  *state;
-
-    state           = RANDOM_ALLOC(sizeof(*state));
-    if (!state) return NULL;
-    state->magic    = RANDOM_MAGIC;
-#if 0
-				/* Park & Miller, October 1988 */
-    state->a        = 16807;
-    state->m        = 2147483647;
-    state->check    = 1043618065; /* After 10000 iterations */
-#else
-				/* Park, Miller, and Stockmeyer, July 1993 */
-    state->a        = 48271;
-    state->m        = 2147483647;
-    state->check    = 399268537; /* After 10000 iterations */
-#endif
-    state->q        = state->m / state->a;
-    state->r        = state->m % state->a;
-
-    state->seed     = seed;
-				/* Check for illegal boundary conditions,
-                                   and choose closest legal value. */
-    if (state->seed <= 0)        state->seed = 1;
-    if (state->seed >= state->m) state->seed = state->m - 1;
-
-    return state;
-}
-
-int drmRandomDestroy(void *state)
-{
-    RANDOM_FREE(state);
-    return 0;
-}
-
-unsigned long drmRandom(void *state)
-{
-    RandomState   *s = (RandomState *)state;
-    long          hi;
-    long          lo;
-
-    hi      = s->seed / s->q;
-    lo      = s->seed % s->q;
-    s->seed = s->a * lo - s->r * hi;
-    if (s->seed <= 0) s->seed += s->m;
-
-    return s->seed;
-}
-
-double drmRandomDouble(void *state)
-{
-    RandomState *s = (RandomState *)state;
-    
-    return (double)drmRandom(state)/(double)s->m;
-}
-
-#if RANDOM_MAIN
-static void check_period(long seed)
-{
-    unsigned long count = 0;
-    unsigned long initial;
-    void          *state;
-    
-    state = drmRandomCreate(seed);
-    initial = drmRandom(state);
-    ++count;
-    while (initial != drmRandom(state)) {
-	if (!++count) break;
-    }
-    printf("With seed of %10ld, period = %10lu (0x%08lx)\n",
-	   seed, count, count);
-    drmRandomDestroy(state);
-}
-
-int main(void)
-{
-    RandomState   *state;
-    int           i;
-    unsigned long rand;
-
-    state = drmRandomCreate(1);
-    for (i = 0; i < 10000; i++) {
-	rand = drmRandom(state);
-    }
-    printf("After 10000 iterations: %lu (%lu expected): %s\n",
-	   rand, state->check,
-	   rand - state->check ? "*INCORRECT*" : "CORRECT");
-    drmRandomDestroy(state);
-
-    printf("Checking periods...\n");
-    check_period(1);
-    check_period(2);
-    check_period(31415926);
-    
-    return 0;
-}
-#endif
diff --git a/libdrm/xf86drmSL.c b/libdrm/xf86drmSL.c
deleted file mode 100644
index 58aefac7..00000000
--- a/libdrm/xf86drmSL.c
+++ /dev/null
@@ -1,480 +0,0 @@
-/* xf86drmSL.c -- Skip list support
- * Created: Mon May 10 09:28:13 1999 by faith@precisioninsight.com
- *
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- * 
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- * 
- * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
- *
- * DESCRIPTION
- *
- * This file contains a straightforward skip list implementation.n
- *
- * FUTURE ENHANCEMENTS
- *
- * REFERENCES
- *
- * [Pugh90] William Pugh.  Skip Lists: A Probabilistic Alternative to
- * Balanced Trees. CACM 33(6), June 1990, pp. 668-676.
- *
- */
-
-#include <stdio.h>
-#include <stdlib.h>
-
-#define SL_MAIN 0
-
-#if !SL_MAIN
-# include "xf86drm.h"
-#else
-# include <sys/time.h>
-#endif
-
-#define SL_LIST_MAGIC  0xfacade00LU
-#define SL_ENTRY_MAGIC 0x00fab1edLU
-#define SL_FREED_MAGIC 0xdecea5edLU
-#define SL_MAX_LEVEL   16
-#define SL_DEBUG       0
-#define SL_RANDOM_SEED 0xc01055a1LU
-
-#if SL_MAIN
-#define SL_ALLOC malloc
-#define SL_FREE  free
-#define SL_RANDOM_DECL        static int state = 0;
-#define SL_RANDOM_INIT(seed)  if (!state) { srandom(seed); ++state; }
-#define SL_RANDOM             random()
-#else
-#define SL_ALLOC drmMalloc
-#define SL_FREE  drmFree
-#define SL_RANDOM_DECL        static void *state = NULL
-#define SL_RANDOM_INIT(seed)  if (!state) state = drmRandomCreate(seed)
-#define SL_RANDOM             drmRandom(state)
-
-#endif
-
-typedef struct SLEntry {
-    unsigned long     magic;	   /* SL_ENTRY_MAGIC */
-    unsigned long     key;
-    void              *value;
-    int               levels;
-    struct SLEntry    *forward[1]; /* variable sized array */
-} SLEntry, *SLEntryPtr;
-
-typedef struct SkipList {
-    unsigned long    magic;	/* SL_LIST_MAGIC */
-    int              level;
-    int              count;
-    SLEntryPtr       head;
-    SLEntryPtr       p0;	/* Position for iteration */
-} SkipList, *SkipListPtr;
-
-#if SL_MAIN
-extern void *drmSLCreate(void);
-extern int  drmSLDestroy(void *l);
-extern int  drmSLLookup(void *l, unsigned long key, void **value);
-extern int  drmSLInsert(void *l, unsigned long key, void *value);
-extern int  drmSLDelete(void *l, unsigned long key);
-extern int  drmSLNext(void *l, unsigned long *key, void **value);
-extern int  drmSLFirst(void *l, unsigned long *key, void **value);
-extern void drmSLDump(void *l);
-extern int  drmSLLookupNeighbors(void *l, unsigned long key,
-				 unsigned long *prev_key, void **prev_value,
-				 unsigned long *next_key, void **next_value);
-#endif
-
-static SLEntryPtr SLCreateEntry(int max_level, unsigned long key, void *value)
-{
-    SLEntryPtr entry;
-    
-    if (max_level < 0 || max_level > SL_MAX_LEVEL) max_level = SL_MAX_LEVEL;
-
-    entry         = SL_ALLOC(sizeof(*entry)
-			     + (max_level + 1) * sizeof(entry->forward[0]));
-    if (!entry) return NULL;
-    entry->magic  = SL_ENTRY_MAGIC;
-    entry->key    = key;
-    entry->value  = value;
-    entry->levels = max_level + 1;
-
-    return entry;
-}
-
-static int SLRandomLevel(void)
-{
-    int level = 1;
-    SL_RANDOM_DECL;
-
-    SL_RANDOM_INIT(SL_RANDOM_SEED);
-    
-    while ((SL_RANDOM & 0x01) && level < SL_MAX_LEVEL) ++level;
-    return level;
-}
-
-void *drmSLCreate(void)
-{
-    SkipListPtr  list;
-    int          i;
-
-    list           = SL_ALLOC(sizeof(*list));
-    if (!list) return NULL;
-    list->magic    = SL_LIST_MAGIC;
-    list->level    = 0;
-    list->head     = SLCreateEntry(SL_MAX_LEVEL, 0, NULL);
-    list->count    = 0;
-
-    for (i = 0; i <= SL_MAX_LEVEL; i++) list->head->forward[i] = NULL;
-    
-    return list;
-}
-
-int drmSLDestroy(void *l)
-{
-    SkipListPtr   list  = (SkipListPtr)l;
-    SLEntryPtr    entry;
-    SLEntryPtr    next;
-
-    if (list->magic != SL_LIST_MAGIC) return -1; /* Bad magic */
-
-    for (entry = list->head; entry; entry = next) {
-	if (entry->magic != SL_ENTRY_MAGIC) return -1; /* Bad magic */
-	next         = entry->forward[0];
-	entry->magic = SL_FREED_MAGIC;
-	SL_FREE(entry);
-    }
-
-    list->magic = SL_FREED_MAGIC;
-    SL_FREE(list);
-    return 0;
-}
-
-static SLEntryPtr SLLocate(void *l, unsigned long key, SLEntryPtr *update)
-{
-    SkipListPtr   list  = (SkipListPtr)l;
-    SLEntryPtr    entry;
-    int           i;
-
-    if (list->magic != SL_LIST_MAGIC) return NULL;
-
-    for (i = list->level, entry = list->head; i >= 0; i--) {
-	while (entry->forward[i] && entry->forward[i]->key < key)
-	    entry = entry->forward[i];
-	update[i] = entry;
-    }
-
-    return entry->forward[0];
-}
-
-int drmSLInsert(void *l, unsigned long key, void *value)
-{
-    SkipListPtr   list  = (SkipListPtr)l;
-    SLEntryPtr    entry;
-    SLEntryPtr    update[SL_MAX_LEVEL + 1];
-    int           level;
-    int           i;
-
-    if (list->magic != SL_LIST_MAGIC) return -1; /* Bad magic */
-
-    entry = SLLocate(list, key, update);
-
-    if (entry && entry->key == key) return 1; /* Already in list */
-
-
-    level = SLRandomLevel();
-    if (level > list->level) {
-	level = ++list->level;
-	update[level] = list->head;
-    }
-
-    entry = SLCreateEntry(level, key, value);
-
-				/* Fix up forward pointers */
-    for (i = 0; i <= level; i++) {
-	entry->forward[i]     = update[i]->forward[i];
-	update[i]->forward[i] = entry;
-    }
-
-    ++list->count;
-    return 0;			/* Added to table */
-}
-
-int drmSLDelete(void *l, unsigned long key)
-{
-    SkipListPtr   list = (SkipListPtr)l;
-    SLEntryPtr    update[SL_MAX_LEVEL + 1];
-    SLEntryPtr    entry;
-    int           i;
-
-    if (list->magic != SL_LIST_MAGIC) return -1; /* Bad magic */
-
-    entry = SLLocate(list, key, update);
-
-    if (!entry || entry->key != key) return 1; /* Not found */
-
-				/* Fix up forward pointers */
-    for (i = 0; i <= list->level; i++) {
-	if (update[i]->forward[i] == entry)
-	    update[i]->forward[i] = entry->forward[i];
-    }
-
-    entry->magic = SL_FREED_MAGIC;
-    SL_FREE(entry);
-
-    while (list->level && !list->head->forward[list->level]) --list->level;
-    --list->count;
-    return 0;
-}
-
-int drmSLLookup(void *l, unsigned long key, void **value)
-{
-    SkipListPtr   list = (SkipListPtr)l;
-    SLEntryPtr    update[SL_MAX_LEVEL + 1];
-    SLEntryPtr    entry;
-
-    entry = SLLocate(list, key, update);
-
-    if (entry && entry->key == key) {
-	*value = entry;
-	return 0;
-    }
-    *value = NULL;
-    return -1;
-}
-
-int drmSLLookupNeighbors(void *l, unsigned long key,
-			 unsigned long *prev_key, void **prev_value,
-			 unsigned long *next_key, void **next_value)
-{
-    SkipListPtr   list = (SkipListPtr)l;
-    SLEntryPtr    update[SL_MAX_LEVEL + 1];
-    SLEntryPtr    entry;
-    int           retcode = 0;
-
-    entry = SLLocate(list, key, update);
-
-    *prev_key   = *next_key   = key;
-    *prev_value = *next_value = NULL;
-	
-    if (update[0]) {
-	*prev_key   = update[0]->key;
-	*prev_value = update[0]->value;
-	++retcode;
-	if (update[0]->forward[0]) {
-	    *next_key   = update[0]->forward[0]->key;
-	    *next_value = update[0]->forward[0]->value;
-	    ++retcode;
-	}
-    }
-    return retcode;
-}
-
-int drmSLNext(void *l, unsigned long *key, void **value)
-{
-    SkipListPtr   list = (SkipListPtr)l;
-    SLEntryPtr    entry;
-    
-    if (list->magic != SL_LIST_MAGIC) return -1; /* Bad magic */
-
-    entry    = list->p0;
-
-    if (entry) {
-	list->p0 = entry->forward[0];
-	*key     = entry->key;
-	*value   = entry->value;
-	return 1;
-    }
-    list->p0 = NULL;
-    return 0;
-}
-
-int drmSLFirst(void *l, unsigned long *key, void **value)
-{
-    SkipListPtr   list = (SkipListPtr)l;
-    
-    if (list->magic != SL_LIST_MAGIC) return -1; /* Bad magic */
-    
-    list->p0 = list->head->forward[0];
-    return drmSLNext(list, key, value);
-}
-
-/* Dump internal data structures for debugging. */
-void drmSLDump(void *l)
-{
-    SkipListPtr   list = (SkipListPtr)l;
-    SLEntryPtr    entry;
-    int           i;
-    
-    if (list->magic != SL_LIST_MAGIC) {
-	printf("Bad magic: 0x%08lx (expected 0x%08lx)\n",
-	       list->magic, SL_LIST_MAGIC);
-	return;
-    }
-
-    printf("Level = %d, count = %d\n", list->level, list->count);
-    for (entry = list->head; entry; entry = entry->forward[0]) {
-	if (entry->magic != SL_ENTRY_MAGIC) {
-	    printf("Bad magic: 0x%08lx (expected 0x%08lx)\n",
-		   list->magic, SL_ENTRY_MAGIC);
-	}
-	printf("\nEntry %p <0x%08lx, %p> has %2d levels\n",
-	       entry, entry->key, entry->value, entry->levels);
-	for (i = 0; i < entry->levels; i++) {
-	    if (entry->forward[i]) {
-		printf("   %2d: %p <0x%08lx, %p>\n",
-		       i,
-		       entry->forward[i],
-		       entry->forward[i]->key,
-		       entry->forward[i]->value);
-	    } else {
-		printf("   %2d: %p\n", i, entry->forward[i]);
-	    }
-	}
-    }
-}
-
-#if SL_MAIN
-static void print(SkipListPtr list)
-{
-    unsigned long key;
-    void          *value;
-    
-    if (drmSLFirst(list, &key, &value)) {
-	do {
-	    printf("key = %5lu, value = %p\n", key, value);
-	} while (drmSLNext(list, &key, &value));
-    }
-}
-
-static double do_time(int size, int iter)
-{
-    SkipListPtr    list;
-    int            i, j;
-    unsigned long  keys[1000000];
-    unsigned long  previous;
-    unsigned long  key;
-    void           *value;
-    struct timeval start, stop;
-    double         usec;
-    SL_RANDOM_DECL;
-
-    SL_RANDOM_INIT(12345);
-    
-    list = drmSLCreate();
-
-    for (i = 0; i < size; i++) {
-	keys[i] = SL_RANDOM;
-	drmSLInsert(list, keys[i], NULL);
-    }
-
-    previous = 0;
-    if (drmSLFirst(list, &key, &value)) {
-	do {
-	    if (key <= previous) {
-		printf( "%lu !< %lu\n", previous, key);
-	    }
-	    previous = key;
-	} while (drmSLNext(list, &key, &value));
-    }
-    
-    gettimeofday(&start, NULL);
-    for (j = 0; j < iter; j++) {
-	for (i = 0; i < size; i++) {
-	    if (drmSLLookup(list, keys[i], &value))
-		printf("Error %lu %d\n", keys[i], i);
-	}
-    }
-    gettimeofday(&stop, NULL);
-    
-    usec = (double)(stop.tv_sec * 1000000 + stop.tv_usec
-		    - start.tv_sec * 1000000 - start.tv_usec) / (size * iter);
-    
-    printf("%0.2f microseconds for list length %d\n", usec, size);
-
-    drmSLDestroy(list);
-    
-    return usec;
-}
-
-static void print_neighbors(void *list, unsigned long key)
-{
-    unsigned long prev_key = 0;
-    unsigned long next_key = 0;
-    void          *prev_value;
-    void          *next_value;
-    int           retval;
-
-    retval = drmSLLookupNeighbors(list, key,
-				  &prev_key, &prev_value,
-				  &next_key, &next_value);
-    printf("Neighbors of %5lu: %d %5lu %5lu\n",
-	   key, retval, prev_key, next_key);
-}
-
-int main(void)
-{
-    SkipListPtr    list;
-    double         usec, usec2, usec3, usec4;
-
-    list = drmSLCreate();
-    printf( "list at %p\n", list);
-
-    print(list);
-    printf("\n==============================\n\n");
-
-    drmSLInsert(list, 123, NULL);
-    drmSLInsert(list, 213, NULL);
-    drmSLInsert(list, 50, NULL);
-    print(list);
-    printf("\n==============================\n\n");
-    
-    print_neighbors(list, 0);
-    print_neighbors(list, 50);
-    print_neighbors(list, 51);
-    print_neighbors(list, 123);
-    print_neighbors(list, 200);
-    print_neighbors(list, 213);
-    print_neighbors(list, 256);
-    printf("\n==============================\n\n");    
-    
-    drmSLDelete(list, 50);
-    print(list);
-    printf("\n==============================\n\n");
-
-    drmSLDump(list);
-    drmSLDestroy(list);
-    printf("\n==============================\n\n");
-
-    usec  = do_time(100, 10000);
-    usec2 = do_time(1000, 500);
-    printf("Table size increased by %0.2f, search time increased by %0.2f\n",
-	   1000.0/100.0, usec2 / usec);
-    
-    usec3 = do_time(10000, 50);
-    printf("Table size increased by %0.2f, search time increased by %0.2f\n",
-	   10000.0/100.0, usec3 / usec);
-    
-    usec4 = do_time(100000, 4);
-    printf("Table size increased by %0.2f, search time increased by %0.2f\n",
-	   100000.0/100.0, usec4 / usec);
-
-    return 0;
-}
-#endif
diff --git a/libdrm/xf86mm.h b/libdrm/xf86mm.h
deleted file mode 100644
index a31de424..00000000
--- a/libdrm/xf86mm.h
+++ /dev/null
@@ -1,198 +0,0 @@
-/**************************************************************************
- * 
- * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND. USA.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * 
- **************************************************************************/
-
-#ifndef _XF86MM_H_
-#define _XF86MM_H_
-#include <stddef.h>
-#include <stdint.h>
-#include "drm.h"
-
-/*
- * Note on multithreaded applications using this interface.
- * Libdrm is not threadsafe, so common buffer, TTM, and fence objects need to
- * be protected using an external mutex.
- *
- * Note: Don't protect the following functions, as it may lead to deadlocks:
- * drmBOUnmap().
- * The kernel is synchronizing and refcounting buffer maps. 
- * User space only needs to refcount object usage within the same application.
- */
-
-
-/*
- * List macros heavily inspired by the Linux kernel
- * list handling. No list looping yet.
- */
-
-typedef struct _drmMMListHead
-{
-    struct _drmMMListHead *prev;
-    struct _drmMMListHead *next;
-} drmMMListHead;
-
-#define DRMINITLISTHEAD(__item)		       \
-  do{					       \
-    (__item)->prev = (__item);		       \
-    (__item)->next = (__item);		       \
-  } while (0)
-
-#define DRMLISTADD(__item, __list)		\
-  do {						\
-    (__item)->prev = (__list);			\
-    (__item)->next = (__list)->next;		\
-    (__list)->next->prev = (__item);		\
-    (__list)->next = (__item);			\
-  } while (0)
-
-#define DRMLISTADDTAIL(__item, __list)		\
-  do {						\
-    (__item)->next = (__list);			\
-    (__item)->prev = (__list)->prev;		\
-    (__list)->prev->next = (__item);		\
-    (__list)->prev = (__item);			\
-  } while(0)
-
-#define DRMLISTDEL(__item)			\
-  do {						\
-    (__item)->prev->next = (__item)->next;	\
-    (__item)->next->prev = (__item)->prev;	\
-  } while(0)
-
-#define DRMLISTDELINIT(__item)			\
-  do {						\
-    (__item)->prev->next = (__item)->next;	\
-    (__item)->next->prev = (__item)->prev;	\
-    (__item)->next = (__item);			\
-    (__item)->prev = (__item);			\
-  } while(0)
-
-#define DRMLISTENTRY(__type, __item, __field)   \
-    ((__type *)(((char *) (__item)) - offsetof(__type, __field)))
-
-#define DRMLISTEMPTY(__item) ((__item)->next == (__item))
-
-#define DRMLISTFOREACHSAFE(__item, __temp, __list)			\
-	for ((__item) = (__list)->next, (__temp) = (__item)->next;	\
-	     (__item) != (__list);					\
-	     (__item) = (__temp), (__temp) = (__item)->next)
-
-#define DRMLISTFOREACHSAFEREVERSE(__item, __temp, __list)		\
-	for ((__item) = (__list)->prev, (__temp) = (__item)->prev;	\
-	     (__item) != (__list);					\
-	     (__item) = (__temp), (__temp) = (__item)->prev)
-
-typedef struct _drmFence
-{
-    unsigned handle;
-    int fence_class;
-    unsigned type; 
-    unsigned flags;
-    unsigned signaled;
-    uint32_t sequence;
-    unsigned pad[4]; /* for future expansion */
-} drmFence;
-
-typedef struct _drmBO
-{
-    unsigned handle;
-    uint64_t mapHandle;
-    uint64_t flags;
-    uint64_t proposedFlags;
-    unsigned mapFlags;
-    unsigned long size;
-    unsigned long offset;
-    unsigned long start;
-    unsigned replyFlags;
-    unsigned fenceFlags;
-    unsigned pageAlignment;
-    unsigned tileInfo;
-    unsigned hwTileStride;
-    unsigned desiredTileStride;
-    void *virtual;
-    void *mapVirtual;
-    int mapCount;
-    unsigned pad[8];     /* for future expansion */
-} drmBO;
-
-/*
- * Fence functions.
- */
-
-extern int drmFenceCreate(int fd, unsigned flags, int fence_class,
-                          unsigned type, drmFence *fence);
-extern int drmFenceReference(int fd, unsigned handle, drmFence *fence);
-extern int drmFenceUnreference(int fd, const drmFence *fence);
-extern int drmFenceFlush(int fd, drmFence *fence, unsigned flush_type);
-extern int drmFenceSignaled(int fd, drmFence *fence, 
-                            unsigned fenceType, int *signaled);
-extern int drmFenceWait(int fd, unsigned flags, drmFence *fence, 
-                        unsigned flush_type);
-extern int drmFenceEmit(int fd, unsigned flags, drmFence *fence, 
-                        unsigned emit_type);
-extern int drmFenceBuffers(int fd, unsigned flags, uint32_t fence_class, drmFence *fence);
-
-
-/*
- * Buffer object functions.
- */
-
-extern int drmBOCreate(int fd, unsigned long size,
-		       unsigned pageAlignment, void *user_buffer,
-		       uint64_t mask, unsigned hint, drmBO *buf);
-extern int drmBOReference(int fd, unsigned handle, drmBO *buf);
-extern int drmBOUnreference(int fd, drmBO *buf);
-extern int drmBOMap(int fd, drmBO *buf, unsigned mapFlags, unsigned mapHint,
-		    void **address);
-extern int drmBOUnmap(int fd, drmBO *buf);
-extern int drmBOFence(int fd, drmBO *buf, unsigned flags, unsigned fenceHandle);
-extern int drmBOInfo(int fd, drmBO *buf);
-extern int drmBOBusy(int fd, drmBO *buf, int *busy);
-
-extern int drmBOWaitIdle(int fd, drmBO *buf, unsigned hint);
-
-/*
- * Initialization functions.
- */
-
-extern int drmMMInit(int fd, unsigned long pOffset, unsigned long pSize,
-		     unsigned memType);
-extern int drmMMTakedown(int fd, unsigned memType);
-extern int drmMMLock(int fd, unsigned memType, int lockBM, int ignoreNoEvict);
-extern int drmMMUnlock(int fd, unsigned memType, int unlockBM);
-extern int drmMMInfo(int fd, unsigned memType, uint64_t *size);
-extern int drmBOSetStatus(int fd, drmBO *buf, 
-			  uint64_t flags, uint64_t mask,
-			  unsigned int hint, 
-			  unsigned int desired_tile_stride,
-			  unsigned int tile_info);
-extern int drmBOVersion(int fd, unsigned int *major,
-			unsigned int *minor,
-			unsigned int *patchlevel);
-
-
-#endif