summaryrefslogtreecommitdiff
path: root/intel
diff options
context:
space:
mode:
authorChia-I Wu <olvaffe@gmail.com>2013-07-10 10:49:59 +0800
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-07-16 15:23:39 +0200
commitfea5408098c3c3057958e85ea9d7146f0b08749e (patch)
treeb69a16de87f7674bb600094deef0127b9cf60e65 /intel
parentf8f1f6e37ae2c3eb4a9c045ba3294b3ccf926c07 (diff)
intel: silence valgrind warnings for unsynchronized maps
Mark the address ranges as accessible with VALGRIND_MAKE_MEM_DEFINED. Signed-off-by: Chia-I Wu <olvaffe@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'intel')
-rw-r--r--intel/intel_bufmgr_gem.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index a51e3f34..f98f7a72 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -1322,6 +1322,7 @@ int drm_intel_gem_bo_map_gtt(drm_intel_bo *bo)
int drm_intel_gem_bo_map_unsynchronized(drm_intel_bo *bo)
{
drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr;
+ drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
int ret;
/* If the CPU cache isn't coherent with the GTT, then use a
@@ -1335,7 +1336,13 @@ int drm_intel_gem_bo_map_unsynchronized(drm_intel_bo *bo)
return drm_intel_gem_bo_map_gtt(bo);
pthread_mutex_lock(&bufmgr_gem->lock);
+
ret = map_gtt(bo);
+ if (ret == 0) {
+ drm_intel_gem_bo_mark_mmaps_incoherent(bo);
+ VG(VALGRIND_MAKE_MEM_DEFINED(bo_gem->gtt_virtual, bo->size));
+ }
+
pthread_mutex_unlock(&bufmgr_gem->lock);
return ret;