summaryrefslogtreecommitdiff
path: root/intel
diff options
context:
space:
mode:
authorKenneth Graunke <kenneth@whitecape.org>2012-03-19 13:55:19 -0700
committerKenneth Graunke <kenneth@whitecape.org>2012-03-22 13:52:29 -0700
commit617213357e94299a5e9a3cb1342de55de949d156 (patch)
tree6c267e75b39a897cd92d207a46eb61ee38688e62 /intel
parentc50cc24690938db53cd91ae9ff2fa0958693f80d (diff)
intel: Add some PCI IDs for Haswell.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Diffstat (limited to 'intel')
-rw-r--r--intel/intel_chipset.h28
1 files changed, 23 insertions, 5 deletions
diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
index e3a30fc7..435d01a3 100644
--- a/intel/intel_chipset.h
+++ b/intel/intel_chipset.h
@@ -45,6 +45,12 @@
#define PCI_CHIP_IVYBRIDGE_M_GT2 0x0166
#define PCI_CHIP_IVYBRIDGE_S 0x015a /* server */
+#define PCI_CHIP_HASWELL_GT1 0x0402 /* Desktop */
+#define PCI_CHIP_HASWELL_GT2 0x0412
+#define PCI_CHIP_HASWELL_M_GT1 0x0406 /* Mobile */
+#define PCI_CHIP_HASWELL_M_GT2 0x0416
+#define PCI_CHIP_HASWELL_M_ULT_GT2 0x0A16 /* Mobile ULT */
+
#define IS_830(dev) (dev == 0x3577)
#define IS_845(dev) (dev == 0x2562)
#define IS_85X(dev) (dev == 0x3582)
@@ -115,11 +121,23 @@
dev == PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS || \
dev == PCI_CHIP_SANDYBRIDGE_S)
-#define IS_GEN7(dev) (dev == PCI_CHIP_IVYBRIDGE_GT1 || \
- dev == PCI_CHIP_IVYBRIDGE_GT2 || \
- dev == PCI_CHIP_IVYBRIDGE_M_GT1 || \
- dev == PCI_CHIP_IVYBRIDGE_M_GT2 || \
- dev == PCI_CHIP_IVYBRIDGE_S)
+#define IS_GEN7(devid) (IS_IVYBRIDGE(devid) || \
+ IS_HASWELL(devid))
+
+#define IS_IVYBRIDGE(dev) (dev == PCI_CHIP_IVYBRIDGE_GT1 || \
+ dev == PCI_CHIP_IVYBRIDGE_GT2 || \
+ dev == PCI_CHIP_IVYBRIDGE_M_GT1 || \
+ dev == PCI_CHIP_IVYBRIDGE_M_GT2 || \
+ dev == PCI_CHIP_IVYBRIDGE_S)
+
+#define IS_HSW_GT1(devid) (devid == PCI_CHIP_HASWELL_GT1 || \
+ devid == PCI_CHIP_HASWELL_M_GT1)
+#define IS_HSW_GT2(devid) (devid == PCI_CHIP_HASWELL_GT2 || \
+ devid == PCI_CHIP_HASWELL_M_GT2 || \
+ devid == PCI_CHIP_HASWELL_M_ULT_GT2)
+
+#define IS_HASWELL(devid) (IS_HSW_GT1(devid) || \
+ IS_HSW_GT2(devid))
#define IS_G4X(dev) (dev == 0x2E02 || \
dev == 0x2E12 || \