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authorDaniel Vetter <daniel.vetter@ffwll.ch>2011-12-04 12:51:45 +0100
committerDaniel Vetter <daniel.vetter@ffwll.ch>2011-12-04 13:25:17 +0100
commit36cff1cbb89477c839588a7e40fec2a8db7df396 (patch)
tree5bb454bb0a09d4e82862ef932137b964b5d63464 /intel
parent37ccce5e390a9d757474920f488cafa1cf89854a (diff)
intel: limit aperture space to mappable area on gen3
Otherwise we blow up on heavy tiled blitter loads (with giant pixmaps). Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'intel')
-rw-r--r--intel/intel_bufmgr_gem.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index dd58c0c4..0cfeb988 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -2204,6 +2204,14 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size)
else
bufmgr_gem->gen = 6;
+ if (IS_GEN3(bufmgr_gem) && bufmgr_gem->gtt_size > 256*1024*1024) {
+ /* The unmappable part of gtt on gen 3 (i.e. above 256MB) can't
+ * be used for tiled blits. To simplify the accounting, just
+ * substract the unmappable part (fixed to 256MB on all known
+ * gen3 devices) if the kernel advertises it. */
+ bufmgr_gem->gtt_size -= 256*1024*1024;
+ }
+
gp.value = &tmp;
gp.param = I915_PARAM_HAS_EXECBUF2;