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authorIan Romanick <ian.d.romanick@intel.com>2013-11-15 10:24:43 -0800
committerIan Romanick <ian.d.romanick@intel.com>2013-11-15 11:31:49 -0800
commit5a41b025042c42788977e67aea8d1bf3b59baae4 (patch)
tree1abd805a37014e5dcda2c5d75d7c989c46f66998 /intel/intel_bufmgr_gem.c
parent1a84eea45bf9d3915698a04199c594a63fcca4a2 (diff)
intel: Add support for GPU reset status query ioctl
I would have just used the drmIoctl interface directly in Mesa, but the ioctl needs some data from the drm_intel_context that is not exposed outside libdrm. This ioctl is in the drm-intel-next tree as b635991. v2: Update based on Mika's kernel work. v3: Fix compile failures from last-minute typos. Sigh. v4: Import the actual changes from the kernel i915_drm.h. Only comments on some fields of drm_i915_reset_stats differed. There are still some deltas between the kernel i915_drm.h and the one in libdrm, but those can be resolved in other patches. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> [v3] Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Cc: Mika Kuoppala <mika.kuoppala@intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'intel/intel_bufmgr_gem.c')
-rw-r--r--intel/intel_bufmgr_gem.c34
1 files changed, 34 insertions, 0 deletions
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index 029ca5d8..df6fcec4 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -3021,6 +3021,40 @@ drm_intel_gem_context_destroy(drm_intel_context *ctx)
}
int
+drm_intel_get_reset_stats(drm_intel_context *ctx,
+ uint32_t *reset_count,
+ uint32_t *active,
+ uint32_t *pending)
+{
+ drm_intel_bufmgr_gem *bufmgr_gem;
+ struct drm_i915_reset_stats stats;
+ int ret;
+
+ if (ctx == NULL)
+ return -EINVAL;
+
+ VG_CLEAR(stats);
+
+ bufmgr_gem = (drm_intel_bufmgr_gem *)ctx->bufmgr;
+ stats.ctx_id = ctx->ctx_id;
+ ret = drmIoctl(bufmgr_gem->fd,
+ DRM_IOCTL_I915_GET_RESET_STATS,
+ &stats);
+ if (ret == 0) {
+ if (reset_count != NULL)
+ *reset_count = stats.reset_count;
+
+ if (active != NULL)
+ *active = stats.batch_active;
+
+ if (pending != NULL)
+ *pending = stats.batch_pending;
+ }
+
+ return ret;
+}
+
+int
drm_intel_reg_read(drm_intel_bufmgr *bufmgr,
uint32_t offset,
uint64_t *result)