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authorJesse Barnes <jbarnes@virtuousgeek.org>2009-09-15 11:02:58 -0700
committerEric Anholt <eric@anholt.net>2010-03-02 10:10:50 -0800
commitb50964027bef249a0cc3d511de05c2464e0a1e22 (patch)
tree922ef89b71b606f50087e7a41d7efd799f473c0c /intel/intel_bufmgr.h
parent9a37455b35d746d694760cfe8850a8bf856d73c9 (diff)
libdrm/intel: execbuf2 support
This patch to libdrm adds support for the new execbuf2 ioctl. If detected, it will be used instead of the old ioctl. By using the new drm_intel_bufmgr_gem_enable_fenced_relocs(), you can indicate that any time a fence register is actually required for a relocation target you will call drm_intel_bo_emit_reloc_fence instead of drm_intel_bo_emit_reloc, which will reduce fence register pressure. Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'intel/intel_bufmgr.h')
-rw-r--r--intel/intel_bufmgr.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h
index 40984d32..0984ab08 100644
--- a/intel/intel_bufmgr.h
+++ b/intel/intel_bufmgr.h
@@ -111,6 +111,10 @@ int drm_intel_bufmgr_check_aperture_space(drm_intel_bo ** bo_array, int count);
int drm_intel_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
drm_intel_bo *target_bo, uint32_t target_offset,
uint32_t read_domains, uint32_t write_domain);
+int drm_intel_bo_emit_reloc_fence(drm_intel_bo *bo, uint32_t offset,
+ drm_intel_bo *target_bo,
+ uint32_t target_offset,
+ uint32_t read_domains, uint32_t write_domain);
int drm_intel_bo_pin(drm_intel_bo *bo, uint32_t alignment);
int drm_intel_bo_unpin(drm_intel_bo *bo);
int drm_intel_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
@@ -130,6 +134,7 @@ drm_intel_bo *drm_intel_bo_gem_create_from_name(drm_intel_bufmgr *bufmgr,
const char *name,
unsigned int handle);
void drm_intel_bufmgr_gem_enable_reuse(drm_intel_bufmgr *bufmgr);
+void drm_intel_bufmgr_gem_enable_fenced_relocs(drm_intel_bufmgr *bufmgr);
int drm_intel_gem_bo_map_gtt(drm_intel_bo *bo);
int drm_intel_gem_bo_unmap_gtt(drm_intel_bo *bo);
void drm_intel_gem_bo_start_gtt_access(drm_intel_bo *bo, int write_enable);