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| author | Marek Olšák <maraeo@gmail.com> | 2012-09-30 19:20:04 +0200 |
|---|---|---|
| committer | Marek Olšák <maraeo@gmail.com> | 2012-10-06 05:45:56 +0200 |
| commit | 1aebfdc1121ccb6babb3a63dc0b99d68b4860b04 (patch) | |
| tree | 3f0fd6c757f1022afbab218cce2d55c97858c0cb /intel/.gitignore | |
| parent | 77413e77b82a5d800c86b7d3b864d6cc797721c9 (diff) | |
radeon: fix stencil miptree allocation of combined ZS buffers on EG and SI
This allows texturing with depth-stencil buffers directly without the copy
to CB. The separate miptree description for stencil is added, because
the stencil mipmap offsets are not really depth offsets/4 (at least
for the texture units).
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'intel/.gitignore')
0 files changed, 0 insertions, 0 deletions