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authorMarek Olšák <marek.olsak@amd.com>2013-11-22 23:31:13 +0100
committerMarek Olšák <marek.olsak@amd.com>2013-11-23 00:35:39 +0100
commit67d92404d62044972599dcef3011d17fca46eed5 (patch)
treeeab74c852d5271e5caaf26257505c68352428eb3 /exynos/libdrm_exynos.pc.in
parentce8af454259279c14c44bcd32c429640ca5e1691 (diff)
radeon: implement 2D tiling for CIK
Bug fixes and simplification by Marek. We have to use the tile index of 0 for non-MSAA depth-stencil after all. Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'exynos/libdrm_exynos.pc.in')
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