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authorChris Wilson <chris@chris-wilson.co.uk>2010-06-22 11:15:56 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2010-06-22 11:15:56 +0100
commitc7bbaca6a376f40d914d1ed33e119f2330701c9a (patch)
treec8a69e3cf6ac077ee0d2d4fa6da2ecf680bebd09
parentcd34cbeb9f5c65b25d241700f27c16b36e1ecce6 (diff)
intel: '===' != '=='
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-rw-r--r--intel/intel_bufmgr_gem.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index 14b6d7bb..3931ec86 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -1738,7 +1738,7 @@ drm_intel_gem_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
/* Linear buffers have no stride. By ensuring that we only ever use
* stride 0 with linear buffers, we simplify our code.
*/
- if (*tiling_mode === I915_TILING_NONE)
+ if (*tiling_mode == I915_TILING_NONE)
stride = 0;
ret = drm_intel_gem_bo_set_tiling_internal(bo, *tiling_mode, stride);