diff options
author | Ben Skeggs <skeggsb@gmail.com> | 2007-08-08 10:42:12 +1000 |
---|---|---|
committer | Ben Skeggs <skeggsb@gmail.com> | 2007-08-08 10:49:05 +1000 |
commit | 4ad487190d5b79947c65e238330506db6b77e523 (patch) | |
tree | 048537f612445e068189fdcfeb8b74d654d3ded0 | |
parent | a4759b85139dd8d81de25e170777309b770f5316 (diff) |
nouveau: enable/disable engine-specific interrupts in _init()/_takedown()
All interrupts are still masked by PMC until init is finished.
-rw-r--r-- | shared-core/nouveau_fifo.c | 4 | ||||
-rw-r--r-- | shared-core/nouveau_irq.c | 81 | ||||
-rw-r--r-- | shared-core/nv04_graph.c | 4 | ||||
-rw-r--r-- | shared-core/nv04_mc.c | 2 | ||||
-rw-r--r-- | shared-core/nv10_graph.c | 2 | ||||
-rw-r--r-- | shared-core/nv20_graph.c | 2 | ||||
-rw-r--r-- | shared-core/nv30_graph.c | 2 | ||||
-rw-r--r-- | shared-core/nv40_graph.c | 2 | ||||
-rw-r--r-- | shared-core/nv40_mc.c | 2 | ||||
-rw-r--r-- | shared-core/nv50_fifo.c | 12 | ||||
-rw-r--r-- | shared-core/nv50_graph.c | 12 | ||||
-rw-r--r-- | shared-core/nv50_mc.c | 1 |
12 files changed, 36 insertions, 90 deletions
diff --git a/shared-core/nouveau_fifo.c b/shared-core/nouveau_fifo.c index fd21d2f3..f9677514 100644 --- a/shared-core/nouveau_fifo.c +++ b/shared-core/nouveau_fifo.c @@ -120,6 +120,10 @@ int nouveau_fifo_init(struct drm_device *dev) NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) | NV_PMC_ENABLE_PFIFO); + /* Enable PFIFO error reporting */ + NV_WRITE(NV03_PFIFO_INTR_0, 0xFFFFFFFF); + NV_WRITE(NV03_PFIFO_INTR_EN_0, 0xFFFFFFFF); + NV_WRITE(NV03_PFIFO_CACHES, 0x00000000); ret = nouveau_fifo_instmem_configure(dev); diff --git a/shared-core/nouveau_irq.c b/shared-core/nouveau_irq.c index 84a37040..f110340b 100644 --- a/shared-core/nouveau_irq.c +++ b/shared-core/nouveau_irq.c @@ -39,37 +39,7 @@ void nouveau_irq_preinstall(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; - /* TODO this should be removed as this stuff is done in - * engine.*init - */ - DRM_DEBUG("IRQ: preinst\n"); - - if (!dev_priv) { - DRM_ERROR("AIII, no dev_priv\n"); - return; - } - if (!dev_priv->mmio) { - DRM_ERROR("AIII, no dev_priv->mmio\n"); - return; - } - - /* Disable/Clear PFIFO interrupts */ - NV_WRITE(NV03_PFIFO_INTR_EN_0, 0); - NV_WRITE(NV03_PFIFO_INTR_0, 0xFFFFFFFF); - /* Disable/Clear PGRAPH interrupts */ - if (dev_priv->card_type<NV_40) - NV_WRITE(NV03_PGRAPH_INTR_EN, 0); - else - NV_WRITE(NV40_PGRAPH_INTR_EN, 0); - NV_WRITE(NV03_PGRAPH_INTR, 0xFFFFFFFF); -#if 0 - /* Disable/Clear CRTC0/1 interrupts */ - NV_WRITE(NV_CRTC0_INTEN, 0); - NV_WRITE(NV_CRTC0_INTSTAT, NV_CRTC_INTR_VBLANK); - NV_WRITE(NV_CRTC1_INTEN, 0); - NV_WRITE(NV_CRTC1_INTSTAT, NV_CRTC_INTR_VBLANK); -#endif /* Master disable */ NV_WRITE(NV03_PMC_INTR_EN_0, 0); } @@ -78,34 +48,6 @@ void nouveau_irq_postinstall(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; - if (!dev_priv) { - DRM_ERROR("AIII, no dev_priv\n"); - return; - } - if (!dev_priv->mmio) { - DRM_ERROR("AIII, no dev_priv->mmio\n"); - return; - } - - DRM_DEBUG("IRQ: postinst\n"); - - /* Enable PFIFO error reporting */ - NV_WRITE(NV03_PFIFO_INTR_EN_0, 0xFFFFFFFF); - NV_WRITE(NV03_PFIFO_INTR_0, 0xFFFFFFFF); - - /* Enable PGRAPH interrupts */ - if (dev_priv->card_type<NV_40) - NV_WRITE(NV03_PGRAPH_INTR_EN, 0xFFFFFFFF); - else - NV_WRITE(NV40_PGRAPH_INTR_EN, 0xFFFFFFFF); - NV_WRITE(NV03_PGRAPH_INTR, 0xFFFFFFFF); - -#if 0 - /* Enable CRTC0/1 interrupts */ - NV_WRITE(NV_CRTC0_INTEN, NV_CRTC_INTR_VBLANK); - NV_WRITE(NV_CRTC1_INTEN, NV_CRTC_INTR_VBLANK); -#endif - /* Master enable */ NV_WRITE(NV03_PMC_INTR_EN_0, NV_PMC_INTR_EN_0_MASTER_ENABLE); } @@ -114,29 +56,6 @@ void nouveau_irq_uninstall(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; - if (!dev_priv) { - DRM_ERROR("AIII, no dev_priv\n"); - return; - } - if (!dev_priv->mmio) { - DRM_ERROR("AIII, no dev_priv->mmio\n"); - return; - } - - DRM_DEBUG("IRQ: uninst\n"); - - /* Disable PFIFO interrupts */ - NV_WRITE(NV03_PFIFO_INTR_EN_0, 0); - /* Disable PGRAPH interrupts */ - if (dev_priv->card_type<NV_40) - NV_WRITE(NV03_PGRAPH_INTR_EN, 0); - else - NV_WRITE(NV40_PGRAPH_INTR_EN, 0); -#if 0 - /* Disable CRTC0/1 interrupts */ - NV_WRITE(NV_CRTC0_INTEN, 0); - NV_WRITE(NV_CRTC1_INTEN, 0); -#endif /* Master disable */ NV_WRITE(NV03_PMC_INTR_EN_0, 0); } diff --git a/shared-core/nv04_graph.c b/shared-core/nv04_graph.c index b2ea7804..050f6e81 100644 --- a/shared-core/nv04_graph.c +++ b/shared-core/nv04_graph.c @@ -375,6 +375,10 @@ int nv04_graph_init(struct drm_device *dev) { NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) | NV_PMC_ENABLE_PGRAPH); + /* Enable PGRAPH interrupts */ + NV_WRITE(NV03_PGRAPH_INTR, 0xFFFFFFFF); + NV_WRITE(NV03_PGRAPH_INTR_EN, 0xFFFFFFFF); + // check the context is big enough for ( i = 0 ; i<sizeof(nv04_graph_ctx_regs)/sizeof(nv04_graph_ctx_regs[0]); i++) sum+=nv04_graph_ctx_regs[i].number; diff --git a/shared-core/nv04_mc.c b/shared-core/nv04_mc.c index 1d998851..eee0c50c 100644 --- a/shared-core/nv04_mc.c +++ b/shared-core/nv04_mc.c @@ -13,8 +13,6 @@ nv04_mc_init(struct drm_device *dev) */ NV_WRITE(NV03_PMC_ENABLE, 0xFFFFFFFF); - NV_WRITE(NV03_PMC_INTR_EN_0, 0); - return 0; } diff --git a/shared-core/nv10_graph.c b/shared-core/nv10_graph.c index a2df2d71..53b93758 100644 --- a/shared-core/nv10_graph.c +++ b/shared-core/nv10_graph.c @@ -690,8 +690,8 @@ int nv10_graph_init(struct drm_device *dev) { NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) | NV_PMC_ENABLE_PGRAPH); - NV_WRITE(NV03_PGRAPH_INTR_EN, 0x00000000); NV_WRITE(NV03_PGRAPH_INTR , 0xFFFFFFFF); + NV_WRITE(NV03_PGRAPH_INTR_EN, 0xFFFFFFFF); NV_WRITE(NV04_PGRAPH_DEBUG_0, 0xFFFFFFFF); NV_WRITE(NV04_PGRAPH_DEBUG_0, 0x00000000); diff --git a/shared-core/nv20_graph.c b/shared-core/nv20_graph.c index d397390f..c163daf9 100644 --- a/shared-core/nv20_graph.c +++ b/shared-core/nv20_graph.c @@ -169,8 +169,8 @@ int nv20_graph_init(struct drm_device *dev) { //XXX need to be done and save/restore for each fifo ??? nv20_graph_rdi(dev); - NV_WRITE(NV03_PGRAPH_INTR_EN, 0x00000000); NV_WRITE(NV03_PGRAPH_INTR , 0xFFFFFFFF); + NV_WRITE(NV03_PGRAPH_INTR_EN, 0xFFFFFFFF); NV_WRITE(NV04_PGRAPH_DEBUG_0, 0xFFFFFFFF); NV_WRITE(NV04_PGRAPH_DEBUG_0, 0x00000000); diff --git a/shared-core/nv30_graph.c b/shared-core/nv30_graph.c index c605c84e..161f3154 100644 --- a/shared-core/nv30_graph.c +++ b/shared-core/nv30_graph.c @@ -215,8 +215,8 @@ int nv30_graph_init(struct drm_device *dev) NV_WRITE(NV10_PGRAPH_CHANNEL_CTX_TABLE, dev_priv->ctx_table->instance >> 4); - NV_WRITE(NV03_PGRAPH_INTR_EN, 0x00000000); NV_WRITE(NV03_PGRAPH_INTR , 0xFFFFFFFF); + NV_WRITE(NV03_PGRAPH_INTR_EN, 0xFFFFFFFF); NV_WRITE(NV04_PGRAPH_DEBUG_0, 0xFFFFFFFF); NV_WRITE(NV04_PGRAPH_DEBUG_0, 0x00000000); diff --git a/shared-core/nv40_graph.c b/shared-core/nv40_graph.c index c79b63cc..c1464bc2 100644 --- a/shared-core/nv40_graph.c +++ b/shared-core/nv40_graph.c @@ -1636,8 +1636,8 @@ nv40_graph_init(struct drm_device *dev) /* No context present currently */ NV_WRITE(NV40_PGRAPH_CTXCTL_CUR, 0x00000000); - NV_WRITE(NV03_PGRAPH_INTR_EN, 0x00000000); NV_WRITE(NV03_PGRAPH_INTR , 0xFFFFFFFF); + NV_WRITE(NV40_PGRAPH_INTR_EN, 0xFFFFFFFF); NV_WRITE(NV04_PGRAPH_DEBUG_0, 0xFFFFFFFF); NV_WRITE(NV04_PGRAPH_DEBUG_0, 0x00000000); diff --git a/shared-core/nv40_mc.c b/shared-core/nv40_mc.c index 8bb6b083..c7db9023 100644 --- a/shared-core/nv40_mc.c +++ b/shared-core/nv40_mc.c @@ -14,8 +14,6 @@ nv40_mc_init(struct drm_device *dev) */ NV_WRITE(NV03_PMC_ENABLE, 0xFFFFFFFF); - NV_WRITE(NV03_PMC_INTR_EN_0, 0); - switch (dev_priv->chipset) { case 0x44: case 0x46: /* G72 */ diff --git a/shared-core/nv50_fifo.c b/shared-core/nv50_fifo.c index a5e79260..f915d332 100644 --- a/shared-core/nv50_fifo.c +++ b/shared-core/nv50_fifo.c @@ -120,6 +120,17 @@ nv50_fifo_init_reset(struct drm_device *dev) } static void +nv50_fifo_init_intr(struct drm_device *dev) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + + DRM_DEBUG("\n"); + + NV_WRITE(NV03_PFIFO_INTR_0, 0xFFFFFFFF); + NV_WRITE(NV03_PFIFO_INTR_EN_0, 0xFFFFFFFF); +} + +static void nv50_fifo_init_context_table(struct drm_device *dev) { int i; @@ -190,6 +201,7 @@ nv50_fifo_init(struct drm_device *dev) dev_priv->Engine.fifo.priv = priv; nv50_fifo_init_reset(dev); + nv50_fifo_init_intr(dev); if ((ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0, (128+2)*4, 0x1000, NVOBJ_FLAG_ZERO_ALLOC, diff --git a/shared-core/nv50_graph.c b/shared-core/nv50_graph.c index 59c8cfeb..f98fe601 100644 --- a/shared-core/nv50_graph.c +++ b/shared-core/nv50_graph.c @@ -45,6 +45,16 @@ nv50_graph_init_reset(struct drm_device *dev) } static void +nv50_graph_init_intr(struct drm_device *dev) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + + DRM_DEBUG("\n"); + NV_WRITE(NV03_PGRAPH_INTR, 0xffffffff); + NV_WRITE(NV40_PGRAPH_INTR_EN, 0xffffffff); +} + +static void nv50_graph_init_regs__nv(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; @@ -59,7 +69,6 @@ nv50_graph_init_regs__nv(struct drm_device *dev) NV_WRITE(0x402000, 0xc0000000); NV_WRITE(0x400108, 0xffffffff); - NV_WRITE(0x400100, 0xffffffff); NV_WRITE(0x400824, 0x00004000); NV_WRITE(0x400500, 0x00010001); @@ -174,6 +183,7 @@ nv50_graph_init(struct drm_device *dev) DRM_DEBUG("\n"); nv50_graph_init_reset(dev); + nv50_graph_init_intr(dev); nv50_graph_init_regs__nv(dev); nv50_graph_init_regs(dev); nv50_graph_init_ctxctl(dev); diff --git a/shared-core/nv50_mc.c b/shared-core/nv50_mc.c index 952dea9f..b111826b 100644 --- a/shared-core/nv50_mc.c +++ b/shared-core/nv50_mc.c @@ -34,6 +34,7 @@ nv50_mc_init(struct drm_device *dev) struct drm_nouveau_private *dev_priv = dev->dev_private; NV_WRITE(NV03_PMC_ENABLE, 0xFFFFFFFF); + return 0; } |