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authorRoland Scheidegger <zak@ZakTower.(none)>2006-09-20 19:44:57 +0200
committerRoland Scheidegger <zak@ZakTower.(none)>2006-09-20 19:44:57 +0200
commit1f71b8d7a456fe3ec4bfc2fed70b7420cdd0d55a (patch)
tree7ba28111ee606ab2a38699546b84c79dd96a121f
parentef98a8e20dad8ae7e38f397d63c13bd24105ce53 (diff)
do a TCL state flush before accessing VAP_CNTL to prevent lockups on r200 when enabling/disabling vertex programs
-rw-r--r--shared-core/radeon_state.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/shared-core/radeon_state.c b/shared-core/radeon_state.c
index 5b1ca539..b4478019 100644
--- a/shared-core/radeon_state.c
+++ b/shared-core/radeon_state.c
@@ -174,6 +174,14 @@ static __inline__ int radeon_check_and_fixup_packets(drm_radeon_private_t *
}
break;
+ case R200_EMIT_VAP_CTL: {
+ RING_LOCALS;
+ BEGIN_RING(2);
+ OUT_RING_REG(RADEON_SE_TCL_STATE_FLUSH, 0);
+ ADVANCE_RING();
+ }
+ break;
+
case RADEON_EMIT_RB3D_COLORPITCH:
case RADEON_EMIT_RE_LINE_PATTERN:
case RADEON_EMIT_SE_LINE_WIDTH:
@@ -201,7 +209,6 @@ static __inline__ int radeon_check_and_fixup_packets(drm_radeon_private_t *
case R200_EMIT_TCL_LIGHT_MODEL_CTL_0:
case R200_EMIT_TFACTOR_0:
case R200_EMIT_VTX_FMT_0:
- case R200_EMIT_VAP_CTL:
case R200_EMIT_MATRIX_SELECT_0:
case R200_EMIT_TEX_PROC_CTL_2:
case R200_EMIT_TCL_UCP_VERT_BLEND_CTL: