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authorBen Skeggs <skeggsb@gmail.com>2007-08-22 13:23:49 +1000
committerBen Skeggs <skeggsb@gmail.com>2007-08-22 13:23:49 +1000
commit11c46afe7599cf3cefd30a7e55325a1a1aa8e5ba (patch)
tree4d73b37a70dc29550bb0862c02b2d22242b8af23
parenta654c0341a7892307522ed6e7f4518cc7e28a99e (diff)
nouveau/nv40: Preserve other bits in 0x400304/0x400310 like NVIDIA do.
-rw-r--r--shared-core/nv40_graph.c16
1 files changed, 11 insertions, 5 deletions
diff --git a/shared-core/nv40_graph.c b/shared-core/nv40_graph.c
index 25ee5c77..26237c7d 100644
--- a/shared-core/nv40_graph.c
+++ b/shared-core/nv40_graph.c
@@ -1293,20 +1293,26 @@ static int
nv40_graph_transfer_context(struct drm_device *dev, uint32_t inst, int save)
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
- uint32_t old_cp, tv = 1000;
+ uint32_t old_cp, tv = 1000, tmp;
int i;
old_cp = NV_READ(NV20_PGRAPH_CHANNEL_CTX_POINTER);
NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_POINTER, inst);
- NV_WRITE(NV40_PGRAPH_CTXCTL_0310,
- save ? NV40_PGRAPH_CTXCTL_0310_XFER_SAVE :
- NV40_PGRAPH_CTXCTL_0310_XFER_LOAD);
- NV_WRITE(NV40_PGRAPH_CTXCTL_0304, NV40_PGRAPH_CTXCTL_0304_XFER_CTX);
+
+ tmp = NV_READ(NV40_PGRAPH_CTXCTL_0310);
+ tmp |= save ? NV40_PGRAPH_CTXCTL_0310_XFER_SAVE :
+ NV40_PGRAPH_CTXCTL_0310_XFER_LOAD;
+ NV_WRITE(NV40_PGRAPH_CTXCTL_0310, tmp);
+
+ tmp = NV_READ(NV40_PGRAPH_CTXCTL_0304);
+ tmp |= NV40_PGRAPH_CTXCTL_0304_XFER_CTX;
+ NV_WRITE(NV40_PGRAPH_CTXCTL_0304, tmp);
for (i = 0; i < tv; i++) {
if (NV_READ(NV40_PGRAPH_CTXCTL_030C) == 0)
break;
}
+
NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_POINTER, old_cp);
if (i == tv) {