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-rw-r--r--include/drm/radeon_drm.h2
-rw-r--r--radeon/radeon_surface.c15
2 files changed, 14 insertions, 3 deletions
diff --git a/include/drm/radeon_drm.h b/include/drm/radeon_drm.h
index 86cef15d..d1bebf5a 100644
--- a/include/drm/radeon_drm.h
+++ b/include/drm/radeon_drm.h
@@ -1004,4 +1004,6 @@ struct drm_radeon_info {
#define SI_TILE_MODE_DEPTH_STENCIL_2D_4AA 3
#define SI_TILE_MODE_DEPTH_STENCIL_2D_8AA 2
+#define CIK_TILE_MODE_DEPTH_STENCIL_1D 5
+
#endif
diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c
index 818e26a9..1710e344 100644
--- a/radeon/radeon_surface.c
+++ b/radeon/radeon_surface.c
@@ -1382,10 +1382,16 @@ static int si_surface_sanity(struct radeon_surface_manager *surf_man,
break;
case RADEON_SURF_MODE_1D:
if (surf->flags & RADEON_SURF_SBUFFER) {
- *stencil_tile_mode = SI_TILE_MODE_DEPTH_STENCIL_1D;
+ if (surf_man->family >= CHIP_BONAIRE)
+ *stencil_tile_mode = CIK_TILE_MODE_DEPTH_STENCIL_1D;
+ else
+ *stencil_tile_mode = SI_TILE_MODE_DEPTH_STENCIL_1D;
}
if (surf->flags & RADEON_SURF_ZBUFFER) {
- *tile_mode = SI_TILE_MODE_DEPTH_STENCIL_1D;
+ if (surf_man->family >= CHIP_BONAIRE)
+ *tile_mode = CIK_TILE_MODE_DEPTH_STENCIL_1D;
+ else
+ *tile_mode = SI_TILE_MODE_DEPTH_STENCIL_1D;
} else if (surf->flags & RADEON_SURF_SCANOUT) {
*tile_mode = SI_TILE_MODE_COLOR_1D_SCANOUT;
} else {
@@ -1643,7 +1649,10 @@ static int si_surface_init_2d(struct radeon_surface_manager *surf_man,
tile_mode = SI_TILE_MODE_COLOR_1D_SCANOUT;
break;
case SI_TILE_MODE_DEPTH_STENCIL_2D:
- tile_mode = SI_TILE_MODE_DEPTH_STENCIL_1D;
+ if (surf_man->family >= CHIP_BONAIRE)
+ tile_mode = CIK_TILE_MODE_DEPTH_STENCIL_1D;
+ else
+ tile_mode = SI_TILE_MODE_DEPTH_STENCIL_1D;
break;
default:
return -EINVAL;