diff options
author | Maarten Lankhorst <maarten.lankhorst@canonical.com> | 2014-07-31 15:07:27 +0200 |
---|---|---|
committer | Maarten Lankhorst <maarten.lankhorst@canonical.com> | 2014-08-04 09:36:05 +0200 |
commit | 07fead4462b2d537d0c3cae69a09272fc426c598 (patch) | |
tree | 63ff0e50da2cc97b5693ee1be9c453d240bbb107 /intel/intel_bufmgr.c | |
parent | 58ce9d6292c7033ff76bb2ef35da0e4c36de2389 (diff) |
intel: Use symbol visibility.
No exports changed for this driver.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'intel/intel_bufmgr.c')
-rw-r--r-- | intel/intel_bufmgr.c | 93 |
1 files changed, 56 insertions, 37 deletions
diff --git a/intel/intel_bufmgr.c b/intel/intel_bufmgr.c index 905556f6..03dba503 100644 --- a/intel/intel_bufmgr.c +++ b/intel/intel_bufmgr.c @@ -37,6 +37,7 @@ #include <drm.h> #include <i915_drm.h> #include <pciaccess.h> +#include "libdrm.h" #include "intel_bufmgr.h" #include "intel_bufmgr_priv.h" #include "xf86drm.h" @@ -46,21 +47,21 @@ * Convenience functions for buffer management methods. */ -drm_intel_bo *drm_intel_bo_alloc(drm_intel_bufmgr *bufmgr, const char *name, - unsigned long size, unsigned int alignment) +drm_public drm_intel_bo * +drm_intel_bo_alloc(drm_intel_bufmgr *bufmgr, const char *name, + unsigned long size, unsigned int alignment) { return bufmgr->bo_alloc(bufmgr, name, size, alignment); } -drm_intel_bo *drm_intel_bo_alloc_for_render(drm_intel_bufmgr *bufmgr, - const char *name, - unsigned long size, - unsigned int alignment) +drm_public drm_intel_bo * +drm_intel_bo_alloc_for_render(drm_intel_bufmgr *bufmgr, const char *name, + unsigned long size, unsigned int alignment) { return bufmgr->bo_alloc_for_render(bufmgr, name, size, alignment); } -drm_intel_bo * +drm_public drm_intel_bo * drm_intel_bo_alloc_tiled(drm_intel_bufmgr *bufmgr, const char *name, int x, int y, int cpp, uint32_t *tiling_mode, unsigned long *pitch, unsigned long flags) @@ -69,12 +70,14 @@ drm_intel_bo_alloc_tiled(drm_intel_bufmgr *bufmgr, const char *name, tiling_mode, pitch, flags); } -void drm_intel_bo_reference(drm_intel_bo *bo) +drm_public void +drm_intel_bo_reference(drm_intel_bo *bo) { bo->bufmgr->bo_reference(bo); } -void drm_intel_bo_unreference(drm_intel_bo *bo) +drm_public void +drm_intel_bo_unreference(drm_intel_bo *bo) { if (bo == NULL) return; @@ -82,24 +85,26 @@ void drm_intel_bo_unreference(drm_intel_bo *bo) bo->bufmgr->bo_unreference(bo); } -int drm_intel_bo_map(drm_intel_bo *buf, int write_enable) +drm_public int +drm_intel_bo_map(drm_intel_bo *buf, int write_enable) { return buf->bufmgr->bo_map(buf, write_enable); } -int drm_intel_bo_unmap(drm_intel_bo *buf) +drm_public int +drm_intel_bo_unmap(drm_intel_bo *buf) { return buf->bufmgr->bo_unmap(buf); } -int +drm_public int drm_intel_bo_subdata(drm_intel_bo *bo, unsigned long offset, unsigned long size, const void *data) { return bo->bufmgr->bo_subdata(bo, offset, size, data); } -int +drm_public int drm_intel_bo_get_subdata(drm_intel_bo *bo, unsigned long offset, unsigned long size, void *data) { @@ -118,24 +123,26 @@ drm_intel_bo_get_subdata(drm_intel_bo *bo, unsigned long offset, return 0; } -void drm_intel_bo_wait_rendering(drm_intel_bo *bo) +drm_public void +drm_intel_bo_wait_rendering(drm_intel_bo *bo) { bo->bufmgr->bo_wait_rendering(bo); } -void drm_intel_bufmgr_destroy(drm_intel_bufmgr *bufmgr) +drm_public void +drm_intel_bufmgr_destroy(drm_intel_bufmgr *bufmgr) { bufmgr->destroy(bufmgr); } -int +drm_public int drm_intel_bo_exec(drm_intel_bo *bo, int used, drm_clip_rect_t * cliprects, int num_cliprects, int DR4) { return bo->bufmgr->bo_exec(bo, used, cliprects, num_cliprects, DR4); } -int +drm_public int drm_intel_bo_mrb_exec(drm_intel_bo *bo, int used, drm_clip_rect_t *cliprects, int num_cliprects, int DR4, unsigned int rings) @@ -155,17 +162,20 @@ drm_intel_bo_mrb_exec(drm_intel_bo *bo, int used, } } -void drm_intel_bufmgr_set_debug(drm_intel_bufmgr *bufmgr, int enable_debug) +drm_public void +drm_intel_bufmgr_set_debug(drm_intel_bufmgr *bufmgr, int enable_debug) { bufmgr->debug = enable_debug; } -int drm_intel_bufmgr_check_aperture_space(drm_intel_bo ** bo_array, int count) +drm_public int +drm_intel_bufmgr_check_aperture_space(drm_intel_bo ** bo_array, int count) { return bo_array[0]->bufmgr->check_aperture_space(bo_array, count); } -int drm_intel_bo_flink(drm_intel_bo *bo, uint32_t * name) +drm_public int +drm_intel_bo_flink(drm_intel_bo *bo, uint32_t * name) { if (bo->bufmgr->bo_flink) return bo->bufmgr->bo_flink(bo, name); @@ -173,7 +183,7 @@ int drm_intel_bo_flink(drm_intel_bo *bo, uint32_t * name) return -ENODEV; } -int +drm_public int drm_intel_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset, drm_intel_bo *target_bo, uint32_t target_offset, uint32_t read_domains, uint32_t write_domain) @@ -184,7 +194,7 @@ drm_intel_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset, } /* For fence registers, not GL fences */ -int +drm_public int drm_intel_bo_emit_reloc_fence(drm_intel_bo *bo, uint32_t offset, drm_intel_bo *target_bo, uint32_t target_offset, uint32_t read_domains, uint32_t write_domain) @@ -195,7 +205,8 @@ drm_intel_bo_emit_reloc_fence(drm_intel_bo *bo, uint32_t offset, } -int drm_intel_bo_pin(drm_intel_bo *bo, uint32_t alignment) +drm_public int +drm_intel_bo_pin(drm_intel_bo *bo, uint32_t alignment) { if (bo->bufmgr->bo_pin) return bo->bufmgr->bo_pin(bo, alignment); @@ -203,7 +214,8 @@ int drm_intel_bo_pin(drm_intel_bo *bo, uint32_t alignment) return -ENODEV; } -int drm_intel_bo_unpin(drm_intel_bo *bo) +drm_public int +drm_intel_bo_unpin(drm_intel_bo *bo) { if (bo->bufmgr->bo_unpin) return bo->bufmgr->bo_unpin(bo); @@ -211,8 +223,9 @@ int drm_intel_bo_unpin(drm_intel_bo *bo) return -ENODEV; } -int drm_intel_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, - uint32_t stride) +drm_public int +drm_intel_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, + uint32_t stride) { if (bo->bufmgr->bo_set_tiling) return bo->bufmgr->bo_set_tiling(bo, tiling_mode, stride); @@ -221,8 +234,9 @@ int drm_intel_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, return 0; } -int drm_intel_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, - uint32_t * swizzle_mode) +drm_public int +drm_intel_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, + uint32_t * swizzle_mode) { if (bo->bufmgr->bo_get_tiling) return bo->bufmgr->bo_get_tiling(bo, tiling_mode, swizzle_mode); @@ -232,40 +246,46 @@ int drm_intel_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, return 0; } -int drm_intel_bo_disable_reuse(drm_intel_bo *bo) +drm_public int +drm_intel_bo_disable_reuse(drm_intel_bo *bo) { if (bo->bufmgr->bo_disable_reuse) return bo->bufmgr->bo_disable_reuse(bo); return 0; } -int drm_intel_bo_is_reusable(drm_intel_bo *bo) +drm_public int +drm_intel_bo_is_reusable(drm_intel_bo *bo) { if (bo->bufmgr->bo_is_reusable) return bo->bufmgr->bo_is_reusable(bo); return 0; } -int drm_intel_bo_busy(drm_intel_bo *bo) +drm_public int +drm_intel_bo_busy(drm_intel_bo *bo) { if (bo->bufmgr->bo_busy) return bo->bufmgr->bo_busy(bo); return 0; } -int drm_intel_bo_madvise(drm_intel_bo *bo, int madv) +drm_public int +drm_intel_bo_madvise(drm_intel_bo *bo, int madv) { if (bo->bufmgr->bo_madvise) return bo->bufmgr->bo_madvise(bo, madv); return -1; } -int drm_intel_bo_references(drm_intel_bo *bo, drm_intel_bo *target_bo) +drm_public int +drm_intel_bo_references(drm_intel_bo *bo, drm_intel_bo *target_bo) { return bo->bufmgr->bo_references(bo, target_bo); } -int drm_intel_get_pipe_from_crtc_id(drm_intel_bufmgr *bufmgr, int crtc_id) +drm_public int +drm_intel_get_pipe_from_crtc_id(drm_intel_bufmgr *bufmgr, int crtc_id) { if (bufmgr->get_pipe_from_crtc_id) return bufmgr->get_pipe_from_crtc_id(bufmgr, crtc_id); @@ -298,9 +318,8 @@ err: return size; } -int drm_intel_get_aperture_sizes(int fd, - size_t *mappable, - size_t *total) +drm_public int +drm_intel_get_aperture_sizes(int fd, size_t *mappable, size_t *total) { struct drm_i915_gem_get_aperture aperture; |