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diff --git a/content.tex b/content.tex index aa191a3..0aed373 100644 --- a/content.tex +++ b/content.tex @@ -844,8 +844,12 @@ These regions contain the virtio header registers, the notification register, th ISR status register and device specific registers, as specified by Virtio Structure PCI Capabilities. -There may be different widths of accesses to the I/O region; the driver -MUST access each field using the “natural” access method (i.e. 32-bit accesses for 32-bit fields, etc). All multi-byte fields are little-endian. +Fields of different sizes are present in the device +configuration regions; the driver +MUST access each field using the “natural” access method, i.e. +32-bit accesses for 32-bit fields, 16-bit accesses for 16-bit +fields and 8-bit accesses for 8-bit fields. +All 32-bit and 16-bit fields are little-endian. \subsection{Virtio Structure PCI Capabilities}\label{sec:Virtio Transport Options / Virtio Over PCI Bus / Virtio Structure PCI Capabilities} |