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authorrusty <rusty@0c8fb4dd-22a2-4bb5-bc14-6c75a5f43652>2014-02-11 00:14:24 +0000
committerrusty <rusty@0c8fb4dd-22a2-4bb5-bc14-6c75a5f43652>2014-02-11 00:14:24 +0000
commit4870127cb418abceb6eb379f1a509d2ee796f48a (patch)
tree965d982261c2e394973a75dcedca31dbed20a464 /feedback/8.txt
parent5840d9b315e5283a71f78622b2e8f39af1bf2a4f (diff)
Feedback: fix formatting typo.
Signed-off-by: Rusty Russell <rusty@au1.ibm.com> git-svn-id: https://tools.oasis-open.org/version-control/svn/virtio@228 0c8fb4dd-22a2-4bb5-bc14-6c75a5f43652
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diff --git a/feedback/8.txt b/feedback/8.txt
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+++ b/feedback/8.txt
@@ -78,12 +78,12 @@ index 2adc393..d6c2591 100644
-The virtio device configuration layout includes a common configuration header, notification area, ISR status area and a device-specific configuration area.
+The virtio device configuration layout includes several structures:
-+\begin{item}
++\begin{itemize}
+\item Common configuration
+\item Notifications
+\item ISR Status
+\item Device-specific configuration (optional)
-+\end{item}
++\end{itemize}
Each structure can be mapped by a Base Address register (BAR) belonging to
the function, or accessed via the special VIRTIO_PCI_CAP_PCI_CFG field in the PCI configuration space.