diff options
| author | rusty <rusty@0c8fb4dd-22a2-4bb5-bc14-6c75a5f43652> | 2014-02-26 03:16:21 +0000 |
|---|---|---|
| committer | rusty <rusty@0c8fb4dd-22a2-4bb5-bc14-6c75a5f43652> | 2014-02-26 03:16:21 +0000 |
| commit | fe9ec9c8c3d90c225416d62cc9c2a9b5cb09336c (patch) | |
| tree | 41e54c54857b4d20e4b98e4763dfaa7ba8f09a34 | |
| parent | e6d2600ce1363d2abb47239b059d7deb6b9fe37a (diff) | |
feedback: minor wording cleanups
We already mention requirement for natural width
accesses for non device specific configuration.
Don't repeat this in legacy section.
Further, mention virtio pci structure in
preamble to help link sections together.
Cc: Arun Subbarao <asubbarao@lnxw.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Conflicts:
content.tex
git-svn-id: https://tools.oasis-open.org/version-control/svn/virtio@254 0c8fb4dd-22a2-4bb5-bc14-6c75a5f43652
| -rw-r--r-- | content.tex | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/content.tex b/content.tex index 0172c58..797e8f2 100644 --- a/content.tex +++ b/content.tex @@ -838,10 +838,7 @@ any Revision ID value. The device is configured via I/O and/or memory regions (though see \ref{sec:Virtio Transport Options / Virtio Over PCI Bus / PCI Device Layout / PCI configuration access capability} -for access via the PCI configuration space). - -These regions contain the virtio header registers, the notification register, the -ISR status register and device specific registers, as specified by Virtio +for access via the PCI configuration space), as specified by Virtio Structure PCI Capabilities. Fields of different sizes are present in the device |