09:05 < wsa> so, let's start the IO meeting
09:06 < wsa> first collected updates, then questions
09:06 < wsa> Status updates
09:06 < wsa> ==============
09:06 < wsa> A - what have I done since last time
09:06 < wsa> ------------------------------------
09:06 < wsa> Geert
09:06 < wsa> : fixed QEMU SCIF emulation with Linux v4.11-rc1+ and SCIF regressions due to
09:06 < wsa>   RZ/A2 support.
09:06 < wsa> Kaneko-san
09:06 < wsa> : works on D3 MSIOF upporting.
09:06 < wsa> Marek
09:06 < wsa> : has revisited PCIe L0s/L1 handling on Gen3 in Linux.
09:06 < wsa> Niklas
09:06 < wsa> : sent a new version of the SCC error patches and first version of ES handling
09:06 < wsa>   for SDHI. Also worked into SDHI tuning and sorted out more patches for
09:06 < wsa>   upporting.
09:06 < wsa> Shimoda-san
09:06 < wsa> : fixed ep0 for USB3 UDC SuperSpeed and upported PWM support for r8a77990.
09:06 < wsa> Ulrich
09:06 < wsa> : tested QEMU SCIF FIFO timeout fix.
09:06 < wsa> Wolfram
09:06 < wsa> : upported more SATA patches and a reworked version of I2C REP_START generation,
09:06 < wsa>   reviewed Niklas' various SDHI series, tested SDR104 on Gen3, discussed SDHI
09:06 < wsa>   feedback from the HW team, focalized an upstream discussion about I2C transfers
09:06 < wsa>   with disabled irq, and worked on a needed DMA safe buffer API update.
09:06 < wsa> B - what I want to do until next time
09:06 < wsa> -------------------------------------
09:06 < wsa> Kaneko-san
09:06 < wsa> : wants to continue D3 MSIOF upporting.
09:06 < wsa> Niklas
09:06 < wsa> : wants to keep on upporting SDHI patches and act on the responses we got from
09:06 < wsa>   the HW team.
09:06 < wsa> Shimoda-san
09:06 < wsa> : wants to ping HW team to get USB unknown things and modify USB2 PHY for E3
09:06 < wsa>   accordingly, and continue to learn KVM (and virtualization) with USB host.
09:06 < wsa> Simon
09:06 < wsa> : wants to revisit RAVB upporting candidates.
09:06 < wsa> Ulrich
09:06 < wsa> : wants to implement checks for other SCIF error flags.
09:06 < wsa> Wolfram
09:06 < wsa> : wants to upstream SDR104 on Gen3, finish the DMA safe buffer API, recheck
09:06 < wsa>   the watchdog task mentioned by Shimoda-san, check Yamada-san's patches
09:06 < wsa>   for SDHI, and reactivate the work on I2C core PM improvements.
09:06 < wsa> C - problems I currently have
09:06 < wsa> -----------------------------
09:06 < wsa> Geert
09:06 < wsa> : mentions the SCIF driver is very fragile.
09:06 < wsa> Shimoda-san
09:06 < wsa> : is blocked on some USB tasks because of waiting for answers from the HW team.
09:06 < wsa> Topics
09:06 < wsa> ======
09:06 < wsa> Holidays
09:06 < wsa> --------
09:06 < wsa> The following people have holidays the next week.
09:06 < wsa> * Geert
09:06 < wsa> * Niklas
09:06 < wsa> * Shimoda-san
09:06 < wsa> * Simon
09:06 < wsa> Next meeting
09:06 < wsa> ============
09:06 < wsa> 2018-08-23, 09:00 CEST, 16:00 JST
09:07 < wsa> please double check and ask if you have questions
09:07 < wsa> my questions:
09:07 < wsa> Marex: what does "revisited PCIe L0s/L1 handling" mean? did you get the errata docs now?
09:09 < Marex> wsa: nope, I didnt find any
09:09 < Marex> wsa: I poked the ML thread since I was getting nothing there either
09:09 < wsa> maybe it is an idea to ask the HW team about it?
09:10 < Marex> wsa: yes
09:10 < wsa> I have limited hopes we get useful information out of that mail thread in time
09:11 < Marex> wsa: pretty much ... the discussion went somewhat off-topic, but Bjorn seemed to be quite helpful, so I'll check with him on IRC too
09:12 < wsa> good idea, too
09:12 < wsa> thanks!
09:12 < Marex> np
09:13 < wsa> that's mainly it, I think
09:14 < wsa> not super much happening at the moment, because people are busy with other things (LTSI) or enjoy the summer
09:14 < Marex> wsa: the summer that's roasting everyone, yeah
09:15 < Marex> wsa: I was barely able to do anything in the last month or so due to the heat
09:15 < Marex> wsa: it's getting better now
09:16 < wsa> so, questions from your side?
09:16 < wsa> JapaPERI maybe?
09:17 < shimoda> nothing from my side
09:17 < wsa> one word about my SDR104 results: transfer rates on M3N are awesom, H3 ES2.0 are terrible :/
09:17 < wsa> "awesome"
09:17 < Marex> wsa: SDR104 with SD card in the full-sized slots ?
09:17 < wsa> yes
09:18 < Marex> wsa: same exact card I presume ?
09:18 < wsa> yes
09:18 < wsa> M3N is > 60MB/s, H3 is ~10MB/s
09:18 < shimoda> it's depends on swiotlb?
09:19 < shimoda> M3N don't use swiotlb because it has 1GiB
09:19 < wsa> oh, that might be a pointer. Totally forgot about that...
09:19 < geertu> Sho it should improve when booted with mem=1G?
09:19 < shimoda> oh, i think H3 seems terrible too..
09:20 < geertu> ... or when enabling the IOMMU? ;-)
09:20 < shimoda> geertu: yeah, but should be 768M instead of 1G because all soc reserves 128M
09:21 < shimoda> or 256M
09:21 < wsa> I will play with all that
09:21 < geertu> shimoda: right, thx!
09:21 < horms> wsa: I also noticed "awesome" on M3-N, fwiiw
09:22 < wsa> horms: I think I never had >60MB/s with any other board so far...
09:22  * geertu is always confused by awesome and awful
09:22 < horms> yeah, something like that for me too
09:23 < Marex> wsa: you can also always check how the card behaves in U-Boot on that platform, it supports sdr104
09:24 < wsa> Marex: true
09:24 < horms> geertu: its like chotto vs chou. Sometimes they are the opposite, sometimes they are the same. For extra fun the latter is a homoniem
09:24 < wsa> although it is more how the board behaves ;)
09:25 < wsa> so, i think we are done?
09:25 < wsa> summer influences also the meeting time...
09:26 < wsa> geertu: shall we continue with core right away or have a short break?
09:27 < wsa> anyway, thanks for this meeting everyone!
09:27 < wsa> enjoy your time!