title: S4; enable IO devices for r8a779f0
team: IO
key: 96783090-d6a7-11ec-857c-172fbeb15dc7
assignee: Wolfram
status: Active

upstream:
 - next: 78516a12d7428176015997f655b4990112563ad3 # [PATCH v3 1/2] dt-bindings: thermal: rcar-gen3-thermal: use positive logic
 - next: 4768f717d85c67c5158331c6b6bc661994462948 # [PATCH v3 2/2] dt-bindings: thermal: rcar-gen3-thermal: Add r8a779f0 support
 - next: 61a6737fcad8810258bdf1329f063b58ac27b230 # [PATCH] clk: renesas: r8a779f0: Add thermal clock
 - lore: 20220525151216.24133-1-wsa+renesas@sang-engineering.com # [PATCH 1/2] thermal: rcar_gen3_thermal: Add r8a779f0 support
 - next: 3be4812d6594b2844c305521056c118cdba9dac1 # [PATCH v3] thermal: rcar_gen3_thermal: improve logging during probe
 - next: 5a3ad6f466fe7a187cbf4889d80a48606181c367 # [PATCH] arm64: dts: renesas: r8a779f0: Add thermal support

 - next: aeb0965fb9f3dc767c953625f4427016902a2741 # mmc: renesas_sdhi: add R-Car Gen4 fallback compatibility string
 - next: 53c6fc29fcaab0c24a48c7cc0f0e48df558719c8 # dt-bindings: mmc: renesas,sdhi: Document R-Car S4-8 and generic Gen4 support
 - next: 75fe45a000a70ea35e2071eb7f8b873648590982 # [PATCH] clk: renesas: r8a779f0: Add SDHI0 clock
 - lore: 20220603233928.22004-1-wsa+renesas@sang-engineering.com # [PATCH] arm64: dts: renesas: r8a779f0: Add SDHI0 support
 - next: f541b792424ae52f3023f1050301e22558712c43 # [PATCH] dt-bindings: mmc: renesas,sdhi: R-Car V3U is R-Car Gen4
 - next: 2c02c2451f76e65bb9edf9fb2e7b056219b9d9d4 # [PATCH] dt-bindings: mmc: renesas,sdhi: Add R-Car Gen4 clock requirements

 - next: 080bcd8d5997b1a615e17cab02bd9d16d1d4fbf3 # [PATCH v2] clk: renesas: r8a779f0: Add HSCIF clocks
 - lore: 20220613131007.10027-1-wsa+renesas@sang-engineering.com # [PATCH] dt-bindings: serial: renesas,hscif: Document r8a779f0 bindings
 - next: 01a787f78bfd156d61b1844155f1dc4910e446c0 # [PATCH v2] arm64: dts: renesas: r8a779f0: Add HSCIF nodes
 - lore: 20220613131033.10053-2-wsa+renesas@sang-engineering.com # [PATCH 2/2] arm64: dts: renesas: spider-cpu: Switch from SCIF3 to HSCIF0
 - next: c62872a6893ffdc38890b00d98d6bab2fce81d2f # [PATCH 1/3] arm64: dts: renesas: r8a779f0: Add DMA properties to SCIF3
 - next: 40753144256b63b4e3fb9d80874605dda16ad713 # [PATCH v2] arm64: dts: renesas: r8a779f0: Add SCIF nodes
 - lore: 20220613134914.18655-3-wsa+renesas@sang-engineering.com # [PATCH 3/3] arm64: dts: renesas: spider-cpu: Enable SCIF0 on second connector

comments:
 - CMT0/1
  - prototype patches exist, clocksouce-switch test fails for CMT3, needs investigation

 - HSCIF
  - HSCIF 0+1 can be muxed to FTDI chips, HSCIF3 to MSIOF headers using an external FTDI, HSCIF2 maybe via unpopulated I2C header
  - all HSCIFs could be tested, patches sent

 - MSIOF

 - RPC
  - not for upstream because RPC shall only be accessed via OPTEE. See BSP commit 1f83a133b853138fad712d0a08a7689aac1e0183 ("Disable SPI flash via RPC")
  - done

 - SCIF
  - SCIF 0+3 can be muxed to FTDI chips, SCIF1 to MSIOF headers using an external FTDI, SCIF4 maybe via unpopulated I2C header
  - all SCIFs could be tested, patches sent

 - SD/MMC
  - eMMC enabled and works, microSD enabled but still needs testing
  - first patches sent, only final DTS addition kept until testing is done
  - SD0H support was missing, resend needed
  - eMMC works but is too slow compared to BSP, investigation needed
  - microSD fails the same way the BSP does
  - Shimoda-san researched that this is because SW6 needs to select the proper voltage
  - SW is under the heat sink, though. So, for upstream only eMMC is desired

 - THS/CIVM
  - first version sent
  - patch to improve logging needed more versions but we now came to a conclusion
  - binding documentation needed more versions to handle the differences between all SoCs

 - TMU
  - probably possible; pinmux to TCLK1-4 and check via non-populated I2C header on breakout board

 - all other devices are in the control domain which we do not handle. Only the application domain is our job.
  - for a domain overview, check '001_R-CarS4_Bus Architecture_Rev0p70.pptx' (attachment in the S4 docs)