From 504b5efde184719e4e5c332405cf9ca930162d14 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 11 Nov 2021 13:45:02 +0100 Subject: projects: linux: io: updates up to W45 Signed-off-by: Wolfram Sang --- projects/linux/io/SDHI-refactor-SDHn.yaml | 1 + projects/linux/io/TPU-proper-duty-cycle.yaml | 14 ++++++++++ projects/linux/io/V3U-enable_PWM.yaml | 24 ----------------- projects/linux/io/V3U-enable_RPC.yaml | 4 --- projects/linux/io/V3U-enable_TPU.yaml | 39 ---------------------------- projects/linux/io/done/V3U-enable_PWM.yaml | 21 +++++++++++++++ projects/linux/io/done/V3U-enable_TPU.yaml | 32 +++++++++++++++++++++++ 7 files changed, 68 insertions(+), 67 deletions(-) create mode 100644 projects/linux/io/TPU-proper-duty-cycle.yaml delete mode 100644 projects/linux/io/V3U-enable_PWM.yaml delete mode 100644 projects/linux/io/V3U-enable_TPU.yaml create mode 100644 projects/linux/io/done/V3U-enable_PWM.yaml create mode 100644 projects/linux/io/done/V3U-enable_TPU.yaml (limited to 'projects/linux/io') diff --git a/projects/linux/io/SDHI-refactor-SDHn.yaml b/projects/linux/io/SDHI-refactor-SDHn.yaml index 0cd55e5..0f47e9d 100644 --- a/projects/linux/io/SDHI-refactor-SDHn.yaml +++ b/projects/linux/io/SDHI-refactor-SDHn.yaml @@ -18,3 +18,4 @@ comments: - "Wolfram has a sketch with two clocks using generic divider and gate combined" - "rfc v1: https://lore.kernel.org/r/20210928200804.50922-1-wsa+renesas@sang-engineering.com" - "rfc v2 in progress; working out details for the DT binding scheme" + - "rfc v2: https://lore.kernel.org/r/20211110191610.5664-1-wsa+renesas@sang-engineering.com" diff --git a/projects/linux/io/TPU-proper-duty-cycle.yaml b/projects/linux/io/TPU-proper-duty-cycle.yaml new file mode 100644 index 0000000..0986387 --- /dev/null +++ b/projects/linux/io/TPU-proper-duty-cycle.yaml @@ -0,0 +1,14 @@ +title: V3U; upport TPU fixes and enable for V3U +team: IO +key: d1945716-439b-11ec-a6f6-73ef622e1a31 +status: New + +bsp41x: + - 18d27c55780cd8ba5a8c08461d73d2162333d818 # pwm: pwm-renesas-tpu: Correct the valid period and duty_cycle + +upstream: + +comments: + - 18d27c55780cd8ba5a8c08461d73d2162333d818 + - v1; https://lore.kernel.org/r/20210915065542.1897-1-wsa+renesas@sang-engineering.com + - got reviewed, needs refactorization diff --git a/projects/linux/io/V3U-enable_PWM.yaml b/projects/linux/io/V3U-enable_PWM.yaml deleted file mode 100644 index f62a781..0000000 --- a/projects/linux/io/V3U-enable_PWM.yaml +++ /dev/null @@ -1,24 +0,0 @@ -title: V3U; upport PWM fixes and enable for V3U -team: IO -key: 73d99160-2805-11ec-8a83-ab141cfec33e -status: Paused - -bsp41x: - - d9dbda2f774c38dd60f3b17b7e3dac11bb0e3a97 # dt-bindings: pwm: Add R-Car V3U device tree bindings - - 73d8a0fb46ab4f822f953ad20e5fbdb5998352c1 # pwm: rcar: Add a judgment of the period out of range - - 91284dd61b7c36fe536d8ad6c473bbc04b4328da # arm64: dts: renesas: r8a779a0: Add PWM nodes - - e9369406a0e148ddf941519ad7c4f54e4c8bdaec # arm64: dts: salvator-common: Enable PWM2 - -upstream: - -comments: - - testing PWM is currently unclear; BSP also doesn't have PWM on Falcon - - the idea was to use the GPIO logic analyzer with sniffing the GPIO input register - - however, unlike other Gen3 SoCs the V3U doesn't allow GPIO sniffing by default - - asking HW team if this can be achieved somehow - - - d9dbda2f774c38dd60f3b17b7e3dac11bb0e3a97, 73d8a0fb46ab4f822f953ad20e5fbdb5998352c1, 91284dd61b7c36fe536d8ad6c473bbc04b4328da - - prototype patches made, only testing needed - - - e9369406a0e148ddf941519ad7c4f54e4c8bdaec - - won't be upported because there are no users on the boards diff --git a/projects/linux/io/V3U-enable_RPC.yaml b/projects/linux/io/V3U-enable_RPC.yaml index 68abcaf..50febf3 100644 --- a/projects/linux/io/V3U-enable_RPC.yaml +++ b/projects/linux/io/V3U-enable_RPC.yaml @@ -6,8 +6,6 @@ assignee: Wolfram bsp41x: - f817442ce56d351a2c69515570ca750edb54622b # memory: renesas-rpc-if: Do not write to reserved bits - - 3612986e5109c4de99cd3f75caf5bf6c756ef0f0 # memory: renesas-rpc-if: Correct data transfer in Manual mode - - 85f41a8a4d61f366d1591516349ba2447a59e06f # Revert "memory: renesas-rpc-if: Correct data transfer in Manual mode" - 0d37f69cacb3343514380ff4a9c271b746959190 # memory: renesas-rpc-if: Correct QSPI data transfer in Manual mode - b587ed1d5e129cc32ab3c69b9489377bf158b9b6 # dt-bindings: rpc: renesas-rpc-if: Add support for the R8A779A0 RPC-IF - e05ce4b3ba724c77bd19f138476dc97d27eba824 # arm64: dts: renesas: r8a779a0: Add RPC-IF node @@ -34,8 +32,6 @@ comments: - Renesas Europe upstreamed G2L support providing additional information - BSP team responded, all information complete now - patch will be created on top of G2L support. We wait for the new version - - 3612986e5109c4de99cd3f75caf5bf6c756ef0f0, 85f41a8a4d61f366d1591516349ba2447a59e06f - - no action needed, they revert each other - 0d37f69cacb3343514380ff4a9c271b746959190 - must be upported before enabling V3U. Otherwise flash memory might get broken, i.e. wrongly fused - very likely must be refactored. The mixture of regmap and direct register writes does not look good diff --git a/projects/linux/io/V3U-enable_TPU.yaml b/projects/linux/io/V3U-enable_TPU.yaml deleted file mode 100644 index 939da88..0000000 --- a/projects/linux/io/V3U-enable_TPU.yaml +++ /dev/null @@ -1,39 +0,0 @@ -title: V3U; upport TPU fixes and enable for V3U -team: IO -key: 5b2c3266-a43a-11eb-8741-bb50e7fa7f92 -status: Active - -bsp41x: - - 18d27c55780cd8ba5a8c08461d73d2162333d818 # pwm: pwm-renesas-tpu: Correct the valid period and duty_cycle - - 65256a77c7c66d338317b5405437e1125c625001 # pwm: tpu: Add a compatible string for r8a779a0 - - c81a1645d1363e371a5a9df8f5b7fe211e195075 # arm64: defconfig: Enable R-Car PWM-TPU by default - - 30f8711382c676d89bcf59f068e764134dbbcc91 # dt-bindings: pwm: tpu: Add R-Car V3U device tree bindings - - 87133703bb5a16ce4285a761ae3bd3f554b4cb45 # arm64: dts: renesas: r8a779a0: Add TPU node - - e3552b314c8c27c57868f38f257ea1a0a0cf66ee # arm64: dts: r8a779a0-falcon: Add TPU support - -upstream: - - torvalds: c6d387612b6659d6ea183cede83bb1635f62d117 # arm64: dts: renesas: r8a77961: Add TPU device node - - torvalds: bdd8b0053f4ff0df889bd849f0789580e9faea3a # arm64: dts: renesas: r8a779a0: Add TPU device node - - torvalds: 3e9dd11db00119001a1d05413f51804a35559956 # arm64: defconfig: Add Renesas TPU as module - -comments: - - TPU can probably be tested using GPIO_CN with the GPIO logic analyzer - - TPU - - testing TPU with GPIO logic analyzer was successful - - 87133703bb5a16ce4285a761ae3bd3f554b4cb45 - - v1; https://patchwork.kernel.org/project/linux-renesas-soc/list/?series=540427&state=* - - merged - - 30f8711382c676d89bcf59f068e764134dbbcc91 - - v1; https://lore.kernel.org/all/20210901090719.35375-1-wsa+renesas@sang-engineering.com/ - - fix m3-w+ while here; https://lore.kernel.org/all/20210906094536.45223-1-wsa+renesas@sang-engineering.com/ - - 65256a77c7c66d338317b5405437e1125c625001 - - not needed. We have the generic fallback - - c81a1645d1363e371a5a9df8f5b7fe211e195075 - - should be changed to M - - v1; https://lore.kernel.org/r/20210915153143.25184-1-wsa+renesas@sang-engineering.com - - merged - - e3552b314c8c27c57868f38f257ea1a0a0cf66ee - - won't be upported because there are no users on the boards - - 18d27c55780cd8ba5a8c08461d73d2162333d818 - - v1; https://lore.kernel.org/r/20210915065542.1897-1-wsa+renesas@sang-engineering.com - - got reviewed, needs refactorization diff --git a/projects/linux/io/done/V3U-enable_PWM.yaml b/projects/linux/io/done/V3U-enable_PWM.yaml new file mode 100644 index 0000000..5b88604 --- /dev/null +++ b/projects/linux/io/done/V3U-enable_PWM.yaml @@ -0,0 +1,21 @@ +title: V3U; upport PWM fixes and enable for V3U +team: IO +key: 73d99160-2805-11ec-8a83-ab141cfec33e +status: Abandoned + +bsp41x: + - d9dbda2f774c38dd60f3b17b7e3dac11bb0e3a97 # dt-bindings: pwm: Add R-Car V3U device tree bindings + - 73d8a0fb46ab4f822f953ad20e5fbdb5998352c1 # pwm: rcar: Add a judgment of the period out of range + - 91284dd61b7c36fe536d8ad6c473bbc04b4328da # arm64: dts: renesas: r8a779a0: Add PWM nodes + +upstream: + +comments: + - testing PWM is currently unclear; BSP also doesn't have PWM on Falcon + - the idea was to use the GPIO logic analyzer with sniffing the GPIO input register + - however, unlike other Gen3 SoCs the V3U doesn't allow GPIO sniffing by default + - asking HW team if this can be achieved somehow + + - d9dbda2f774c38dd60f3b17b7e3dac11bb0e3a97, 73d8a0fb46ab4f822f953ad20e5fbdb5998352c1, 91284dd61b7c36fe536d8ad6c473bbc04b4328da + - prototype patches made, only testing needed + - seems not possible to test, marking abandoned diff --git a/projects/linux/io/done/V3U-enable_TPU.yaml b/projects/linux/io/done/V3U-enable_TPU.yaml new file mode 100644 index 0000000..125ed39 --- /dev/null +++ b/projects/linux/io/done/V3U-enable_TPU.yaml @@ -0,0 +1,32 @@ +title: V3U; upport TPU fixes and enable for V3U +team: IO +key: 5b2c3266-a43a-11eb-8741-bb50e7fa7f92 +status: Done + +bsp41x: + - c81a1645d1363e371a5a9df8f5b7fe211e195075 # arm64: defconfig: Enable R-Car PWM-TPU by default + - 30f8711382c676d89bcf59f068e764134dbbcc91 # dt-bindings: pwm: tpu: Add R-Car V3U device tree bindings + - 87133703bb5a16ce4285a761ae3bd3f554b4cb45 # arm64: dts: renesas: r8a779a0: Add TPU node + +upstream: + - torvalds: c6d387612b6659d6ea183cede83bb1635f62d117 # arm64: dts: renesas: r8a77961: Add TPU device node + - torvalds: bdd8b0053f4ff0df889bd849f0789580e9faea3a # arm64: dts: renesas: r8a779a0: Add TPU device node + - torvalds: 3e9dd11db00119001a1d05413f51804a35559956 # arm64: defconfig: Add Renesas TPU as module + - next: 8aea22fb2d57eb3bcd77631c91f69b6bbdc90821 # dt-bindings: pwm: tpu: Add R-Car V3U device tree bindings + - next: 76c40c220f630f77475c8489f291e32189064e4b # dt-bindings: pwm: tpu: Add R-Car M3-W+ device tree bindings + +comments: + - TPU can probably be tested using GPIO_CN with the GPIO logic analyzer + - TPU + - testing TPU with GPIO logic analyzer was successful + - 87133703bb5a16ce4285a761ae3bd3f554b4cb45 + - v1; https://patchwork.kernel.org/project/linux-renesas-soc/list/?series=540427&state=* + - merged + - 30f8711382c676d89bcf59f068e764134dbbcc91 + - v1; https://lore.kernel.org/all/20210901090719.35375-1-wsa+renesas@sang-engineering.com/ + - fix m3-w+ while here; https://lore.kernel.org/all/20210906094536.45223-1-wsa+renesas@sang-engineering.com/ + - merged + - c81a1645d1363e371a5a9df8f5b7fe211e195075 + - should be changed to M + - v1; https://lore.kernel.org/r/20210915153143.25184-1-wsa+renesas@sang-engineering.com + - merged -- cgit v1.2.3