From bd3a546d6e75ae33064e5d61a9b1df868d586ff6 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Fri, 30 Apr 2021 15:05:47 +0200 Subject: linux: bsp-41x: move SDHI items to proper places Acked-by: Geert Uytterhoeven Signed-off-by: Wolfram Sang --- projects/linux/core/bsp41x_clk_renesas.yaml | 2 -- 1 file changed, 2 deletions(-) (limited to 'projects/linux/core') diff --git a/projects/linux/core/bsp41x_clk_renesas.yaml b/projects/linux/core/bsp41x_clk_renesas.yaml index 4411cc5..02e8a6f 100644 --- a/projects/linux/core/bsp41x_clk_renesas.yaml +++ b/projects/linux/core/bsp41x_clk_renesas.yaml @@ -4,8 +4,6 @@ key: 1641c746-661f-11eb-94be-d3d0dd2f1615 status: New bsp41x: - - 7a967a750a3409554d72d9bc3842722e86703125 # clk: Add support parent clock in set_phase - - 5e0b119a284593bbe5966da6049e2b5272830954 # clk: rcar-gen3: Add set_phase to set SDnCKCR in HS400 - 226e92814ca5b8ea1ce789869cee131c9bc2a819 # clk: renesas: rcar-gen3: Add support ZG clock divider for R8A77990 - 97a8cbaabb27ab9b53c345798e87ff5de155cf94 # clk: renesas: rcar-gen3: Fix revision of R8A7796 for applying SD_SKIP_FIRST - 5a2c795936b78619f1f83ff89846efe7e63be2b3 # clk: renesas: rcar-gen3: Fix SCCG/Clean peripheral clocks definition -- cgit v1.2.3