From b8e3f8b664f95a65249aa497c1bc7b857b3768b1 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 26 Feb 2021 11:57:08 +0100 Subject: projects: linux: core: Mark bsp392_clk_renesas_z_z2_clocks abandoned Equivalents in bsp-41x of remaining commits are tracked in bsp41x_clk_renesas. Signed-off-by: Geert Uytterhoeven Reviewed-by: Yoshihiro Shimoda --- .../linux/core/bsp392_clk_renesas_z_z2_clocks.yaml | 29 ---------------------- .../core/done/bsp392_clk_renesas_z_z2_clocks.yaml | 29 ++++++++++++++++++++++ 2 files changed, 29 insertions(+), 29 deletions(-) delete mode 100644 projects/linux/core/bsp392_clk_renesas_z_z2_clocks.yaml create mode 100644 projects/linux/core/done/bsp392_clk_renesas_z_z2_clocks.yaml (limited to 'projects/linux/core') diff --git a/projects/linux/core/bsp392_clk_renesas_z_z2_clocks.yaml b/projects/linux/core/bsp392_clk_renesas_z_z2_clocks.yaml deleted file mode 100644 index 353138d..0000000 --- a/projects/linux/core/bsp392_clk_renesas_z_z2_clocks.yaml +++ /dev/null @@ -1,29 +0,0 @@ -title: "From bsp392, upport clk: renesas: Z/Z2 clocks" -team: Core -key: 1dfbff49-e680-474d-900b-5d11aa104915 -status: Active -assignee: Simon - -relationships: - -bsp39x: - - 11a8254d0dea1642c4ce369fe3c53f6679a17c8e # clk: renesas: rcar-gen3: Add support Z2 clock divider for R8A77990 - - 1aa84001f1853bd52ac3d72ca425ce8be1b58640 # clk: renesas: rcar-gen3: Add support when frequency does not propagate to parent in z clock divider - - 2b12c11844fa5be38078bec552a6c0ede189292e # clk: renesas: r8a77990: Add Z2 clock - - 3c32d47c96f6b664576a3e34abb35998e4f17789 # clk: renesas: rcar-gen3: Add rounding for Z-clock frequency - - 467ae1aa149ba70ef843a0fda2d6fc64328ab111 # clk: renesas: rcar-gen3: Add PLL clock and update z-clock for propagating frequency to parent - - 9b10ae593028df22d0565002a696ccf5b9751bb4 # clk: renesas: r8a7795: Add division value of z and z2 clock - - aa06410b1a3b130a4b3c09b2de31e47f5f0c4752 # clk: renesas: r8a7796: Add division value of z and z2 clock - - abb24ccb7cfaaa0e3ca80ddd715e77a1c6f6e6d0 # clk: renesas: cpg-mssr: Add DEF_GEN3_Z macro - - dd4aba9be2060071c8d3278719dcb748d210d29b # clk: renesas: rcar-gen3: Add division value argument to cpg_z_clk_register - - f6cd0437d6ec3ef4889f7ffb8a5f696c1b05ac2a # clk: renesas: r8a77965: Add division value of z clock - -upstream: - - torvalds: 10d9ea5100c89afd677a202036e0e34e129a6c52 # clk: renesas: rcar-gen3: Parameterise Z and Z2 clock offset - - torvalds: 20cc05ba04a93f05d6c50789fe35d762a2db4e96 # clk: renesas: rcar-gen3: Parameterise Z and Z2 clock fixed divisor - - torvalds: 787fe096fe42829f3091888835562ffce4d23bff # clk: renesas: r8a77990: Add Z2 clock - -comments: - - "1aa84001f1853bd52ac3d72ca425ce8be1b58640: requested upport with 0ff874dd0f36501e13e30be213c5641db2352237 of BSPv3.6.1" - - "3c32d47c96f6b664576a3e34abb35998e4f17789: This is a local patch file for developers. So we don't need to upport." - - "467ae1aa149ba70ef843a0fda2d6fc64328ab111: We need to upport with refactoring." diff --git a/projects/linux/core/done/bsp392_clk_renesas_z_z2_clocks.yaml b/projects/linux/core/done/bsp392_clk_renesas_z_z2_clocks.yaml new file mode 100644 index 0000000..04aca48 --- /dev/null +++ b/projects/linux/core/done/bsp392_clk_renesas_z_z2_clocks.yaml @@ -0,0 +1,29 @@ +title: "From bsp392, upport clk: renesas: Z/Z2 clocks" +team: Core +key: 1dfbff49-e680-474d-900b-5d11aa104915 +status: Abandoned +assignee: Simon + +relationships: + +bsp39x: + - 11a8254d0dea1642c4ce369fe3c53f6679a17c8e # clk: renesas: rcar-gen3: Add support Z2 clock divider for R8A77990 + - 1aa84001f1853bd52ac3d72ca425ce8be1b58640 # clk: renesas: rcar-gen3: Add support when frequency does not propagate to parent in z clock divider + - 2b12c11844fa5be38078bec552a6c0ede189292e # clk: renesas: r8a77990: Add Z2 clock + - 3c32d47c96f6b664576a3e34abb35998e4f17789 # clk: renesas: rcar-gen3: Add rounding for Z-clock frequency + - 467ae1aa149ba70ef843a0fda2d6fc64328ab111 # clk: renesas: rcar-gen3: Add PLL clock and update z-clock for propagating frequency to parent + - 9b10ae593028df22d0565002a696ccf5b9751bb4 # clk: renesas: r8a7795: Add division value of z and z2 clock + - aa06410b1a3b130a4b3c09b2de31e47f5f0c4752 # clk: renesas: r8a7796: Add division value of z and z2 clock + - abb24ccb7cfaaa0e3ca80ddd715e77a1c6f6e6d0 # clk: renesas: cpg-mssr: Add DEF_GEN3_Z macro + - dd4aba9be2060071c8d3278719dcb748d210d29b # clk: renesas: rcar-gen3: Add division value argument to cpg_z_clk_register + - f6cd0437d6ec3ef4889f7ffb8a5f696c1b05ac2a # clk: renesas: r8a77965: Add division value of z clock + +upstream: + - torvalds: 10d9ea5100c89afd677a202036e0e34e129a6c52 # clk: renesas: rcar-gen3: Parameterise Z and Z2 clock offset + - torvalds: 20cc05ba04a93f05d6c50789fe35d762a2db4e96 # clk: renesas: rcar-gen3: Parameterise Z and Z2 clock fixed divisor + - torvalds: 787fe096fe42829f3091888835562ffce4d23bff # clk: renesas: r8a77990: Add Z2 clock + +comments: + - "1aa84001f1853bd52ac3d72ca425ce8be1b58640: requested upport with 0ff874dd0f36501e13e30be213c5641db2352237 of BSPv3.6.1" + - "3c32d47c96f6b664576a3e34abb35998e4f17789: This is a local patch file for developers. So we don't need to upport." + - "467ae1aa149ba70ef843a0fda2d6fc64328ab111: We need to upport with refactoring." -- cgit v1.2.3