From e8f6c633f5eaad4363b89809676d973066bbc7a1 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 2 Mar 2022 17:41:22 +0100 Subject: bsp-51x-upport-request: Move SDHI HS400 hack to SDHI-refactor-SDHn task Cfr. the corresponding bsp-41x commit. Signed-off-by: Geert Uytterhoeven Acked-by: Yoshihiro Shimoda --- projects/linux/bsp-51x-upport-request.yaml | 1 - 1 file changed, 1 deletion(-) (limited to 'projects/linux/bsp-51x-upport-request.yaml') diff --git a/projects/linux/bsp-51x-upport-request.yaml b/projects/linux/bsp-51x-upport-request.yaml index 12a3574..fd9cb4d 100644 --- a/projects/linux/bsp-51x-upport-request.yaml +++ b/projects/linux/bsp-51x-upport-request.yaml @@ -169,7 +169,6 @@ bsp51x: - e7bcd75b2ab34b3535d568eb5f8a6042413a0677 # clk: renesas: r8a77{96, 965, 990}: Add ADG clock - e2002ddf1a8a2d3229cec9f0be1d398099ef2c83 # clk: renesas: r8a77{96, 965, 990}: Add ADSP clock - df47d799536c8a1ef50b6219bdacce458c4d3a57 # clk: renesas: r8a77{96, 965, 990}: Add VCP4 clocks - - a605f70375dcab767226f340c570e178f5b53456 # clk: renesas: rcar-gen3: Add set_phase to set SDnCKCR in HS400 - 9dfba43fd5dc1da1bfec66dadfb10c14cf4a72f9 # clk: renesas: rcar-gen3: Use max_rate as maximum rate for normal clock instead max_freq - 7935bac0719228175524c4d868c1244ce3579840 # crypto: ccree - add support cts1(cbc) algorithm - 0e906164fd49f99b88b66526f393e80dabf48dcd # crypto: ccree - add support for MULTI2 mode -- cgit v1.2.3